公开(公告)号：US20210057390A1

公开(公告)日：2021-02-25

申请号：US17092939

申请日：2020-11-09

Applicant: Cree, Inc.

Inventor： Troy Gould ,  Colin Kelly Blakely ,  Jesse Colin Reiherzer ,  Joseph G. Clark

IPC: H01L25/075 ,  H01L33/50 ,  H01L33/54 ,  H01L33/58 ,  H01L33/62 ,  H01L33/60

Abstract: Light emitting diode (LED) devices and methods. An example apparatus can include a substrate, one or more LEDs, light-transmissive encapsulation material, and a reflective material covering a portion of the encapsulation material to form a defined opening. The opening allows light emitted from an LED to pass through in a prescribed manner. In some embodiments, the apparatus can be subsequently treated to modify the surface having the opening. In other embodiments, the reflective material can be disposed on a lateral surface of the encapsulation material to reflect light in a desired direction.

公开(公告)号：US20210043821A1

公开(公告)日：2021-02-11

申请号：US17081522

申请日：2020-10-27

Applicant: Cree, Inc.

Inventor： Christopher P. Hussell

IPC: H01L33/62 ,  H01L27/15 ,  H05B45/325

Abstract: Synchronization for light emitting diode (LED) pixels in an LED display is provided so that one or more actions of all LED pixels are able to be initiated at the same time, or within a millisecond. LED displays and corresponding systems may include a controller that is configured for sending communication signals to one or more strings of LED pixels. Active electrical elements within each LED pixel may be configured to receive the communication signals, generate corresponding synchronization signals, and respond in a manner that is coordinated with all other LED pixels in a particular LED display. Failure mitigation of LED pixel failures within an LED string is provided where the controller is configured with bidirectional communication ports for communication with the LED string. In a failure mitigation process, the bidirectional communication ports may switch directions to provide communication signals to both sides of an LED string.

公开(公告)号：US20210043530A1

公开(公告)日：2021-02-11

申请号：US17083712

申请日：2020-10-29

Applicant: Cree, Inc.

Inventor： Chris Hardiman ,  Kyoung-Keun Lee ,  Fabian Radulescu ,  Daniel Namishia ,  Scott Thomas Sheppard

IPC: H01L23/31 ,  H01L29/06 ,  H01L21/56 ,  H01L23/532 ,  H01L23/00

Abstract: A semiconductor die includes a substrate, a first passivation layer over the substrate, and a second passivation layer over the first passivation layer and the substrate. The substrate has boundaries defined by a substrate termination edge. The first passivation layer is over the substrate such that it terminates at a first passivation termination edge that is inset from the substrate termination edge by a first distance. The second passivation layer is over the first passivation layer and the substrate such that it terminates at a second passivation termination edge that is inset from the substrate termination edge by a second distance. The second distance is less than the first distance such that the second passivation layer overlaps the first passivation layer.

公开(公告)号：US20210036696A1

公开(公告)日：2021-02-04

申请号：US16524726

申请日：2019-07-29

Applicant: Cree, Inc.

Inventor： Cam Pham ,  Alejandro Esquivel Rodriguez

IPC: H03K17/082

Abstract: Support circuitry for a power transistor includes a feedback switching element and switching control circuitry. The feedback switching element is coupled between a Kelvin connection node and a second power switching node. The switching control circuitry is configured to cause the feedback switching element to couple the Kelvin connection node to the second power switching node after the power transistor is switched from a blocking mode of operation to a conduction mode of operation and cause the feedback switching element to isolate the Kelvin connection node from the second power switching node before the power transistor is switched from the conduction mode of operation to the blocking mode of operation.

公开(公告)号：US10892383B2

公开(公告)日：2021-01-12

申请号：US14705228

申请日：2015-05-06

Applicant: CREE, INC.

Inventor： Bernd Keller ,  Thomas Cheng-Hsin Yuan ,  Nicholas W Medendorp, Jr.

IPC: H01L33/48 ,  H01L33/64 ,  H01L33/62 ,  H01L33/58 ,  H01L33/54

Abstract: An LED package comprising a submount having a top and bottom surface with a plurality of top electrically and thermally conductive elements on its top surface. An LED is included on one of the top elements such that an electrical signal applied to the top elements causes the LED to emit light. The electrically conductive elements also spread heat from the LED across the majority of the submount top surface. A bottom thermally conductive element is included on the bottom surface of said submount and spreads heat from the submount, and a lens is formed directly over the LED. A method for fabricating LED packages comprising providing a submount panel sized to be separated into a plurality of LED package submounts. Top conductive elements are formed on one surface of the submount panel for a plurality of LED packages, and LEDs are attached to the top elements. Lenses are molded over the LEDs and the substrate panel is singulated to separate it into a plurality of LED packages.

公开(公告)号：US20210005793A1

公开(公告)日：2021-01-07

申请号：US17016701

申请日：2020-09-10

Applicant: Cree, Inc.

Inventor： Kyle Damborsky ,  Derek Miller ,  Jack Vu ,  Peter Scott Andrews ,  Jasper Cabalu ,  Colin Blakely ,  Jesse Reiherzer

IPC: H01L33/52 ,  H01L33/26 ,  H01L33/60 ,  H01L33/50

Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly packaged LEDs with light-altering materials are disclosed. A light-altering material is provided in particular configurations within an LED package to redirect light from an LED chip within the LED package and contribute to a desired emission pattern of the LED package. The light-altering material may also block light from the LED chip from escaping in a non-desirable direction, such as large or wide angle emissions. The light-altering material may be arranged on a lumiphoric material adjacent to the LED chip in various configurations. The LED package may include an encapsulant on the light-altering material and the lumiphoric material.

公开(公告)号：US10886198B2

公开(公告)日：2021-01-05

申请号：US16909334

申请日：2020-06-23

Applicant: Cree, Inc.

Inventor： Sung Chul Joo ,  Bradley Millon ,  Erwin Cohen

IPC: H01L23/495 ,  H01L23/60 ,  H01L23/34 ,  H01L23/31

Abstract: A device comprises a base, a die, leads, and an electrically-insulating die housing covering the die. The base comprises a die mounting section in which the die is mounted. The leads extend away from the die mounting section and are electrically connected to the die. The base further comprises a base mounting section and a recessed section. The recessed section comprises a recess between the die mounting section and the base mounting section. The base further comprises a first side, a second side opposing the first side, and a thickness measured between the first and second sides. The thickness of the base throughout the recessed section is less than the thickness of the base throughout the base mounting section. The base further comprises an opening extending at least through the base mounting section from the first side to the second side.

公开(公告)号：US10861931B2

公开(公告)日：2020-12-08

申请号：US15372505

申请日：2016-12-08

Applicant: Cree, Inc.

Inventor： Daniel J. Lichtenwalner ,  Edward R. Van Brunt ,  Brett Hull

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/78 ,  H01L21/04 ,  H01L29/66 ,  H01L29/739 ,  H01L29/16 ,  H01L29/08

Abstract: Semiconductor devices include a semiconductor layer structure comprising a drift region that includes a wide band-gap semiconductor material. A shielding pattern is provided in an upper portion of the drift region in an active region of the device and a termination structure is provided in the upper portion of the drift region in a termination region of the device. A gate trench extends into an upper surface of the semiconductor layer structure. The semiconductor layer structure includes a semiconductor layer that extends above and at least partially covers the termination structure.

公开(公告)号：US10811370B2

公开(公告)日：2020-10-20

申请号：US15960693

申请日：2018-04-24

Applicant: Cree, Inc.

Inventor： Kyle Bothe ,  Dan Namishia ,  Fabian Radulescu ,  Scott Sheppard

IPC: H01L23/00 ,  H01L23/528 ,  H01L23/31 ,  H01L23/66 ,  H01L23/64 ,  H01L25/065 ,  H01L25/00

Abstract: A packaged electronic circuit includes a substrate having an upper surface, a first metal layer on the upper surface of the substrate, a first polymer layer on the first metal layer opposite the substrate, a second metal layer on the first polymer layer opposite the first metal layer, a dielectric layer on the first polymer layer and at least a portion of the second metal layer and a second polymer layer on the dielectric layer.

公开(公告)号：US20200328150A1

公开(公告)日：2020-10-15

申请号：US16381629

申请日：2019-04-11

Applicant: Cree, Inc.

Inventor： Daniel Jenner Lichtenwalner ,  Edward Robert Van Brunt

IPC: H01L23/522 ,  H01L29/16 ,  H01L29/78 ,  H01L29/739 ,  H01L29/732 ,  H01L29/06 ,  H01L23/532

Abstract: A transistor semiconductor die includes a drift layer, a first dielectric layer, a first metallization layer, a second dielectric layer, a second metallization layer, a first plurality of electrodes, and a second plurality of electrodes. The first dielectric layer is over the drift layer. The first metallization layer is over the first dielectric layer such that at least a portion of the first metallization layer provides a first contact pad. The second dielectric layer is over the first metallization layer. The second metallization layer is over the second dielectric layer such that at least a portion of the second metallization layer provides a second contact pad and the second metallization layer at least partially overlaps the first metallization layer. The transistor semiconductor die is configured to selectively conduct current between the first contact pad and a third contact pad based on signals provided at the second contact pad.