公开(公告)号：US20050028125A1

公开(公告)日：2005-02-03

申请号：US10875572

申请日：2004-06-25

申请人： Yuko Watanabe ,  Koji Arai ,  Seiji Narui

发明人： Yuko Watanabe ,  Koji Arai ,  Seiji Narui

IPC分类号： H01L21/768 ,  G06F17/50 ,  G11C7/18 ,  H01L21/027 ,  H01L21/8242 ,  H01L23/522 ,  H01L27/02 ,  H01L27/04 ,  H01L27/105 ,  H01L27/108

CPC分类号： G11C7/18 ,  H01L23/5226 ,  H01L27/10882 ,  H01L27/10897 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： Bit lines and a pair of two tungsten wires having the same widths are formed at a portion where a through-hole is to be formed such that the bit lines and the tungsten wires are arranged at regular intervals. A through-hole for connection to another wiring layer is formed between the tungsten wires. A connection wiring made of tungsten is formed over the through-hole so as to have a predetermined margin around the through-hole. In a photolithography process, a slit having a small width enough to be insensitive to a photo-resist is formed so as to span the through-hole.

摘要翻译： 在要形成通孔的部分处形成具有相同宽度的位线和一对两根钨丝，使得位线和钨丝以规则的间隔布置。 在钨丝之间形成用于连接到另一布线层的通孔。 在通孔上形成由钨构成的连接布线，以便在通孔周围具有预定的边缘。 在光刻工艺中，形成具有足以对光致抗蚀剂不敏感的小宽度的狭缝，以跨过通孔。

公开(公告)号：US06765815B2

公开(公告)日：2004-07-20

申请号：US10447893

申请日：2003-05-29

申请人： Hiroki Fujisawa ,  Koji Arai ,  Chiaki Dono

发明人： Hiroki Fujisawa ,  Koji Arai ,  Chiaki Dono

IPC分类号： G11C506

CPC分类号： H01L27/10882 ,  G11C5/025 ,  G11C8/14 ,  G11C11/4087 ,  G11C11/4097 ,  H01L27/0207 ,  H01L27/108 ,  H01L27/10885 ,  H01L27/10891

摘要： The present invention discloses a semiconductor memory device having a multilevel interconnection structure with no conventional limitation on the number of lines. The semiconductor memory device has a multilevel interconnection structure in which column selection lines extending in the Y direction and main word lines extending in the X direction are arranged in different layers. The layer including the column selection lines is disposed under the layer including the main word lines. In the structure, in sub-word driver areas intersecting the X direction, the main word lines are arranged in a top layer and sub-word selection lines are arranged in a layer lower than the top layer. The lower layer includes a pattern of islands. According to this interconnection structure, the number of islands can be reduced. Consequently, a plurality of power lines can be arranged between the adjacent main word lines in the sub-word driver areas.

摘要翻译： 本发明公开了一种具有多层互连结构的半导体存储器件，对线数量没有任何常规限制。 半导体存储器件具有多层互连结构，其中沿Y方向延伸的列选择线和沿X方向延伸的主字线布置在不同的层中。 包括列选择线的层被布置在包括主字线的层之下。 在该结构中，在与X方向相交的子字驱动器区域中，主字线布置在顶层中，子字选择线布置在比顶层低的层中。 下层包括岛屿图案。 根据该互连结构，可以减少岛数。 因此，可以在子字驱动器区域中的相邻主字线之间布置多条电源线。

公开(公告)号：US06757084B2

公开(公告)日：2004-06-29

申请号：US09377562

申请日：1999-08-19

申请人： Mitsuru Kurita ,  Hiroshi Sato ,  Koji Arai ,  Koichi Ishimoto ,  Taro Ikeda ,  Takashi Sugiura

发明人： Mitsuru Kurita ,  Hiroshi Sato ,  Koji Arai ,  Koichi Ishimoto ,  Taro Ikeda ,  Takashi Sugiura

IPC分类号： H04N146

CPC分类号： H04N1/484 ,  H04N1/40056

摘要： To control a light emitted from a fluorescent lamp having phosphors with different afterglow properties for different colors, a center of a lighting control signal for controlling the lighting of the fluorescent lamp is controlled to constantly align with the center of a Hsync period so that despite the variation of the lighting time of the fluorescent lamp, a barycenter of the quantity of light from the fluorescent lamp in the Hsync period almost aligns with the center of the Hsync period to reduce the offset of the barycenter.

摘要翻译： 为了控制从具有不同颜色的具有不同余辉性质的荧光体的荧光灯发出的光，控制荧光灯的点亮的点亮控制信号的中心以恒定地与Hsync周期的中心对齐，使得尽管 荧光灯的点亮时间的变化，在Hsync期间来自荧光灯的光量的重心几乎与Hsync周期的中心对齐，以减小重心的偏移。

公开(公告)号：US06370054B1

公开(公告)日：2002-04-09

申请号：US09705837

申请日：2000-11-06

申请人： Hiroki Fujisawa ,  Riichiro Takemura ,  Koji Arai

发明人： Hiroki Fujisawa ,  Riichiro Takemura ,  Koji Arai

IPC分类号： G11C506

CPC分类号： H01L27/0207 ,  G11C5/025 ,  G11C5/063 ,  G11C7/18 ,  G11C8/08 ,  G11C11/4097 ,  H01L27/10882 ,  H01L27/10885 ,  H01L27/10897

摘要： There are provided a plurality of memory mats, including a plurality of bit lines, a plurality of word lines, and a plurality of memory cells coupled to the plurality of bit lines, and the plurality of word lines are provided in a direction of the bit line. A sense amplifier array including a plurality of latch circuits is provided in areas between the memory mats arranged in the bit line direction, respectively, and a pair of input/output nodes of which are connected to a pair of bit lines separately placed in the memory mats on both sides of the area, respectively. In this case, for a general memory mat other than both end portions in the bit line direction, word lines in any one of the memory mats are activated, while, for end memory mats provided on both end portions in the bit line direction, word lines of both memory mats are activated together.

摘要翻译： 提供了多个存储垫，包括多个位线，多个字线和耦合到多个位线的多个存储单元，并且多个字线被提供在位的方向上 线。 包括多个锁存电路的读出放大器阵列分别设置在沿位线方向布置的存储垫之间的区域中，一对输入/输出节点分别连接到存储器中的一对位线 分别在该地区两边的垫子。 在这种情况下，对于位线方向以外的两端部的通用存储器垫，任何一个存储器衬垫中的字线被激活，而对于在位线方向上的两端部分上提供的端存储器垫，字 两个存储垫的行被一起激活。

公开(公告)号：US5989998A

公开(公告)日：1999-11-23

申请号：US919271

申请日：1997-08-28

申请人： Gaku Sugahara ,  Nobuo Aoi ,  Koji Arai ,  Kazuyuki Sawada

发明人： Gaku Sugahara ,  Nobuo Aoi ,  Koji Arai ,  Kazuyuki Sawada

IPC分类号： C23C16/26 ,  C23C16/30 ,  C23C16/40 ,  H01L21/3105 ,  H01L21/312 ,  H01L21/314 ,  H01L21/316 ,  H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/02126 ,  C23C16/26 ,  C23C16/30 ,  C23C16/401 ,  H01L21/0212 ,  H01L21/02131 ,  H01L21/02205 ,  H01L21/02211 ,  H01L21/02214 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/3122 ,  H01L21/3127 ,  H01L21/314 ,  H01L21/31608 ,  H01L21/31612 ,  H01L21/31629 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/31051 ,  H01L21/31058

摘要： A material containing, as a main component, an organic silicon compound represented by the following general formula:R.sup.1.sub.x Si(OR.sup.2).sub.4-x(where R.sup.1 is a phenyl group or a vinyl group; R.sup.2 is an alkyl group; and x is an integer of 1 to 3) is caused to undergo plasma polymerization or react with an oxidizing agent to form an interlayer insulating film composed of a silicon oxide film containing an organic component. As the organic silicon compound where R.sup.1 is a phenyl group, there can be listed phenyltrimethoxysilane or diphenyldimethoxysilane. As the organic silicon compound where R.sup.1 is a vinyl group, there can be listed vinyltrimethoxysilane or divinyldimethoxysilane.

摘要翻译： 作为主成分的含有以下通式表示的有机硅化合物的材料：R1xSi（OR2）4-x（其中R1为苯基或乙烯基; R2为烷基; x为整数） 1〜3）进行等离子体聚合或与氧化剂反应，形成由含有有机成分的氧化硅膜构成的层间绝缘膜。 作为R 1为苯基的有机硅化合物，可以列举苯基三甲氧基硅烷或二苯基二甲氧基硅烷。 作为R 1为乙烯基的有机硅化合物，可列举乙烯基三甲氧基硅烷或二乙烯基二甲氧基硅烷。

公开(公告)号：US5182637A

公开(公告)日：1993-01-26

申请号：US670256

申请日：1991-03-15

申请人： Kiyoharu Yoshioka ,  Koji Arai

发明人： Kiyoharu Yoshioka ,  Koji Arai

IPC分类号： H04N1/46

CPC分类号： H04N1/465

摘要： A color facsimile apparatus includes a plurality of color ink jet heads for different colors. The apparatus comprises instructing circuitry for instructing monochromatic printing of data received in a color receiving mode, and a controller for controlling image data received in a color receiving mode according to a signal from the instructing circuitry for recording of data by a monochromatic ink jet head.

公开(公告)号：USD682312S1

公开(公告)日：2013-05-14

申请号：US29421029

申请日：2012-05-08

申请人： Mitsuo Okumura ,  Goro Takaki ,  Satoshi Akagawa ,  Nobuki Furue ,  Satoshi Asai ,  Hidehiro Komatsu ,  Koji Arai ,  Makoto Niijima ,  Shigeya Yasui ,  Youko Masubuchi

设计人： Mitsuo Okumura ,  Goro Takaki ,  Satoshi Akagawa ,  Nobuki Furue ,  Satoshi Asai ,  Hidehiro Komatsu ,  Koji Arai ,  Makoto Niijima ,  Shigeya Yasui ,  Youko Masubuchi

公开(公告)号：US08341347B2

公开(公告)日：2012-12-25

申请号：US12379284

申请日：2009-02-18

申请人： Kenji Onabe ,  Koji Arai ,  Tetsuya Shirogane

发明人： Kenji Onabe ,  Koji Arai ,  Tetsuya Shirogane

IPC分类号： G06F12/00

CPC分类号： G06F3/0629 ,  G06F3/0607 ,  G06F3/0689

摘要： A storage controller of the present invention enables a larger number of storage devices to be mounted while keeping the installation size small. A plurality of sub-storage units are disposed inside a high density-type storage unit. The respective sub-storage units comprise a plurality of hard disk drives, controller, memory, power supply device, and display part. The respective sub-storage units operate independently of one another. A controller creates a management table based on management data acquired from the respective sub-storage units. The user is notified when there is an error in the table contents. A display part lights up in accordance with an indication from a storage unit specification part, notifying the user of the location of the sub-storage unit.

摘要翻译： 本发明的存储控制器能够在保持安装尺寸小的同时安装更多数量的存储装置。 多个副存储单元设置在高密度型存储单元内。 各个子存储单元包括多个硬盘驱动器，控制器，存储器，电源装置和显示部件。 相应的子存储单元彼此独立地操作。 控制器基于从各个子存储单元获取的管理数据创建管理表。 当表内容有错误时通知用户。 根据来自存储单元规格部分的指示，显示部件亮起，向用户通知子存储单元的位置。

公开(公告)号：US20110287723A1

公开(公告)日：2011-11-24

申请号：US13115223

申请日：2011-05-25

申请人： Shoichi Sato ,  Koji Arai

发明人： Shoichi Sato ,  Koji Arai

IPC分类号： H04W88/02

CPC分类号： H04L1/0001 ,  H04L1/0025 ,  H04L2001/0098 ,  H04W52/20 ,  H04W52/265 ,  H04W52/281

摘要： A transmission level control method in a wireless local loop system capable of suppressing occurrence of an unnecessarily high transmission level, comprises a step of generating a required reception level corresponding to a classification of data, a step of detecting the reception level of data at a receiver side transceiver apparatus, a step of finding a level difference between the detected reception level and the required reception level corresponding to the classification of the related received data, and a step of controlling a change of the transmission level at a transmitter side transceiver apparatus according to this level difference.

摘要翻译： 能够抑制不必要的高发送电平的发生的无线本地环路系统中的发送电平控制方法包括：生成与数据分类对应的所需接收电平的步骤，检测接收端的数据的接收电平的步骤 根据相关接收数据的分类，找出检测到的接收电平与所需接收电平之间的电平差的步骤，以及控制发送机侧收发信机装置的发送电平变化的步骤 这个水平差。

公开(公告)号：US07986087B2

公开(公告)日：2011-07-26

申请号：US10680082

申请日：2003-10-07

申请人： Masaaki Asano ,  Koji Arai

发明人： Masaaki Asano ,  Koji Arai

IPC分类号： H01J1/62 ,  H01J63/04

CPC分类号： H01L27/322 ,  G02B5/201 ,  H01L51/5284

摘要： Disclosed is a color conversion member which is improved in the prevention of a deterioration in color conversion function, the prevention of reflection of external light, and color rendering properties. The color conversion member comprises a transparent substrate, two or more types of color conversion layers, and a color filter layer. The color conversion layers function to convert incident lights for respective pixels to outgoing lights of colors different from the incident lights. The two or more types of color conversion layers are arranged on said transparent substrate. The color filter layer is provided on the transparent substrate side of any one of the color conversion layers or between the above any one of the color conversion layers and the color conversion layers adjacent to the above any one the color conversion layers.

摘要翻译： 公开了一种颜色转换部件，其改进了防止颜色转换功能的劣化，防止外部光的反射和显色性能。 颜色转换构件包括透明衬底，两种或更多种颜色转换层和滤色器层。 颜色转换层用于将各个像素的入射光转换成与入射光不同的颜色的出射光。 两种或更多种颜色转换层布置在所述透明基板上。 滤色器层设置在任何一个颜色转换层的透明基板侧上，或者与上述任何一个颜色转换层之间的颜色转换层和颜色转换层中的任一个之间。