SERIAL CAPACITANCE TUNER
    41.
    发明申请
    SERIAL CAPACITANCE TUNER 有权
    串行电容调谐器

    公开(公告)号:US20160294365A1

    公开(公告)日:2016-10-06

    申请号:US14672370

    申请日:2015-03-30

    CPC classification number: H02H9/04 H03H7/40

    Abstract: An impedance matching network comprises a first signal terminal configured to receive a signal from a source circuit and a second signal terminal configured to provide the signal to a load circuit. The network further comprises a series branch comprising a variable capacitive component between the first signal terminal and the second signal terminal. The variable capacitive component comprises a plurality of capacitive portions connected in series, wherein at least one of the capacitive portions comprises a switching element comprising a stack of series connected transistors. The impedance matching network also comprises a control component configured to control a capacitance of the variable capacitive component by controlling the at least one of the capacitive portions based on a predetermined algorithm.

    Abstract translation: 阻抗匹配网络包括被配置为从源电路接收信号的第一信号端和被配置为将信号提供给负载电路的第二信号端。 该网络还包括串联支路,其包括在第一信号端和第二信号端之间的可变电容分量。 可变电容性部件包括串联连接的多个电容部分,其中电容部分中的至少一个包括包括串联连接的晶体管的堆叠的开关元件。 阻抗匹配网络还包括控制部件,其被配置为基于预定算法来控制电容部分中的至少一个来控​​制可变电容部件的电容。

    System and Method for a Low Noise Amplifier
    43.
    发明申请
    System and Method for a Low Noise Amplifier 有权
    低噪声放大器的系统和方法

    公开(公告)号:US20160056774A1

    公开(公告)日:2016-02-25

    申请号:US14462793

    申请日:2014-08-19

    Abstract: In accordance with an embodiment, a circuit includes a first signal path coupled between an input port and an output port, and a second coupled between the input port and the output port in parallel with the first signal path. The first signal path includes a low noise amplifier (LNA) having an input node coupled to the input port, and the second signal path includes a switch coupled between the input port and the output port.

    Abstract translation: 根据实施例,电路包括耦合在输入端口和输出端口之间的第一信号路径,以及耦合在输入端口和输出端口之间并与第一信号路径连接的第二信号路径。 第一信号路径包括具有耦合到输入端口的输入节点的低噪声放大器(LNA),并且第二信号路径包括耦合在输入端口和输出端口之间的开关。

    Impedance matching network with improved quality factor and method for matching an impedance
    44.
    发明授权
    Impedance matching network with improved quality factor and method for matching an impedance 有权
    阻抗匹配网络具有改进的质量因素和匹配阻抗的方法

    公开(公告)号:US09270248B2

    公开(公告)日:2016-02-23

    申请号:US13651174

    申请日:2012-10-12

    Abstract: An impedance matching network comprises a first and a second signal terminal and a reference potential terminal. The network further comprises a first shunt branch between the first signal terminal and the reference potential terminal, the first shunt branch comprising a variable inductive element and a first capacitive element. The impedance matching network also comprises a second shunt branch between the second signal terminal and the reference potential terminal and comprising a second capacitive element. A series branch between the first signal terminal and the second signal terminal comprises a third capacitive element. Optionally, the first, second, and/or third capacitive element may be implemented as a variable capacitive element. The variable capacitive element comprises a plurality of transistors, wherein a combination of off-capacitances Coff of the transistors provide an overall capacitance of the variable capacitive element as a function of at least two independent transistor control signals.

    Abstract translation: 阻抗匹配网络包括第一和第二信号端子和参考电位端子。 网络还包括在第一信号端和参考电位端之间的第一分路支路,第一分路支路包括可变电感元件和第一电容元件。 阻抗匹配网络还包括在第二信号端子和参考电位端子之间的第二分路支路,并且包括第二电容元件。 第一信号端子和第二信号端子之间的串联分支包括第三电容元件。 可选地,第一,第二和/或第三电容元件可以被实现为可变电容元件。 可变电容元件包括多个晶体管,其中晶体管的关断电容Coff的组合提供作为至少两个独立晶体管控制信号的函数的可变电容元件的总体电容。

    System and method for a phase detector
    47.
    发明授权
    System and method for a phase detector 有权
    相位检测器的系统和方法

    公开(公告)号:US08907702B1

    公开(公告)日:2014-12-09

    申请号:US13975914

    申请日:2013-08-26

    CPC classification number: H03D13/008

    Abstract: In accordance with an embodiment, a phase detector circuit includes a plurality of cascaded RF stages that each has a first RF amplifier and a second RF amplifier. The first RF amplifiers are cascaded with first RF amplifiers of successive RF stages, and the second RF amplifiers are cascaded with second RF amplifiers of successive RF stages. The phase detector further includes a first mixer having a first input coupled to an output of a first RF amplifier of a first RF stage and a second input coupled to an output of a second RF amplifier of the first RF stage, and a second mixer having a first input coupled to an output of a second RF amplifier of a second RF stage and a second input coupled to an output of a first RF amplifier of the second RF stage.

    Abstract translation: 根据一个实施例,相位检测器电路包括多个级联RF级,每级具有第一RF放大器和第二RF放大器。 第一RF放大器与连续RF级的第一RF放大器级联,第二RF放大器与连续RF级的第二RF放大器级联。 相位检测器还包括第一混频器,其具有耦合到第一RF级的第一RF放大器的输出的第一输入和耦合到第一RF级的第二RF放大器的输出的第二输入,以及第二混频器, 耦合到第二RF级的第二RF放大器的输出的第一输入和耦合到第二RF级的第一RF放大器的输出的第二输入。

    SHIELDING DEVICE
    48.
    发明申请
    SHIELDING DEVICE 有权
    屏蔽装置

    公开(公告)号:US20130328178A1

    公开(公告)日:2013-12-12

    申请号:US13967547

    申请日:2013-08-15

    Abstract: One aspect of the invention relates to a shielding device for shielding from electromagnetic radiation, including a shielding base element, a shielding cover element and a shielding lateral element for electrically connecting the base element to the cover element in such that a circuit part to be shielded is arranged within the shielding elements. Since at least one partial section of the shielding elements includes a semiconductor material, a shielding device can be realized completely and cost-effectively in an integrated circuit.

    Abstract translation: 本发明的一个方面涉及一种用于屏蔽电磁辐射的屏蔽装置,包括屏蔽基座元件,屏蔽盖元件和屏蔽横向元件,用于将基座元件电连接到覆盖元件,使屏蔽电路部分 布置在屏蔽元件内。 由于屏蔽元件的至少一部分包括半导体材料,因此可以在集成电路中完全且成本有效地实现屏蔽装置。

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