公开(公告)号：US20120181166A1

公开(公告)日：2012-07-19

申请号：US13007228

申请日：2011-01-14

申请人： QIAN LUO ,  Ye Xu ,  Tza-Jing Gung ,  Xianmin Tang

发明人： QIAN LUO ,  Ye Xu ,  Tza-Jing Gung ,  Xianmin Tang

IPC分类号： C23C14/35

CPC分类号： C23C14/345 ,  C23C14/3492 ,  C23C14/35 ,  H01J37/3455

摘要： Embodiments of the present invention generally relate to methods for physical vapor deposition processes. The methods generally include synchronizing process chamber conditions with the position of a magnetron. As the magnetron is scanned over a first area of a target, the conditions within the chamber are adjusted to a first set of predetermined process conditions. As the magnetron is subsequently scanned over a second area of the target, the conditions within the chamber are adjusted to a second set of predetermined process conditions different the first set. The target may be divided into more than two areas. By correlating the position of the magnetron with different sets of process conditions, film uniformity can be improved by reducing center-to-edge non-uniformities, such as re-sputter rates which may be higher when the magnetron is near the edge of the target.

摘要翻译： 本发明的实施方案一般涉及物理气相沉积方法的方法。 方法通常包括使处理室条件与磁控管的位置同步。 当磁控管在目标的第一区域上被扫描时，腔室内的条件被调整到第一组预定的工艺条件。 随着磁控管随后在目标的第二区域上扫描，腔室内的条件被调整到与第一组不同的第二组预定过程条件。 目标可分为两个以上的区域。 通过将磁控管的位置与不同的工艺条件相关联，可以通过减小中心到边缘的不均匀性来改善膜均匀性，例如当磁控管靠近靶的边缘时可能更高的再溅射速率 。

公开(公告)号：US20100096273A1

公开(公告)日：2010-04-22

申请号：US12256418

申请日：2008-10-22

申请人： Qian Luo ,  Arvind Sundarrajan ,  Hua Chung ,  Xianmin Tang ,  Jick M. Yu ,  Murali K. Narasimhan

发明人： Qian Luo ,  Arvind Sundarrajan ,  Hua Chung ,  Xianmin Tang ,  Jick M. Yu ,  Murali K. Narasimhan

IPC分类号： H01L21/288

CPC分类号： H01L21/76873 ,  C25D5/02 ,  C25D21/12 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76864 ,  H01L21/76877

摘要： A method and apparatus for selectively controlling deposition rate of conductive material during an electroplating process. Dopants are predominantly incorporated into a conductive seed layer on field regions of a substrate prior to filling openings in the field regions by electroplating. A substrate is positioned in one or more processing chambers, and barrier and conductive seed layers formed. A dopant precursor is provided to the chamber and ionized, with or without voltage bias. The dopant predominantly incorporates into the conductive seed layer on the field regions. Electrical conductivity of the conductive seed layer on the field regions is reduced relative to that of the conductive seed layer in the openings, resulting in low initial deposition rate of metal on the field regions during electroplating, and little or no void formation in the metal deposited in the openings.

摘要翻译： 一种用于在电镀过程中选择性地控制导电材料的沉积速率的方法和装置。 在通过电镀在场区域中填充开口之前，掺杂剂主要被结合到衬底的场区域上的导电种子层中。 衬底被定位在一个或多个处理室中，形成阻挡层和导电种子层。 在室内提供掺杂剂前体，并且在电压偏置或没有电压偏置的情况下电离。 掺杂剂主要并入到场区域上的导电种子层中。 导电种子层在场区域的电导率相对于开口中的导电种子层的导电率降低，导致电镀期间金属在场区域上的初始沉积速率较低，并且金属沉积中几乎没有或没有空隙形成 在开口。

公开(公告)号：US20070241458A1

公开(公告)日：2007-10-18

申请号：US11809153

申请日：2007-05-30

申请人： Peijun Ding ,  Zheng Xu ,  Hong Zhang ,  Xianmin Tang ,  Praburam Gopalraja ,  Suraj Rengarajan ,  John Forster ,  Jianming Fu ,  Tony Chiang ,  Gongda Yao ,  Fusen Chen ,  Barry Chin ,  Gene Kohara

发明人： Peijun Ding ,  Zheng Xu ,  Hong Zhang ,  Xianmin Tang ,  Praburam Gopalraja ,  Suraj Rengarajan ,  John Forster ,  Jianming Fu ,  Tony Chiang ,  Gongda Yao ,  Fusen Chen ,  Barry Chin ,  Gene Kohara

IPC分类号： H01L23/48

CPC分类号： H01L21/02183 ,  C23C14/024 ,  C23C14/046 ,  C23C14/0641 ,  C23C14/165 ,  C23C14/541 ,  C23C14/5806 ,  H01L21/022 ,  H01L21/02266 ,  H01L21/02271 ,  H01L21/02362 ,  H01L21/2855 ,  H01L21/318 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76876 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A metal/metal nitride barrier layer for semiconductor device applications. The barrier layer is particularly useful in contact vias where high conductivity of the via is important, and a lower resistivity barrier layer provides improved overall via conductivity.

摘要翻译： 用于半导体器件应用的金属/金属氮化物阻挡层。 阻挡层在通孔的高导电性很重要的接触孔中特别有用，并且较低电阻率的阻挡层提供改进的整体通孔导电性。

公开(公告)号：US20070209925A1

公开(公告)日：2007-09-13

申请号：US11373643

申请日：2006-03-09

申请人： Xianmin Tang ,  Praburam Gopalraja ,  Jenn Wang ,  Jick Yu

发明人： Xianmin Tang ,  Praburam Gopalraja ,  Jenn Wang ,  Jick Yu

IPC分类号： C23C14/32

CPC分类号： C23C14/165 ,  C23C14/5873 ,  H01J37/321 ,  H01J37/3266 ,  H01J37/3408 ,  H01J2237/334 ,  H01L21/2855 ,  H01L21/32136 ,  H01L21/76844

摘要： A substrate processing method practiced in a plasma sputter reactor including an RF coil and two or more coaxial electromagnets, at least two of which are wound at different radii. After a barrier layer, for example, of tantalum is sputter deposited into a via hole, the RF coil is powered to cause argon sputter etching of the barrier layer and the current to the electromagnets are adjusted to steer the argon ions, for example to eliminate sidewall asymmetry. For example, the two electromagnets are powered with unequal currents of opposite polarities or a third electromagnet wrapped at a different height is powered. In one embodiment, the steering straightens the trajectories near the wafer edge. In another embodiment, the etching is divided into two steps in which the steering inclines the trajectories at opposite angles. The invention may also be applied to other materials, such as copper.

摘要翻译： 在包括RF线圈和两个或更多个同轴电磁体的等离子体溅射反应器中实施的衬底处理方法，其中至少两个以不同的半径缠绕。 在阻挡层之后，例如钽被溅射沉积到通孔中，RF线圈被供电以对阻挡层进行氩溅射蚀刻，并且调节到电磁体的电流以引导氩离子，例如以消除 侧壁不对称。 例如，两个电磁铁由具有相反极性的不相等的电流供电，或者以不同高度包装的第三电磁体被供电。 在一个实施例中，转向拉直晶片边缘附近的轨迹。 在另一个实施例中，蚀刻被分成两个步骤，其中操纵以相反的角度倾斜轨迹。 本发明也可以应用于其它材料，例如铜。

公开(公告)号：US08764961B2

公开(公告)日：2014-07-01

申请号：US12256418

申请日：2008-10-22

申请人： Qian Luo ,  Arvind Sundarrajan ,  Hua Chung ,  Xianmin Tang ,  Jick M. Yu ,  Murali K. Narasimhan

发明人： Qian Luo ,  Arvind Sundarrajan ,  Hua Chung ,  Xianmin Tang ,  Jick M. Yu ,  Murali K. Narasimhan

IPC分类号： C25D5/34 ,  C25D7/12

CPC分类号： H01L21/76873 ,  C25D5/02 ,  C25D21/12 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76864 ,  H01L21/76877

摘要： A method and apparatus for selectively controlling deposition rate of conductive material during an electroplating process. Dopants are predominantly incorporated into a conductive seed layer on field regions of a substrate prior to filling openings in the field regions by electroplating. A substrate is positioned in one or more processing chambers, and barrier and conductive seed layers formed. A dopant precursor is provided to the chamber and ionized, with or without voltage bias. The dopant predominantly incorporates into the conductive seed layer on the field regions. Electrical conductivity of the conductive seed layer on the field regions is reduced relative to that of the conductive seed layer in the openings, resulting in low initial deposition rate of metal on the field regions during electroplating, and little or no void formation in the metal deposited in the openings.

摘要翻译： 一种用于在电镀过程中选择性地控制导电材料的沉积速率的方法和装置。 在通过电镀在场区域中填充开口之前，掺杂剂主要被结合到衬底的场区域上的导电种子层中。 衬底被定位在一个或多个处理室中，形成阻挡层和导电种子层。 在室内提供掺杂剂前体，并且在电压偏置或没有电压偏置的情况下电离。 掺杂剂主要并入到场区域上的导电种子层中。 导电种子层在场区域的电导率相对于开口中的导电种子层的导电率降低，导致电镀期间金属在场区域上的初始沉积速率较低，并且金属沉积中几乎没有或没有空隙形成 在开口。

公开(公告)号：US08637390B2

公开(公告)日：2014-01-28

申请号：US13116794

申请日：2011-05-26

申请人： Seshadri Ganguli ,  Sang Ho Yu ,  Sang-Hyeob Lee ,  Hyoung-Chan Ha ,  Wei Ti Lee ,  Hoon Kim ,  Srinivas Gandikota ,  Yu Lei ,  Kevin Moraes ,  Xianmin Tang

发明人： Seshadri Ganguli ,  Sang Ho Yu ,  Sang-Hyeob Lee ,  Hyoung-Chan Ha ,  Wei Ti Lee ,  Hoon Kim ,  Srinivas Gandikota ,  Yu Lei ,  Kevin Moraes ,  Xianmin Tang

IPC分类号： H01L21/4763

CPC分类号： H01L21/28079 ,  H01L21/28088 ,  H01L21/32051 ,  H01L29/49

摘要： Metal gate structures and methods for forming thereof are provided herein. In some embodiments, a method for forming a metal gate structure on a substrate having a feature formed in a high k dielectric layer may include depositing a first layer within the feature atop the dielectric layer; depositing a second layer comprising cobalt or nickel within the feature atop the first layer; and depositing a third layer comprising a metal within the feature atop the second layer to fill the feature, wherein at least one of the first or second layers forms a wetting layer to form a nucleation layer for a subsequently deposited layer, wherein one of the first, second, or third layers forms a work function layer, and wherein the third layer forms a gate electrode.

摘要翻译： 本文提供了金属门结构及其形成方法。 在一些实施例中，在具有形成在高k电介质层中的特征的衬底上形成金属栅极结构的方法可以包括在电介质层顶部的特征内沉积第一层; 在所述特征内在所述第一层顶部沉积包含钴或镍的第二层; 以及在第二层顶部沉积包括特征内的金属的第三层以填充该特征，其中第一层或第二层中的至少一层形成润湿层以形成后续沉积层的成核层，其中第一层 第二层或第三层形成功函数层，并且其中第三层形成栅电极。

公开(公告)号：US20130330920A1

公开(公告)日：2013-12-12

申请号：US13490059

申请日：2012-06-06

申请人： Guojun Liu ,  Xianmin Tang ,  Anantha Subramani ,  Wei W. Wang

发明人： Guojun Liu ,  Xianmin Tang ,  Anantha Subramani ,  Wei W. Wang

IPC分类号： H01L21/283

CPC分类号： H01L21/76814 ,  H01L21/02063

摘要： A high-frequency, hydrogen-based radio-frequency (RF) plasma is used to reduce a metal oxide and other contaminant disposed in an aperture that is formed in an ultra-low k dielectric material. Because the frequency of the plasma is at least about 40 MHz and the primary gas in the plasma is hydrogen, metal oxide can be advantageously removed without damaging the dielectric material.

摘要翻译： 使用高频，氢基射频（RF）等离子体来减少设置在形成于超低k电介质材料的孔中的金属氧化物和其它污染物。 由于等离子体的频率为至少约40MHz，等离子体中的初级气体为氢，所以可以有利地除去金属氧化物而不损坏电介质材料。

公开(公告)号：US20050272254A1

公开(公告)日：2005-12-08

申请号：US11184404

申请日：2005-07-18

申请人： Peijun Ding ,  Zheng Xu ,  Hong Zhang ,  Xianmin Tang ,  Praburam Gopalraja ,  Suraj Rengarajan ,  John Forster ,  Jianming Fu ,  Tony Chiang ,  Gongda Yao ,  Fusen Chen ,  Barry Chin ,  Gene Kohara

发明人： Peijun Ding ,  Zheng Xu ,  Hong Zhang ,  Xianmin Tang ,  Praburam Gopalraja ,  Suraj Rengarajan ,  John Forster ,  Jianming Fu ,  Tony Chiang ,  Gongda Yao ,  Fusen Chen ,  Barry Chin ,  Gene Kohara

IPC分类号： C23C14/06 ,  C23C14/16 ,  C23C14/32 ,  H01L21/285 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/02183 ,  C23C14/0641 ,  C23C14/165 ,  C23C14/541 ,  C23C14/5806 ,  H01L21/02266 ,  H01L21/2855 ,  H01L21/318 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76876

摘要： We have discovered a method of providing a thin approximately from about 2 Å to about 100 Å thick TaN seed layer, which can be used to induce the formation of alpha tantalum when tantalum is deposited over the TaN seed layer. Further, the TaN seed layer exhibits low resistivity, in the range of 30 μΩ cm and can be used as a low resistivity barrier layer in the absence of an alpha tantalum layer. In one embodiment of the method, a TaN film is altered on its surface form the TaN seed layer. In another embodiment of the method, a Ta film is altered on its surface to form the TaN seed layer.

摘要翻译： 我们已经发现了一种提供大约约2埃至大约100埃的Ta N种子层的薄膜的方法，当钽沉积在Ta上时可用于诱导形成α钽， SUB> N 种子层。 此外，Ta N N种子层在30μΩ·cm的范围内显示低电阻率，并且可以在不存在α钽层的情况下用作低电阻率阻挡层。 在该方法的一个实施方案中，TaN膜在其表面上形成Ta N N种子层。 在该方法的另一个实施方案中，在其表面上改变Ta膜以形成Ta N N种子层。

公开(公告)号：US08558299B2

公开(公告)日：2013-10-15

申请号：US13157164

申请日：2011-06-09

申请人： Yong Cao ,  Xianmin Tang ,  Srinivas Gandikota ,  Wei D. Wang ,  Zhendong Liu ,  Kevin Moraes ,  Muhammad M. Rasheed ,  Thanh X. Nguyen ,  Ananthkrishna Jupudi

发明人： Yong Cao ,  Xianmin Tang ,  Srinivas Gandikota ,  Wei D. Wang ,  Zhendong Liu ,  Kevin Moraes ,  Muhammad M. Rasheed ,  Thanh X. Nguyen ,  Ananthkrishna Jupudi

IPC分类号： H01L29/788

CPC分类号： H01L21/28079 ,  C23C14/165 ,  C23C14/345 ,  C23C14/35 ,  H01L21/28088 ,  H01L21/2855 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/78

摘要： Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal nitride film layer on the conductive film layer, a silicon-containing film layer on the refractory metal nitride film layer, and a tungsten film layer on the silicon-containing film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer.

摘要翻译： 本文所述的实施例提供了一种半导体器件及其形成方法和装置。 半导体器件包括在源极和漏极区域之间的衬底上具有源极和漏极区域以及栅电极堆叠的衬底。 栅极电极堆叠包括在栅极介电层上的导电膜层，导电膜层上的难熔金属氮化物膜层，难熔金属氮化物膜层上的含硅膜层，以及硅 - 含有膜层。 在一个实施例中，该方法包括将衬底定位在处理室内，其中衬底包括源极和漏极区域，源极和漏极区域之间的栅极介电层以及栅极电介质层上的导电膜层。 该方法还包括在导电膜层上沉积难熔金属氮化物膜层，在难熔金属氮化物膜层上沉积含硅膜层，并在含硅膜层上沉积钨膜层。

公开(公告)号：US20110303960A1

公开(公告)日：2011-12-15

申请号：US13157164

申请日：2011-06-09

申请人： YONG CAO ,  Xianmin Tang ,  Srinivas Gandikota ,  Wei D. Wang ,  Zhendong Liu ,  Kevin Moraes ,  Muhammad M. Rasheed ,  Thanh X. Nguyen ,  Ananthkrishna Jupudi

发明人： YONG CAO ,  Xianmin Tang ,  Srinivas Gandikota ,  Wei D. Wang ,  Zhendong Liu ,  Kevin Moraes ,  Muhammad M. Rasheed ,  Thanh X. Nguyen ,  Ananthkrishna Jupudi

IPC分类号： H01L29/788 ,  H01L21/283 ,  C23C14/34 ,  H01L21/3205

CPC分类号： H01L21/28079 ,  C23C14/165 ,  C23C14/345 ,  C23C14/35 ,  H01L21/28088 ,  H01L21/2855 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/78

摘要： Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal nitride film layer on the conductive film layer, a silicon-containing film layer on the refractory metal nitride film layer, and a tungsten film layer on the silicon-containing film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer.

摘要翻译： 本文所述的实施例提供了一种半导体器件及其形成方法和装置。 半导体器件包括在源极和漏极区域之间的衬底上具有源极和漏极区域以及栅电极堆叠的衬底。 栅极电极堆叠包括在栅极电介质层上的导电膜层，导电膜层上的难熔金属氮化物膜层，难熔金属氮化物膜层上的含硅膜层，以及硅 - 含有膜层。 在一个实施例中，该方法包括将衬底定位在处理室内，其中衬底包括源极和漏极区域，源极和漏极区域之间的栅极介电层以及栅极电介质层上的导电膜层。 该方法还包括在导电膜层上沉积难熔金属氮化物膜层，在难熔金属氮化物膜层上沉积含硅膜层，并在含硅膜层上沉积钨膜层。