公开(公告)号：US07488656B2

公开(公告)日：2009-02-10

申请号：US11119310

申请日：2005-04-29

申请人： Eduard A. Cartier ,  Matthew W. Copel ,  Supratik Guha ,  Richard A. Haight ,  Fenton R. McFeely ,  Vijay Narayanan

发明人： Eduard A. Cartier ,  Matthew W. Copel ,  Supratik Guha ,  Richard A. Haight ,  Fenton R. McFeely ,  Vijay Narayanan

IPC分类号： H01L21/336

CPC分类号： H01L21/823462 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28176 ,  H01L21/28194 ,  H01L21/31691 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4958 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

摘要： The present invention provides a method for removing charged defects from a material stack including a high k gate dielectric and a metal contact such that the final gate stack, which is useful in forming a pFET device, has a threshold voltage substantially within the silicon band gap and good carrier mobility. Specifically, the present invention provides a re-oxidation procedure that will restore the high k dielectric of a pFET device to its initial, low-defect state. It was unexpectedly determined that by exposing a material stack including a high k gate dielectric and a metal to dilute oxygen at low temperatures will substantially eliminate oxygen vacancies, resorting the device threshold to its proper value. Furthermore, it was determined that if dilute oxygen is used, it is possible to avoid undue oxidation of the underlying semiconductor substrate which would have a deleterious effect on the capacitance of the final metal-containing gate stack. The present invention also provides a semiconductor structure that includes at least one gate stack that has a threshold voltage within a control range and has good carrier mobility.

摘要翻译： 本发明提供了一种用于从包括高k栅极电介质和金属接触的材料堆叠中去除带电缺陷的方法，使得用于形成pFET器件的最终栅极堆叠具有基本上在硅带隙内的阈值电压 和良好的载波移动性。 具体地说，本发明提供了将pFET器件的高k电介质恢复到其初始低缺陷状态的再氧化过程。 意外地确定，通过暴露包括高k栅极电介质和金属的材料堆以在低温下稀释氧将基本上消除氧空位，使装置阈值达到适当的值。 此外，确定如果使用稀释氧，则可以避免对最终含金属的栅极叠层的电容产生有害影响的下面的半导体衬底的不适当的氧化。 本发明还提供一种半导体结构，该半导体结构包括至少一个栅极堆叠，其具有在控制范围内的阈值电压并具有良好的载流子迁移率。

公开(公告)号：US06933566B2

公开(公告)日：2005-08-23

申请号：US10059422

申请日：2002-01-31

申请人： Nestor Alexander Bojarczuk, Jr. ,  Matthew Warren Copel ,  Supratik Guha ,  Vijay Narayanan

发明人： Nestor Alexander Bojarczuk, Jr. ,  Matthew Warren Copel ,  Supratik Guha ,  Vijay Narayanan

IPC分类号： H01L21/20 ,  H01L21/316 ,  H01L21/36 ,  H01L27/01 ,  H01L27/12

CPC分类号： H01L21/02488 ,  B82Y10/00 ,  B82Y30/00 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/31604 ,  H01L21/31691 ,  Y10S438/967

摘要： A method (and resultant structure) of forming a semiconductor structure, includes processing an oxide to have a crystalline arrangement, and depositing an amorphous semiconductor layer on the oxide by one of evaporation and chemical vapor deposition (CVD).

摘要翻译： 形成半导体结构的方法（和结果）包括处理氧化物以具有结晶布置，以及通过蒸发和化学气相沉积（CVD）之一在氧化物上沉积非晶半导体层。

公开(公告)号：US06852575B2

公开(公告)日：2005-02-08

申请号：US09898039

申请日：2001-07-05

申请人： Nestor Alexander Bojarczuk, Jr. ,  Douglas Andrew Buchanan ,  Supratik Guha ,  Vijay Narayanan ,  Lars-Ake Ragnarsson

发明人： Nestor Alexander Bojarczuk, Jr. ,  Douglas Andrew Buchanan ,  Supratik Guha ,  Vijay Narayanan ,  Lars-Ake Ragnarsson

IPC分类号： H01L21/316 ,  H01L21/00 ,  H01L21/84

CPC分类号： H01L21/02192 ,  B82Y10/00 ,  B82Y30/00 ,  H01L21/02293 ,  H01L21/31604

摘要： A method (and resultant structure) of forming a semiconductor structure, includes forming a mixed rare earth oxide on silicon. The mixed rare earth oxide is lattice-matched to silicon.

公开(公告)号：US20100065815A1

公开(公告)日：2010-03-18

申请号：US12620629

申请日：2009-11-18

申请人： Nestor Alexander Bojarczuk, JR. ,  Douglas Andrew Buchanan ,  Supratik Guha ,  Vijay Narayanan ,  Lars-Ake Ragnarsson

发明人： Nestor Alexander Bojarczuk, JR. ,  Douglas Andrew Buchanan ,  Supratik Guha ,  Vijay Narayanan ,  Lars-Ake Ragnarsson

IPC分类号： H01L33/00 ,  H01L29/12

CPC分类号： H01L21/02192 ,  B82Y10/00 ,  B82Y30/00 ,  H01L21/02293 ,  H01L21/31604

摘要： A method (and resultant structure) of forming a semiconductor structure, includes forming a mixed rare earth oxide on silicon. The mixed rare earth oxide is lattice-matched to silicon.

摘要翻译： 形成半导体结构的方法（和结果）包括在硅上形成混合的稀土氧化物。 混合的稀土氧化物与硅晶格匹配。

公开(公告)号：US07648864B2

公开(公告)日：2010-01-19

申请号：US12197079

申请日：2008-08-22

申请人： Nestor Alexander Bojarczuk, Jr. ,  Douglas Andrew Buchanan ,  Supratik Guha ,  Vijay Narayanan ,  Lars-Ake Ragnarsson

发明人： Nestor Alexander Bojarczuk, Jr. ,  Douglas Andrew Buchanan ,  Supratik Guha ,  Vijay Narayanan ,  Lars-Ake Ragnarsson

IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L21/336 ,  H01L21/76 ,  H01L21/302

CPC分类号： H01L21/02192 ,  B82Y10/00 ,  B82Y30/00 ,  H01L21/02293 ,  H01L21/31604

摘要： A method (and resultant structure) of forming a semiconductor structure, includes forming a mixed rare earth oxide on silicon. The mixed rare earth oxide is lattice-matched to silicon.

摘要翻译： 形成半导体结构的方法（和结果）包括在硅上形成混合的稀土氧化物。 混合的稀土氧化物与硅晶格匹配。

公开(公告)号：US20080308831A1

公开(公告)日：2008-12-18

申请号：US12197079

申请日：2008-08-22

申请人： Nestor Alexander Bojarczuk, JR. ,  Douglas Andrew Buchanan ,  Supratik Guha ,  Vijay Narayanan ,  Lars-Ake Ragnarsson

发明人： Nestor Alexander Bojarczuk, JR. ,  Douglas Andrew Buchanan ,  Supratik Guha ,  Vijay Narayanan ,  Lars-Ake Ragnarsson

IPC分类号： H01L33/00 ,  B32B9/00 ,  H01L21/31

CPC分类号： H01L21/02192 ,  B82Y10/00 ,  B82Y30/00 ,  H01L21/02293 ,  H01L21/31604

摘要： A method (and resultant structure) of forming a semiconductor structure, includes forming a mixed rare earth oxide on silicon. The mixed rare earth oxide is lattice-matched to silicon.

摘要翻译： 形成半导体结构的方法（和结果）包括在硅上形成混合的稀土氧化物。 混合的稀土氧化物与硅晶格匹配。

公开(公告)号：US20060246740A1

公开(公告)日：2006-11-02

申请号：US11119310

申请日：2005-04-29

申请人： Eduard Cartier ,  Matthew Copel ,  Supratik Guha ,  Richard Haight ,  Fenton McFeely ,  Vijay Narayanan

发明人： Eduard Cartier ,  Matthew Copel ,  Supratik Guha ,  Richard Haight ,  Fenton McFeely ,  Vijay Narayanan

IPC分类号： H01L21/31

CPC分类号： H01L21/823462 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28176 ,  H01L21/28194 ,  H01L21/31691 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4958 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

摘要： The present invention provides a method for removing charged defects from a material stack including a high k gate dielectric and a metal contact such that the final gate stack, which is useful in forming a pFET device, has a threshold voltage substantially within the silicon band gap and good carrier mobility. Specifically, the present invention provides a re-oxidation procedure that will restore the high k dielectric of a pFET device to its initial, low-defect state. It was unexpectedly determined that by exposing a material stack including a high k gate dielectric and a metal to dilute oxygen at low temperatures will substantially eliminate oxygen vacancies, resorting the device threshold to its proper value. Furthermore, it was determined that if dilute oxygen is used, it is possible to avoid undue oxidation of the underlying semiconductor substrate which would have a deleterious effect on the capacitance of the final metal-containing gate stack. The present invention also provides a semiconductor structure that includes at least one gate stack that has a threshold voltage within a control range and has good carrier mobility.

公开(公告)号：US09406817B2

公开(公告)日：2016-08-02

申请号：US13613891

申请日：2012-09-13

申请人： Ayman A. Alabduljabbar ,  Abdullah I. Alboiez ,  Yaseen G. Alharbi ,  Alhassan Badahdah ,  Supratik Guha ,  Hussam Khonkar ,  Yves C. Martin ,  Theodore Gerard van Kessel ,  Robert L. Sandstrom ,  Naim Moumen

发明人： Ayman A. Alabduljabbar ,  Abdullah I. Alboiez ,  Yaseen G. Alharbi ,  Alhassan Badahdah ,  Supratik Guha ,  Hussam Khonkar ,  Yves C. Martin ,  Theodore Gerard van Kessel ,  Robert L. Sandstrom ,  Naim Moumen

IPC分类号： H01L31/042 ,  H01L31/02 ,  H01L31/052 ,  H01L31/054

CPC分类号： H01L31/02013 ,  H01L31/02008 ,  H01L31/052 ,  H01L31/0547 ,  H01L2924/0002 ,  Y02E10/52 ,  H01L2924/00

摘要： Techniques for providing high-capacity, re-workable connections in concentrated photovoltaic devices are provided. In one aspect, a lead frame package for a photovoltaic device is provided that includes a beam shield; and one or more lead frame connectors affixed to the beam shield, wherein the lead frame connectors are configured to provide connection to the photovoltaic device when the photovoltaic device is assembled to the lead frame package. A photovoltaic apparatus is also provided that includes a lead frame package assembled to a photovoltaic device. The lead frame package includes a beam shield and one or more lead frame connectors affixed to the beam shield, wherein the lead frame connectors are configured to provide connection to the photovoltaic device.

摘要翻译： 提供了在集中光伏器件中提供大容量，可重新连接的连接的技术。 一方面，提供一种用于光伏器件的引线框架封装，其包括光束屏蔽; 以及一个或多个引线框架连接器，其固定到所述梁屏蔽件，其中所述引线框架连接器被配置为当所述光伏器件组装到所述引线框架封装件时提供到所述光伏器件的连接。 还提供了一种光伏装置，其包括组装到光伏器件的引线框封装。 引线框架封装包括梁屏蔽和固定到梁屏蔽的一个或多个引线框连接器，其中引线框架连接器被配置为提供到光伏器件的连接。

公开(公告)号：US08796596B2

公开(公告)日：2014-08-05

申请号：US12901079

申请日：2010-10-08

申请人： Supratik Guha ,  Hendrik F. Hamann

发明人： Supratik Guha ,  Hendrik F. Hamann

IPC分类号： H05B3/10

CPC分类号： G11B7/00454 ,  B82Y10/00 ,  G11B7/00557 ,  G11B7/22 ,  G11C13/0004 ,  H01L45/06 ,  H01L45/1206 ,  H01L45/122 ,  H01L45/1286 ,  H01L45/144 ,  H05B2214/04

摘要： A memory cell includes at least one heater, and at least two leads and a heating element which is formed between at least two leads, a material of the heating element being different from a material of at least two leads such that a location of a hot spot in the heater is controllable based on a polarity of current in the heater and at least one storage medium formed adjacent to at least one heater.

摘要翻译： 存储单元包括至少一个加热器，以及形成在至少两个引线之间的至少两个引线和加热元件，加热元件的材料不同于至少两个引线的材料，使得热的位置 基于加热器中的电流的极性和与至少一个加热器相邻形成的至少一个存储介质可以控制加热器中的点。

公开(公告)号：US08680393B2

公开(公告)日：2014-03-25

申请号：US13567407

申请日：2012-08-06

申请人： Nestor A. Bojarczuk ,  Keith E. Fogel ,  Supratik Guha ,  Byungha Shin

发明人： Nestor A. Bojarczuk ,  Keith E. Fogel ,  Supratik Guha ,  Byungha Shin

IPC分类号： H01L31/00

CPC分类号： H01L31/0326 ,  H01L31/022466 ,  H01L31/022475 ,  H01L31/022483 ,  H01L31/0392 ,  H01L31/03925 ,  H01L31/03926 ,  H01L31/072 ,  H01L31/073 ,  H01L31/1896 ,  Y02E10/50 ,  Y02E10/543 ,  Y02P70/521

摘要： Embodiments relate to a solar cell apparatus including a molybdenum (Mo) contact layer and an annealed absorber layer including zinc and sulfur directly adjacent to the Mo contact layer. The apparatus has no molybdenum disulfide (MoS2) layer located between the Mo contact layer and the annealed absorber layer. The apparatus further includes a buffer layer adjacent to the annealed absorber layer.

摘要翻译： 实施例涉及包括钼（Mo）接触层和包含与Mo接触层直接相邻的锌和硫的退火吸收体层的太阳能电池装置。 该装置在Mo接触层和退火的吸收层之间没有二硫化钼（MoS2）层。 该装置还包括与退火的吸收层相邻的缓冲层。