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公开(公告)号：US06495470B2
公开(公告)日：2002-12-17
申请号：US08580532
申请日：1995-12-29
IPC分类号： H01L21461
CPC分类号： H01L21/76804 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a contact opening between two conductive features over a semiconductor substrate. Oxide spacers are formed adjacent to the conductive features. A doped oxide layer is then deposited over the semiconductor substrate. Finally, the contact opening is etched through the doped oxide layer between the conductive features such that the oxide spacers are exposed within the contact opening.
摘要翻译： 一种在半导体衬底上形成两个导电特征之间的接触开口的方法。 形成与导电特征相邻的氧化物间隔物。 然后在半导体衬底上沉积掺杂的氧化物层。 最后，通过导电特征之间的掺杂氧化物层蚀刻接触开口，使得氧化物间隔物暴露在接触开口内。
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公开(公告)号：US5883436A
公开(公告)日：1999-03-16
申请号：US802285
申请日：1997-02-20
IPC分类号： H01L21/768 , H01L23/522 , H01L29/34 , H01L23/48
CPC分类号： H01L21/76804 , H01L23/5226 , H01L2924/0002
摘要： A method of forming a contact opening between two conductive features over a semiconductor substrate. Oxide spacers are formed adjacent to the conductive features. A doped oxide layer is then deposited over the semiconductor substrate. Finally, the contact opening is etched through the doped oxide layer between the conductive features such that the oxide spacers are exposed within the contact opening.
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43.发明授权Controllable isotropic plasma etching technique for the suppression of stringers in memory cells 失效用于抑制存储器单元中的桁条的可控等向等离子体蚀刻技术
公开(公告)号：US5705419A
公开(公告)日：1998-01-06
申请号：US281525
申请日：1994-07-27
IPC分类号： H01L21/28 , H01L21/311 , H01L21/3213 , H01L21/8247 , H01L27/115 , H01L21/265
CPC分类号： H01L27/11521 , H01L21/28273 , H01L21/31116 , H01L21/32137 , H01L27/115 , Y10S438/954 , Y10S438/963
摘要： In the manufacture of memory cells, horizontal etching is controlled in a manner which prevents the formation of stringers between adjacent cells without undercutting the sidewalls of a memory cell.
摘要翻译： 在存储单元的制造中，以防止相邻单元之间的桁条形成而不会削弱存储单元的侧壁的方式来控制水平蚀刻。
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44.发明授权
公开(公告)号：US5427967A
公开(公告)日：1995-06-27
申请号：US31373
申请日：1993-03-11
IPC分类号： G11C17/00 , H01L21/8247 , H01L27/115 , H01L29/51 , H01L29/788 , H01L29/792 , H01L21/70
CPC分类号： H01L27/11517 , H01L27/115 , H01L29/511
摘要： There is disclosed herein a technique for manufacturing a group of memory cells or devices on a common oxide coated silicon substrate such that the cells are arranged in rows and columns with row and column spaces separating the individual cells from one another. Each of the cells includes an array of different layers on the oxide coated top surface of the substrate including, in particular, the polysilicon layer. As disclosed, a method is provided for preventing the formation of polysilicon stringers between individual cells during their manufacture. This method is carried out by first forming the columns before the rows are formed such that continuous sidewalls of the columns are exposed to the ambient surroundings. Thereafter, these sidewalls are coated with protective layers, specifically layers of nitride.
摘要翻译： 这里公开了一种用于在共同的氧化物涂覆的硅衬底上制造一组存储器单元或器件的技术，使得电池以行和列排列成行和列间隔，以将各个电池彼此分开。 每个电池包括在衬底的氧化物涂覆的顶表面上的不同层的阵列，特别是包括多晶硅层。 如所公开的，提供了一种用于在其制造期间防止在单个电池之间形成多晶硅桁条的方法。 该方法是通过在形成行之前首先形成柱，以使柱的连续侧壁暴露于周围环境来进行的。 此后，这些侧壁涂有保护层，特别是氮化层。
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公开(公告)号：US5383018A
公开(公告)日：1995-01-17
申请号：US997226
申请日：1992-12-28
申请人： S. M. Reza Sadjadi
发明人： S. M. Reza Sadjadi
IPC分类号： G01N21/93 , H01L23/544 , G01J1/02 , G01N21/88
摘要： A calibration wafer for a patterned wafer scanner is constructed from a substrate of semiconductor material, typically silicon, in which a pattern of features has been etched into the periphery of each die by means of photolithographic techniques. Next, a layer or layers of films composed of materials which are typically used during the fabrication of integrated circuits are deposited. Then a substantially uniform distribution of particles of a known material and size distribution is deposited onto the wafer. A second embodiment of the calibration wafer is one in which a layer or layers of film are first deposited onto a substrate. Then a pattern of features is etched into the periphery of the film covering each die by means of photolithographic techniques. After this step, a substantially uniform distribution of particles is deposited. A method of using such a calibration wafer to calibrate a patterned wafer scanner is also disclosed.
摘要翻译： 用于图案化晶片扫描仪的校准晶片由半导体材料的衬底（通常为硅）构成，其中特征图案已经通过光刻技术蚀刻到每个管芯的外围。 接下来，沉积由在集成电路的制造期间通常使用的材料构成的一层或多层膜。 然后将已知材料和尺寸分布的颗粒的基本上均匀的分布沉积到晶片上。 校准晶片的第二实施例是其中首先将膜层沉积到衬底上的膜。 然后通过光刻技术将特征图案蚀刻到覆盖每个管芯的膜的周边。 在该步骤之后，沉积基本均匀的颗粒分布。 还公开了使用这种校准晶片校准图案化晶片扫描器的方法。
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公开(公告)号：US20120328781A9
公开(公告)日：2012-12-27
申请号：US12339514
申请日：2008-12-19
IPC分类号： B05D1/32
CPC分类号： H01L21/266 , G03F7/40 , H01L21/0273 , H01L21/26513
摘要： A method for implanting a dopant in a substrate is provided. A patterned photoresist mask is formed over the substrate, wherein the patterned photoresist mask has patterned photoresist mask features. A protective layer is deposited on the patterned photoresist mask by performing a cyclical deposition, wherein each cycle, comprises a depositing phase for depositing a deposition layer over surfaces of the patterned mask of photoresist material and a profile shaping phase for providing vertical sidewalls. A dopant is implanted into the substrate using an ion beam. The protective layer and photoresist mask are removed.
摘要翻译： 提供了一种用于在衬底中注入掺杂剂的方法。 图案化的光致抗蚀剂掩模形成在衬底上，其中图案化的光刻胶掩模具有图案化的光刻胶掩模特征。 通过执行循环沉积，在图案化的光致抗蚀剂掩模上沉积保护层，其中每个循环包括用于在光致抗蚀剂材料的图案化掩模的表面上沉积沉积层的沉积相和用于提供垂直侧壁的轮廓成形阶段。 使用离子束将掺杂剂注入到衬底中。 去除保护层和光刻胶掩模。
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公开(公告)号：US20120138227A1
公开(公告)日：2012-06-07
申请号：US13369651
申请日：2012-02-09
申请人： S. M. Reza Sadjadi , Amit Jain
发明人： S. M. Reza Sadjadi , Amit Jain
IPC分类号： C23F1/08
CPC分类号： H01L21/0337
摘要： A method for forming an array area with a surrounding periphery area, wherein a substrate is disposed under an etch layer, which is disposed under a patterned organic mask defining the array area and covers the entire periphery area is provided. The patterned organic mask is trimmed. An inorganic layer is deposited over the patterned organic mask where a thickness of the inorganic layer over the covered periphery area of the organic mask is greater than a thickness of the inorganic layer over the array area of the organic mask. The inorganic layer is etched back to expose the organic mask and form inorganic spacers in the array area, while leaving the organic mask in the periphery area unexposed. The organic mask exposed in the array area is stripped, while leaving the inorganic spacers in place and protecting the organic mask in the periphery area.
摘要翻译： 一种用于形成具有周围周边区域的阵列区域的方法，其中衬底设置在蚀刻层下方，其设置在限定阵列区域并覆盖整个周边区域的图案化有机掩模下方。 图案化的有机面罩被修剪。 在图案化的有机掩模上沉积无机层，其中在有机掩模的被覆盖的周边区域上的无机层的厚度大于无机层在有机掩模的阵列区域上的厚度。 将无机层回蚀刻以露出有机掩模并在阵列区域中形成无机间隔物，同时将外围区域中的有机掩模留置不暴露。 剥离在阵列区域中暴露的有机掩模，同时将无机间隔物留在适当位置并保护外围区域中的有机掩模。
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公开(公告)号：US08172948B2
公开(公告)日：2012-05-08
申请号：US11934023
申请日：2007-11-01
申请人： Dongho Heo , Jisoo Kim , S. M. Reza Sadjadi
发明人： Dongho Heo , Jisoo Kim , S. M. Reza Sadjadi
CPC分类号： H01L21/76816 , H01L21/0212 , H01L21/02274 , H01L21/0234 , H01L21/0271 , H01L21/0337 , H01L21/0338 , H01L21/31058 , H01L21/31138 , H01L21/3127 , H01L21/32139
摘要： A feature in a layer is provided. A photoresist layer is formed over the layer. The photoresist layer is patterned to form photoresist features with photoresist sidewalls, where the photoresist features have a first critical dimension. A fluorine-containing conformal layer is deposited over the sidewalls of the photoresist features to reduce the critical dimensions of the photoresist features. Fluorine is removed from the conformal layer, while the remaining conformal layer is left in place. Features are etched into the layer, wherein the layer features have a second critical dimension, which is less than the first critical dimension.
摘要翻译： 提供了一个图层中的一个特征。 在该层上形成光致抗蚀剂层。 光致抗蚀剂层被图案化以形成具有光致抗蚀剂侧壁的光致抗蚀剂特征，其中光致抗蚀剂特征具有第一临界尺寸。 在光致抗蚀剂特征的侧壁上沉积含氟共形层，以减少光致抗蚀剂特征的临界尺寸。 氟从保形层去除，而剩余的保形层留在原位。 将特征蚀刻到层中，其中层特征具有小于第一临界尺寸的第二临界尺寸。
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公开(公告)号：US07682479B2
公开(公告)日：2010-03-23
申请号：US11830761
申请日：2007-07-30
申请人： Zhi-Song Huang , S. M. Reza Sadjadi
发明人： Zhi-Song Huang , S. M. Reza Sadjadi
IPC分类号： C23F1/00 , H01L21/306 , C23C16/00
CPC分类号： H01L21/0337 , H01L21/0338
摘要： A method for forming fin structures is provided. Sacrificial structures are provided on a substrate. Fin structures are formed on the sides of the sacrificial structures. The forming of the fin structures comprises a plurality of cycles, wherein each cycle comprises a fin deposition phase and a fin profile shaping phase. The sacrificial structure is removed.
摘要翻译： 提供了一种用于形成翅片结构的方法。 牺牲结构设置在基板上。 翅片结构形成在牺牲结构的侧面上。 翅片结构的形成包括多个循环，其中每个循环包括翅片沉积阶段和翅片轮廓成形阶段。 牺牲结构被去除。
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公开(公告)号：US07629259B2
公开(公告)日：2009-12-08
申请号：US11158680
申请日：2005-06-21
申请人： S. M. Reza Sadjadi
发明人： S. M. Reza Sadjadi
IPC分类号： H01L21/302 , H01L21/461 , G06K9/00 , G01B11/00
CPC分类号： G03F7/70633 , G03F9/7011 , G03F9/7019 , G03F9/7046 , Y10S438/975
摘要： A method for aligning a reticle is provided. A first patterned layer with a first alignment grid is formed. Sidewall layers are formed over the first patterned layer to perform a first shrink. The first alignment grid after shrink is etched into an etch layer to form an etched first alignment grid. The patterned layer is removed. An optical pattern of a second alignment grid aligned over the etched first alignment grid is measured. The optical pattern is used to determine whether the second alignment grid is aligned over the etched first alignment grid.
摘要翻译： 提供了用于对准掩模版的方法。 形成具有第一对准栅格的第一图案层。 侧壁层形成在第一图案化层上以执行第一收缩。 收缩后的第一对准网格蚀刻到蚀刻层中以形成蚀刻的第一对准栅格。 去除图案层。 测量在蚀刻的第一对准栅格上对准的第二对准栅格的光学图案。 光学图案用于确定第二对准栅格是否在蚀刻的第一对准栅格上对准。
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