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    Semiconductor device and method for manufacturing the same
    41.
    发明授权
    Semiconductor device and method for manufacturing the same 有权

    公开(公告)号：US10032918B2

    公开(公告)日：2018-07-24

    申请号：US15488626

    申请日：2017-04-17

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei Yamazaki ,  Daisuke Matsubayashi ,  Ryo Tokumaru ,  Yasumasa Yamane ,  Kiyofumi Ogino ,  Taichi Endo ,  Hajime Kimura

    IPC: H01L29/78 ,  H01L29/786 ,  H01L29/66 ,  H01L27/105 ,  H01L27/12

    Abstract: A highly reliable semiconductor device is provided. The semiconductor device includes a first barrier insulating film; a first gate electrode thereover; a first gate insulating film thereover; an oxide semiconductor film thereover; source and drain electrodes over the oxide semiconductor film; a second gate insulating film over the oxide semiconductor film; a second gate electrode over the second gate insulating film; a second barrier insulating film that covers the oxide semiconductor film, the source and the drain electrodes, and the second gate electrode, and is in contact with side surfaces of the oxide semiconductor film and the source and drain electrodes; and a third barrier insulating film thereover. The first to third barrier insulating films are less likely to transmit hydrogen, water, and oxygen than the first and second gate insulating films. The third barrier insulating film is thinner than the second barrier insulating film. The source and drain electrodes each includes a conductive oxide film in contact with the oxide semiconductor film. The conductive oxide film has more oxygen vacancies than the oxide semiconductor film.

    Semiconductor device and method for manufacturing semiconductor device
    44.
    发明授权
    Semiconductor device and method for manufacturing semiconductor device 有权
    半导体装置及半导体装置的制造方法

    公开(公告)号：US09443592B2

    公开(公告)日：2016-09-13

    申请号：US14330481

    申请日：2014-07-14

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Kiyoshi Kato ,  Yasuhiko Takemura ,  Tetsuhiro Tanaka ,  Takayuki Inoue ,  Toshihiko Takeuchi ,  Yasumasa Yamane ,  Shunpei Yamazaki

    IPC: H01L21/00 ,  G11C16/04 ,  G11C16/20 ,  H01L21/28 ,  H01L27/108 ,  H01L27/115

    CPC classification number: G11C16/0466 ,  G11C16/20 ,  H01L21/28282 ,  H01L27/108 ,  H01L27/1156 ,  H01L27/11568

    Abstract: A manufacturing method of a semiconductor device in which the threshold is corrected is provided. In a semiconductor device including a plurality of transistors each includes a semiconductor, a source or drain electrode electrically connected to the semiconductor, a gate electrode, and a charge trap layer between the gate electrode and the semiconductor, electrons are trapped in the charge trap layer by performing heat treatment and, simultaneously, keeping a potential of the gate electrode higher than that of the source or drain electrode for 1 second or more. By this process, the threshold increases and Icut decreases. A circuit for supplying a signal to the gate electrode and a circuit for supplying a signal to the source or drain electrode are electrically separated from each other. The process is performed in the state where the potential of the former circuit is set higher than the potential of the latter circuit.

    Abstract translation: 提供了其中校正阈值的半导体器件的制造方法。 在包括多个晶体管的半导体器件中，每个包括半导体，与半导体电连接的源电极或漏电极，栅电极和栅电极与半导体之间的电荷陷阱层，电子被俘获在电荷陷阱层 通过进行热处理，同时保持栅电极的电位高于源电极或漏电极的电位1秒以上。 通过该过程，阈值增加并且Icut减小。 用于向栅电极提供信号的电路和用于向源电极或漏电极提供信号的电路彼此电分离。 该处理在前一电路的电位被设置为高于后一电路的电位的状态下执行。

    Semiconductor device
    45.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09397153B2

    公开(公告)日：2016-07-19

    申请号：US14486179

    申请日：2014-09-15

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Tetsuhiro Tanaka ,  Toshihiko Takeuchi ,  Yasumasa Yamane

    IPC: H01L21/8234 ,  H01L29/06 ,  H01L29/12

    CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/0607 ,  H01L29/12 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/517 ,  H01L29/66969 ,  H01L29/785 ,  H01L29/78648 ,  H01L29/78696

    Abstract: Provided is a semiconductor device having a structure with which a decrease in electrical characteristics that becomes more significant with miniaturization can be suppressed. The semiconductor device includes a first oxide semiconductor film, a gate electrode overlapping with the first oxide semiconductor film, a first gate insulating film between the first oxide semiconductor film and the gate electrode, and a second gate insulating film between the first gate insulating film and the gate electrode. In the first gate insulating film, a peak appears at a diffraction angle 2θ of around 28° by X-ray diffraction. A band gap of the first oxide semiconductor film is smaller than a band gap of the first gate insulating film, and the band gap of the first gate insulating film is smaller than a band gap of the second gate insulating film.

    Abstract translation: 提供一种半导体器件，其具有可以抑制随着小型化而变得更显着的电特性的降低的结构。 半导体器件包括第一氧化物半导体膜，与第一氧化物半导体膜重叠的栅电极，第一氧化物半导体膜和栅极之间的第一栅极绝缘膜，以及在第一栅极绝缘膜和第二栅极绝缘膜之间的第二栅极绝缘膜 栅电极。 在第一栅极绝缘膜中，以衍射角2出现峰值; 通过X射线衍射测得约为28°。 第一氧化物半导体膜的带隙小于第一栅极绝缘膜的带隙，第一栅极绝缘膜的带隙小于第二栅极绝缘膜的带隙。

    SEMICONDUCTOR DEVICE
    47.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20150187952A1

    公开(公告)日：2015-07-02

    申请号：US14580651

    申请日：2014-12-23

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei Yamazaki ,  Tetsuhiro Tanaka ,  Hideomi Suzawa ,  Yasumasa Yamane ,  Yuhei Sato ,  Sachiaki Tezuka

    IPC: H01L29/786 ,  H01L27/088 ,  H01L29/16

    CPC classification number: H01L29/7869 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/1225 ,  H01L29/16

    Abstract: To provide a transistor with stable electrical characteristics, a transistor with a low off-state current, a transistor with a high on-state current, a semiconductor device including the transistor, or a durable semiconductor device. The semiconductor device includes a first transistor using silicon, an aluminum oxide film over the first transistor, and a second transistor using an oxide semiconductor over the aluminum oxide film. The oxide semiconductor has a lower hydrogen concentration than silicon.

    Abstract translation: 为了提供具有稳定电特性的晶体管，具有低截止电流的晶体管，具有高导通电流的晶体管，包括晶体管的半导体器件或耐用的半导体器件。 半导体器件包括使用硅的第一晶体管，在第一晶体管上的氧化铝膜，以及在氧化铝膜上使用氧化物半导体的第二晶体管。 氧化物半导体的氢浓度低于硅。

    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    48.
    发明申请
    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号：US20150179774A1

    公开(公告)日：2015-06-25

    申请号：US14570422

    申请日：2014-12-15

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei Yamazaki ,  Naoto Yamade ,  Yoshitaka Yamamoto ,  Hideomi Suzawa ,  Masayuki Sakakura ,  Yuhei Sato ,  Yasumasa Yamane

    IPC: H01L29/66 ,  H01L21/02 ,  H01L21/383 ,  H01L21/465 ,  H01L21/441 ,  H01L21/425 ,  H01L29/786 ,  H01L21/477

    CPC classification number: H01L29/66969 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/383 ,  H01L21/425 ,  H01L21/441 ,  H01L21/465 ,  H01L21/477 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

    Abstract: The semiconductor device is manufactured by the following method. A first oxide semiconductor film is formed over a first gate electrode and a first insulating film, oxygen is added to the first oxide semiconductor film, and then a second oxide semiconductor film is formed over the first oxide semiconductor film. Then, heat treatment is performed. Next, part of the first insulating film, part of the first oxide semiconductor film, and part of the second oxide semiconductor film are etched to form a first gate insulating film having a projection. Next, a pair of electrodes is formed over the second oxide semiconductor film, and a third oxide semiconductor film is formed over the second oxide semiconductor film and the pair of electrodes. Then, a second gate insulating film is formed over the third oxide semiconductor film, and a second gate electrode is formed over the second gate insulating film.

    Abstract translation: 半导体器件通过以下方法制造。 在第一栅电极和第一绝缘膜上形成第一氧化物半导体膜，在第一氧化物半导体膜上添加氧，然后在第一氧化物半导体膜上形成第二氧化物半导体膜。 然后进行热处理。 接下来，蚀刻第一绝缘膜的一部分，第一氧化物半导体膜的一部分和第二氧化物半导体膜的一部分，以形成具有突起的第一栅极绝缘膜。 接着，在第二氧化物半导体膜上形成一对电极，在第二氧化物半导体膜和一对电极上形成第三氧化物半导体膜。 然后，在第三氧化物半导体膜上形成第二栅极绝缘膜，在第二栅极绝缘膜上形成第二栅电极。

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