公开(公告)号：US20050212129A1

公开(公告)日：2005-09-29

申请号：US10974293

申请日：2004-10-26

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

IPC分类号： H01L21/44 ,  H01L21/56 ,  H01L21/60 ,  H01L23/31 ,  H01L23/52 ,  H01L23/538

CPC分类号： H01L23/3128 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/97 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor package with a build-up structure is provided, which includes a rigid base, a rigid frame having a through hole and fixed onto the rigid base, at least one chip received in the through hole of the rigid frame, a medium filled in a gap between the chip and the rigid frame, a build-up structure formed on the chip and the rigid frame and electrically connected to the chip, and a plurality of conductive elements bonded to the build-up structure to electrically connect the chip to external devices. The use of the rigid base and rigid frame can avoid structural warpage, cracking, delamination and a popcorn effect of the semiconductor package. A method for fabricating the semiconductor package is also provided.

摘要翻译： 提供具有积聚结构的半导体封装，其包括刚性基座，具有通孔并固定到刚性基座上的刚性框架，容纳在刚性框架的通孔中的至少一个芯片，填充在 芯片和刚性框架之间的间隙，形成在芯片上的积聚结构和刚性框架并电连接到芯片，以及多个导电元件，其结合到构建结构以将芯片电连接到外部 设备。 使用刚性基体和刚性框架可以避免半导体封装的结构翘曲，开裂，分层和爆米花效应。 还提供了制造半导体封装的方法。

公开(公告)号：US20050161755A1

公开(公告)日：2005-07-28

申请号：US10763656

申请日：2004-01-23

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

IPC分类号： H01L27/146 ,  H01L31/0203

CPC分类号： H01L31/0203 ,  H01L27/14618 ,  H01L2224/04042 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor package with a photosensitive chip and a fabrication method thereof are provided. A substrate having a core is prepared. A solder mask layer is applied over a surface of the core and formed with an opening to expose a continuous peripheral portion on the surface of the core. At least one photosensitive chip is mounted on and electrically connected to the substrate. An encapsulation dam is formed on the continuous peripheral portion of the core and surrounds the chip. The dam includes a shoulder portion adjacent to and flush with the solder mask layer, and a protruded support portion surrounding the shoulder portion. A lid is attached to the support portion of the dam for sealing the dam such that the chip is received in a space defined by the substrate, the dam and the lid.

摘要翻译： 提供具有感光芯片的半导体封装及其制造方法。 制备具有芯的衬底。 将焊接掩模层施加在芯的表面上并形成有开口以暴露芯的表面上的连续周边部分。 至少一个感光芯片安装在基板上并与其电连接。 在芯的连续外围部分上形成封装坝，并围绕芯片。 大坝包括与焊料掩模层相邻并与其齐平的肩部，以及围绕肩部的突出的支撑部。 盖子附接到坝的支撑部分，用于密封坝，使得芯片被容纳在由基板，坝和盖子限定的空间中。

公开(公告)号：US08618641B2

公开(公告)日：2013-12-31

申请号：US12228379

申请日：2008-08-11

申请人： Chang-Yueh Chan ,  Chih-Ming Huang ,  Chun-Yuan Li ,  Chih-Hsin Lai

发明人： Chang-Yueh Chan ,  Chih-Ming Huang ,  Chun-Yuan Li ,  Chih-Hsin Lai

IPC分类号： H01L23/495

CPC分类号： H01L24/89 ,  H01L21/561 ,  H01L23/49531 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49109 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A semiconductor package and a method for fabricating the same are provided. A leadframe including a die pad and a plurality of peripheral leads is provided. A carrier, having a plurality of connecting pads formed thereon, is attached to the die pad, wherein a planar size of the carrier is greater than that of the die pad, allowing the connecting pads on the carrier to be exposed from the die pad. At least a semiconductor chip is attached to a side of an assembly including the die pad and the carrier, and is electrically connected to the connecting pads of the carrier and the leads via bonding wires. A package encapsulant encapsulates the semiconductor chip, the bonding wires, a part of the carrier and a part of the leadframe, allowing a bottom surface of the carrier and a part of the leads to be exposed from the package encapsulant.

摘要翻译： 提供半导体封装及其制造方法。 提供了包括管芯焊盘和多个外围引线的引线框架。 具有形成在其上的多个连接焊盘的载体被附接到管芯焊盘，其中载体的平面尺寸大于管芯焊盘的平面尺寸，允许载体上的连接焊盘从裸片焊盘露出。 至少一个半导体芯片附着到包括芯片焊盘和载体的组件的一侧，并通过接合线电连接到载体和引线的连接焊盘。 封装密​​封剂封装半导体芯片，接合线，载体的一部分和引线框架的一部分，允许载体的底表面和引线的一部分从封装密封剂暴露。

公开(公告)号：US20110177643A1

公开(公告)日：2011-07-21

申请号：US12769087

申请日：2010-04-28

申请人： Chi-Hsin Chiu ,  Chih-Ming Huang ,  Chang-Yueh Chan ,  Hsin-Yi Liao ,  Chun-Chi Ke

发明人： Chi-Hsin Chiu ,  Chih-Ming Huang ,  Chang-Yueh Chan ,  Hsin-Yi Liao ,  Chun-Chi Ke

IPC分类号： H01L21/56 ,  H01L21/60

CPC分类号： B81B7/0064 ,  B81B7/007 ,  B81B2207/095 ,  H01L21/56 ,  H01L23/315 ,  H01L23/552 ,  H01L24/48 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A fabrication method of a package structure having at least an MEMS element is provided, including: preparing a wafer having electrical connection pads and the at least an MEMS element; disposing lids for covering the at least an MEMS element, the lids having a metal layer formed thereon; electrically connecting the electrical connection pads and the metal layer with bonding wires; forming an encapsulant for covering the lids, bonding wires, electrical connection pads and metal layer; removing portions of the encapsulant to separate the bonding wires each into first and second sub-bonding wires, wherein top ends of the first and second sub-bonding wires are exposed, the first sub-bonding wires electrically connecting to the electrical connection pads, and the second sub-bonding wires electrically connecting to the metal layer; forming metallic traces on the encapsulant for electrically connecting to the first sub-bonding wires; forming bumps on the metallic traces; and performing a singulation process.

摘要翻译： 提供具有至少MEMS元件的封装结构的制造方法，包括：制备具有电连接焊盘和所述至少MEMS元件的晶片; 设置用于覆盖所述至少一个MEMS元件的盖，所述盖具有在其上形成的金属层; 电连接焊盘和金属层与接合线; 形成用于覆盖盖子，接合线，电连接垫和金属层的密封剂; 去除所述密封剂的部分以将所述接合线分别分离成第一和第二子接合线，其中所述第一和第二次接合线的顶端被暴露，所述第一子接合线电连接到所述电连接焊盘，以及 所述第二子接合线电连接到所述金属层; 在所述密封剂上形成用于电连接到所述第一子接合线的金属迹线; 在金属痕迹上形成凸块; 并执行单独处理。

公开(公告)号：US20110175179A1

公开(公告)日：2011-07-21

申请号：US12769993

申请日：2010-04-29

申请人： Chi-Hsin Chiu ,  Chih-Ming Huang ,  Chang-Yueh Chan ,  Hsin-Yi Liao ,  Chun-Chi Ke

发明人： Chi-Hsin Chiu ,  Chih-Ming Huang ,  Chang-Yueh Chan ,  Hsin-Yi Liao ,  Chun-Chi Ke

IPC分类号： H01L29/84 ,  H01L23/52

CPC分类号： B81B7/0064 ,  B81B7/007 ,  B81B2207/095 ,  H01L21/56 ,  H01L23/315 ,  H01L23/552 ,  H01L24/48 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package structure having at least an MEMS element is provided, including a chip having electrical connecting pads and the MEMS element; a lid disposed on the chip to cover the MEMS element and having a metal layer provided thereon; first sub-bonding wires electrically connecting to the electrical connecting pads; second sub-bonding wires electrically connecting to the metal layer; an encapsulant disposed on the chip, wherein the top ends of the first and second sub-bonding wires are exposed from the encapsulant; and metallic traces disposed on the encapsulant and electrically connecting to the first sub-bonding wires. The package structure advantageously features reduced size, relatively low costs, diverse bump locations, and an enhanced EMI shielding effect.

摘要翻译： 提供具有至少MEMS元件的封装结构，其包括具有电连接焊盘和MEMS元件的芯片; 设置在所述芯片上以覆盖所述MEMS元件并且具有设置在其上的金属层的盖; 电连接到电连接焊盘的第一子接合线; 电连接到金属层的第二子接合线; 设置在所述芯片上的密封剂，其中所述第一和第二子接合线的顶端从所述密封剂露出; 以及设置在密封剂上并电连接到第一子接合线的金属迹线。 封装结构有利地具有减小的尺寸，相对低的成本，不同的凸起位置和增强的EMI屏蔽效果。

公开(公告)号：US08420430B2

公开(公告)日：2013-04-16

申请号：US12769087

申请日：2010-04-28

申请人： Chi-Hsin Chiu ,  Chih-Ming Huang ,  Chang-Yueh Chan ,  Hsin-Yi Liao ,  Chun-Chi Ke

发明人： Chi-Hsin Chiu ,  Chih-Ming Huang ,  Chang-Yueh Chan ,  Hsin-Yi Liao ,  Chun-Chi Ke

IPC分类号： H01L21/56 ,  H01L21/60

CPC分类号： B81B7/0064 ,  B81B7/007 ,  B81B2207/095 ,  H01L21/56 ,  H01L23/315 ,  H01L23/552 ,  H01L24/48 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A fabrication method of a package structure having at least an MEMS element is provided, including: preparing a wafer having electrical connection pads and the at least an MEMS element; disposing lids for covering the at least an MEMS element, the lids having a metal layer formed thereon; electrically connecting the electrical connection pads and the metal layer with bonding wires; forming an encapsulant for covering the lids, bonding wires, electrical connection pads and metal layer; removing portions of the encapsulant to separate the bonding wires each into first and second sub-bonding wires, wherein top ends of the first and second sub-bonding wires are exposed, the first sub-bonding wires electrically connecting to the electrical connection pads, and the second sub-bonding wires electrically connecting to the metal layer; forming metallic traces on the encapsulant for electrically connecting to the first sub-bonding wires; forming bumps on the metallic traces; and performing a singulation process.

摘要翻译： 提供具有至少MEMS元件的封装结构的制造方法，包括：制备具有电连接焊盘和所述至少MEMS元件的晶片; 设置用于覆盖所述至少一个MEMS元件的盖，所述盖具有在其上形成的金属层; 电连接焊盘和金属层与接合线; 形成用于覆盖盖子，接合线，电连接垫和金属层的密封剂; 去除所述密封剂的部分以将所述接合线分别分离成第一和第二子接合线，其中所述第一和第二次接合线的顶端被暴露，所述第一子接合线电连接到所述电连接焊盘，以及 所述第二子接合线电连接到所述金属层; 在所述密封剂上形成用于电连接到所述第一子接合线的金属迹线; 在金属痕迹上形成凸块; 并执行单独处理。

公开(公告)号：US08866236B2

公开(公告)日：2014-10-21

申请号：US12769993

申请日：2010-04-29

申请人： Chi-Hsin Chiu ,  Chih-Ming Huang ,  Chang-Yueh Chan ,  Hsin-Yi Liao ,  Chun-Chi Ke

发明人： Chi-Hsin Chiu ,  Chih-Ming Huang ,  Chang-Yueh Chan ,  Hsin-Yi Liao ,  Chun-Chi Ke

IPC分类号： H01L29/84 ,  H01L23/31 ,  H01L21/56 ,  B81B7/00 ,  H01L23/552 ,  H01L23/00

CPC分类号： B81B7/0064 ,  B81B7/007 ,  B81B2207/095 ,  H01L21/56 ,  H01L23/315 ,  H01L23/552 ,  H01L24/48 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package structure having at least an MEMS element is provided, including a chip having electrical connecting pads and the MEMS element; a lid disposed on the chip to cover the MEMS element and having a metal layer provided thereon; first sub-bonding wires electrically connecting to the electrical connecting pads; second sub-bonding wires electrically connecting to the metal layer; an encapsulant disposed on the chip, wherein the top ends of the first and second sub-bonding wires are exposed from the encapsulant; and metallic traces disposed on the encapsulant and electrically connecting to the first sub-bonding wires. The package structure advantageously features reduced size, relatively low costs, diverse bump locations, and an enhanced EMI shielding effect.

摘要翻译： 提供具有至少MEMS元件的封装结构，其包括具有电连接焊盘和MEMS元件的芯片; 设置在所述芯片上以覆盖所述MEMS元件并且具有设置在其上的金属层的盖; 电连接到电连接焊盘的第一子接合线; 电连接到金属层的第二子接合线; 设置在所述芯片上的密封剂，其中所述第一和第二子接合线的顶端从所述密封剂露出; 以及设置在密封剂上并电连接到第一子接合线的金属迹线。 封装结构有利地具有减小的尺寸，相对低的成本，不同的凸起位置和增强的EMI屏蔽效果。

公开(公告)号：US20090039488A1

公开(公告)日：2009-02-12

申请号：US12228379

申请日：2008-08-11

申请人： Chang-Yueh Chan ,  Chih-Ming Huang ,  Chun-Yuan Li ,  Chih-Hsin Lai

发明人： Chang-Yueh Chan ,  Chih-Ming Huang ,  Chun-Yuan Li ,  Chih-Hsin Lai

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L24/89 ,  H01L21/561 ,  H01L23/49531 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49109 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A semiconductor package and a method for fabricating the same are provided. A leadframe including a die pad and a plurality of peripheral leads is provided. A carrier, having a plurality of connecting pads formed thereon, is attached to the die pad, wherein a planar size of the carrier is greater than that of the die pad, allowing the connecting pads on the carrier to be exposed from the die pad. At least a semiconductor chip is attached to a side of an assembly including the die pad and the carrier, and is electrically connected to the connecting pads of the carrier and the leads via bonding wires. A package encapsulant encapsulates the semiconductor chip, the bonding wires, a part of the carrier and a part of the leadframe, allowing a bottom surface of the carrier and a part of the leads to be exposed from the package encapsulant.

摘要翻译： 提供半导体封装及其制造方法。 提供了包括管芯焊盘和多个外围引线的引线框架。 具有形成在其上的多个连接焊盘的载体被附接到管芯焊盘，其中载体的平面尺寸大于管芯焊盘的平面尺寸，允许载体上的连接焊盘从裸片焊盘露出。 至少一个半导体芯片附着到包括芯片焊盘和载体的组件的一侧，并通过接合线电连接到载体和引线的连接焊盘。 封装密​​封剂封装半导体芯片，接合线，载体的一部分和引线框架的一部分，允许载体的底表面和引线的一部分从封装密封剂暴露。

公开(公告)号：US06963135B2

公开(公告)日：2005-11-08

申请号：US10816339

申请日：2004-03-31

申请人： Cheng-Chian Chiang ,  Chih-Ming Huang ,  Chin-Huang Chang ,  Cheng-Hsu Hsiao ,  Min-Nan Tsai

发明人： Cheng-Chian Chiang ,  Chih-Ming Huang ,  Chin-Huang Chang ,  Cheng-Hsu Hsiao ,  Min-Nan Tsai

IPC分类号： G11C5/04 ,  H01L23/31 ,  H01L23/538 ,  H01L25/065 ,  H01L25/10 ,  H01L23/34

CPC分类号： H01L23/3121 ,  G11C5/04 ,  H01L23/5388 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A semiconductor package includes two substrates each having a plurality of electrical connection pads, at least one chip mounted on each of the substrates, an encapsulation body formed on each of the substrates for encapsulating the chip, and an cover for receiving the substrates and the chips therein. The chip is electrically connected to the electrical connection pads. The electrical connection pads are exposed from the cover and located on the same surface or oppositely arranged. The substrates and the cover each substantially has a rectangular shape, with a longer side of each of the substrates being vertical to a longer side of the cover. The semiconductor package is incorporated with multiple chips to enhance the performance and memory capacity thereof, and the substrates are smaller than those in the prior art and thus are more cost-effective to fabricate.

摘要翻译： 半导体封装包括两个基板，每个基板具有多个电连接焊盘，安装在每个基板上的至少一个芯片，形成在每个基板上的封装体，用于封装芯片;以及盖，用于接收基板和芯片 其中。 芯片电连接到电连接焊盘。 电连接垫从盖子露出并位于相同的表面上或相对布置。 基板和盖子基本上具有矩形形状，每个基板的较长边与盖的较长边垂直。 半导体封装结合有多个芯片以提高其性能和存储器容量，并且衬底小于现有技术中的衬底，因此制造更具成本效益。

公开(公告)号：USD493799S1

公开(公告)日：2004-08-03

申请号：US29195995

申请日：2003-12-18

申请人： Cheng-Chia Chiang ,  Chih-Ming Huang ,  Chin-Huang Chang ,  Cheng-Hsu Hsiao ,  Min-Nan Tsai

设计人： Cheng-Chia Chiang ,  Chih-Ming Huang ,  Chin-Huang Chang ,  Cheng-Hsu Hsiao ,  Min-Nan Tsai