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    Sensor semiconductor device and method for fabricating the same
    6.
    发明申请
    Sensor semiconductor device and method for fabricating the same 审中-公开
    传感器半导体器件及其制造方法

    公开(公告)号：US20090057799A1

    公开(公告)日：2009-03-05

    申请号：US12229651

    申请日：2008-08-26

    申请人： Chang-Yueh Chan ,  Chih-Ming Huang ,  Chien-Ping Huang ,  Chin-Huang Chang ,  Cheng-Hsu Hsiao

    发明人： Chang-Yueh Chan ,  Chih-Ming Huang ,  Chien-Ping Huang ,  Chin-Huang Chang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L31/00 ,  H01L21/00

    CPC分类号： H01L31/0203 ,  H01L31/02164 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/1815 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A sensor semiconductor device and a method for fabricating the same are provided. At least one sensor chip is mounted and electrically connected to a lead frame. A first and a second encapsulation molding processes are sequentially performed to form a transparent encapsulant for encapsulating the sensor chip and a part of the lead frame and to form a light-impervious encapsulant for encapsulating the transparent encapsulant. The transparent encapsulant has a light-pervious portion formed at a position corresponding to and above a sensor zone of the sensor chip. The light-pervious portion is exposed from the light-impervious encapsulant. Light may penetrate the light-pervious portion, without using an additional cover board, thereby reducing manufacturing steps and costs. The above arrangement avoids prior-art problems of poor reliability caused by a porous encapsulant and poor signal reception caused by interference of ambient light entering into a conventional chip only encapsulated by a transparent encapsulant.

    摘要翻译： 提供一种传感器半导体器件及其制造方法。 至少一个传感器芯片被安装并电连接到引线框架。 依次执行第一和第二封装成型工艺以形成用于封装传感器芯片和引线框架的一部分的透明密封剂，并形成用于封装透明密封剂的不透光密封剂。 透明密封剂具有形成在对应于传感器芯片的传感器区域上方的位置处的透光部分。 透光部分从不透光的密封剂暴露出来。 光可以穿透透光部分，而不使用附加的盖板，从而减少制造步骤和成本。 上述布置避免了由多孔密封剂引起的可靠性差的现有技术问题，以及由仅通过透明密封剂封装的传统芯片的环境光的干扰引起的差信号接收。

    Stackable semiconductor device and manufacturing method thereof
    7.
    发明申请
    Stackable semiconductor device and manufacturing method thereof 审中-公开
    可堆叠半导体器件及其制造方法

    公开(公告)号：US20080251937A1

    公开(公告)日：2008-10-16

    申请号：US12082724

    申请日：2008-04-11

    申请人： Chin-Huang Chang ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

    发明人： Chin-Huang Chang ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/52 ,  H01L21/00

    CPC分类号： H01L21/76898 ,  H01L25/0657 ,  H01L2224/48091 ,  H01L2225/06513 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2924/00014

    摘要： A stackable semiconductor device and a manufacturing method thereof are disclosed. The method includes providing a wafer comprised of a plurality of chips, wherein a plurality of solder pads are formed on the active surface of each chip, and a plurality of grooves are formed between the solder pads of any two adjacent ones of the chips; forming a dielectric layer on regions between the solder pads of any two adjacent ones of the chips ; forming a metal layer on the dielectric layer electrically connected to the solder pads and forming a connective layer on the metal layer, wherein the width of the connective layer is smaller than that of the metal layer; cutting along the grooves to break off the electrical connection between adjacent chips; thinning the non-active surface of the wafer to the extent that the metal layer is exposed from the wafer; and separating the chips to form a plurality of stackable semiconductor devices. Accordingly, a multi-chip stack structure can be obtained by stacking and electrically connecting a plurality of semiconductor devices through the electrical connection between the connective layer of a semiconductor device and the metal layer of another semiconductor device, thereby effectively integrating more chips without having to increase the stacking area, and further the problems of poor electrical connection, complicated manufacturing processes and high costs known in the prior art can be avoided.

    摘要翻译： 公开了一种可堆叠半导体器件及其制造方法。 该方法包括提供由多个芯片组成的晶片，其中在每个芯片的有源表面上形成多个焊盘，并且在任何两个相邻芯片的焊盘之间形成多个沟槽; 在任何两个相邻芯片的焊盘之间的区域上形成电介质层; 在与所述焊料焊盘电连接的所述电介质层上形成金属层，并在所述金属层上形成连接层，其中所述连接层的宽度小于所述金属层的宽度; 沿着凹槽切割以破坏相邻芯片之间的电连接; 使晶片的非活性表面变薄至金属层从晶片露出的程度; 并分离所述芯片以形成多个可堆叠半导体器件。 因此，通过半导体器件的连接层与另一半导体器件的金属层之间的电连接层叠并电连接多个半导体器件，可以获得多芯片堆叠结构，从而有效地集成更多的芯片，而不必 增加堆积面积，进一步避免了现有技术中已知的电连接不良，制造工艺复杂，成本高的问题。

    Multi-chip stack structure and fabricating method thereof
    9.
    发明申请
    Multi-chip stack structure and fabricating method thereof 审中-公开
    多芯片堆叠结构及其制造方法

    公开(公告)号：US20090014860A1

    公开(公告)日：2009-01-15

    申请号：US12011832

    申请日：2008-01-29

    申请人： Chung-Lun Liu ,  Jung-Pin Huang ,  Chin-Huang Chang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

    发明人： Chung-Lun Liu ,  Jung-Pin Huang ,  Chin-Huang Chang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L21/00 ,  H01L23/02

    CPC分类号： H01L25/0652 ,  H01L25/18 ,  H01L2224/32145 ,  H01L2224/48227 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/06562 ,  H01L2924/00012

    摘要： A multi-chip stack structure and a manufacturing method thereof are provided. The fabrication method includes the steps of: providing a chip carrier having a first surface and a second surface opposing thereto and at least a first chip and a second chip mounted on the first surface; electrically connecting the chips to the chip carrier by a plurality of bonding wires; and stacking at least a third chip on the first and second chips by a film deposed therebetween, wherein the third chip is stepwise stacked on the first chip and at least a part of the bonding wire connected to the second chip is covered by the film, and electrically connecting the third chip and the chip carrier by a bonding wire, thereby enabling a plurality of chips to be stacked on the chip carrier to enhance the electrical performance of electronic products.

    摘要翻译： 提供了一种多芯片堆叠结构及其制造方法。 该制造方法包括以下步骤：提供具有与其相对的第一表面和第二表面的芯片载体和至少安装在第一表面上的第一芯片和第二芯片; 通过多个接合线将芯片电连接到芯片载体上; 并且通过其间放置的膜将第一和第二芯片上的至少第三芯片堆叠起来，其中第三芯片逐步堆叠在第一芯片上，并且连接到第二芯片的键合线的至少一部分被膜覆盖， 并通过接合线电连接第三芯片和芯片载体，从而能够将多个芯片堆叠在芯片载体上，以增强电子产品的电气性能。

    Sensor module structure and method for fabricating the same
    10.
    发明申请
    Sensor module structure and method for fabricating the same 审中-公开
    传感器模块结构及其制造方法

    公开(公告)号：US20060223216A1

    公开(公告)日：2006-10-05

    申请号：US11208269

    申请日：2005-08-18

    申请人： Chin-Huang Chang ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Yi Chang ,  Cheng-Hsu Hsiao

    发明人： Chin-Huang Chang ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Yi Chang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L21/00 ,  H01L23/495

    CPC分类号： H01L27/14618 ,  H01L24/97 ,  H01L25/167 ,  H01L27/14625 ,  H01L27/14683 ,  H01L2224/32225 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A sensor module structure and a method for fabricating the same are proposed. A chip carrier module plate including a plurality of chip carriers is provided, each chip carrier having a first surface and a second surface. At least one semiconductor chip is mounted on and electrically connected to the first surface of each of the chip carriers. An encapsulation body is formed for completely encapsulating the semiconductor chips and the first surfaces of the chip carriers. A singulation process is performed to form individual package units integrated with the semiconductor chips. A sensor chip, a corresponding lens kit and a flexible printed circuit (FPC) board are attached to the second surface of each of the chip carriers, wherein the sensor chip and the FPC board are electrically connected to the chip carrier. This provides the sensor module structure fabricated with simple processes, low costs and high yields.

    摘要翻译： 提出了一种传感器模块结构及其制造方法。 提供了包括多个芯片载体的芯片载体模块板，每个芯片载体具有第一表面和第二表面。 至少一个半导体芯片安装在每个芯片载体的第一表面上并电连接到每个芯片载体的第一表面。 形成用于完全封装半导体芯片和芯片载体的第一表面的封装体。 执行单个处理以形成与半导体芯片集成的单个封装单元。 传感器芯片，相应的透镜套件和柔性印刷电路板（FPC）板安装在每个芯片载体的第二表面上，其中传感器芯片和FPC基板电连接到芯片载体。 这提供了以简单的工艺制造的传感器模块结构，低成本和高产量。