公开(公告)号：US20240194784A1

公开(公告)日：2024-06-13

申请号：US18584282

申请日：2024-02-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Gulbagh SINGH ,  Hsin-Chi Chen ,  Kun-Tsang Chuang

IPC分类号： H01L29/78 ,  H01L21/02 ,  H01L21/265 ,  H01L21/3065 ,  H01L21/762

CPC分类号： H01L29/7846 ,  H01L21/02532 ,  H01L21/26513 ,  H01L21/3065 ,  H01L21/76237

摘要： The present disclosure describes a method that mitigates the formation of facets in source/drain silicon germanium (SiGe) epitaxial layers. The method includes forming an isolation region around a semiconductor layer and a gate structure partially over the semiconductor layer and the isolation region. Disposing first photoresist structures over the gate structure, a portion of the isolation region, and a portion of the semiconductor layer and doping, with germanium (Ge), exposed portions of the semiconductor layer and exposed portions of the isolation region to form Ge-doped regions that extend from the semiconductor layer to the isolation region. The method further includes disposing second photoresist structures over the isolation region and etching exposed Ge-doped regions in the semiconductor layer to form openings, where the openings include at least one common sidewall with the Ge-doped regions in the isolation region. Finally the method includes growing a SiGe epitaxial stack in the openings.

公开(公告)号：US20240194500A1

公开(公告)日：2024-06-13

申请号：US18536378

申请日：2023-12-12

申请人： SEMES CO., LTD.

发明人： Seonggil Lee ,  Wanjae Park ,  Dongsub Oh ,  Myoungsub Noh ,  Hyejoon Kheel

IPC分类号： H01L21/67 ,  H01J37/32 ,  H01L21/3065

CPC分类号： H01L21/67069 ,  H01J37/32449 ,  H01J37/32477 ,  H01L21/3065 ,  H01L21/67248 ,  H01J2237/334

摘要： A substrate processing apparatus includes a plasma space, a processing space, a first gas supplier configured to supply first source gas to the plasma space, and a second gas supplier configured to supply second process gas to the processing space. The first source gas supplies first process gas for etching a first etch target layer in the processing space. The second process gas etches a second etch target layer in the processing space. The first gas supplier and the second gas supplier are separated from each other.

公开(公告)号：US20240194452A1

公开(公告)日：2024-06-13

申请号：US18584816

申请日：2024-02-22

申请人： Advanced Energy Industries, Inc.

发明人： Maneesh Kumar Singh

IPC分类号： H01J37/32 ,  H01J37/305 ,  H01L21/3065 ,  H01L21/67 ,  H05H1/24

CPC分类号： H01J37/32284 ,  H01J37/3053 ,  H01L21/3065 ,  H01L21/67069 ,  H05H1/24

摘要： Bias supplies and plasma processing systems are disclosed. One bias supply comprises an output node, a return node, and a power section coupled to the output node and the return node. A resonant switch section is coupled to the power section at a first node, a second node, and a third node wherein the resonant switch section is configured to connect and disconnect a current pathway between the first node and the second node to apply an asymmetric periodic voltage waveform at the output node relative to the return node. The asymmetric periodic voltage waveform includes a first portion that begins with a first negative voltage and changes to a positive peak voltage, a second portion that changes from the positive peak voltage level to a third voltage level and a fourth portion that includes a negative voltage ramp from the third voltage level to a fourth voltage level.

公开(公告)号：US20240186119A1

公开(公告)日：2024-06-06

申请号：US18524015

申请日：2023-11-30

申请人： Tokyo Electron Limited

发明人： Makoto ISHITSUBO

IPC分类号： H01J37/32 ,  H01L21/3065

CPC分类号： H01J37/32449 ,  H01J37/32091 ,  H01J37/32174 ,  H01L21/3065

摘要： A substrate processing apparatus includes: a processing container having a processing space; a gas supply mechanism for supplying a reaction gas to the processing space; a shower head which is arranged in the processing space and discharges the reaction gas into the processing space; a stage which is arranged to face the shower head in the processing space, the stage and the shower head being configured to constitute parallel flat-plate electrodes; a first radio-frequency power supply which is connected to either the shower head or the stage and supplies first radio-frequency power to generate a plasma of the reaction gas between the electrodes; a second radio-frequency power supply for supplying second radio-frequency power to the plasma; and an analyzer for acquiring a mixed wave of the first and second radio-frequency powers and analyzing a state of the plasma based on a result of measuring a power level of the mixed wave.

公开(公告)号：US20240178271A1

公开(公告)日：2024-05-30

申请号：US18433217

申请日：2024-02-05

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Feng-Ching Chu ,  Wei-Yang Lee ,  Yen-Ming Chen ,  Feng-Cheng Yang

IPC分类号： H01L29/06 ,  H01L21/02 ,  H01L21/306 ,  H01L21/3065 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/0653 ,  H01L21/02057 ,  H01L21/02227 ,  H01L21/30604 ,  H01L29/0847 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7851 ,  H01L21/3065

摘要： Various examples of an integrated circuit device and a method for forming the device are disclosed herein. In an example, a method includes receiving a workpiece that includes a substrate, and a device fin extending above the substrate. The device fin includes a channel region. A portion of the device fin adjacent the channel region is etched, and the etching creates a source/drain recess and forms a dielectric barrier within the source/drain recess. The workpiece is cleaned such that a bottommost portion of the dielectric barrier remains within a bottommost portion of the source/drain recess. A source/drain feature is formed within the source/drain recess such that the bottommost portion of the dielectric barrier is disposed between the source/drain feature and a remainder of the device fin.

公开(公告)号：US11996291B2

公开(公告)日：2024-05-28

申请号：US17850867

申请日：2022-06-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Cheng-Hsien Wu

IPC分类号： H01L21/225 ,  H01L21/762 ,  H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L21/3065

CPC分类号： H01L21/2254 ,  H01L21/76224 ,  H01L29/66795 ,  H01L29/785 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02631 ,  H01L21/3065

摘要： A method for manufacturing a semiconductor device is provided. The method includes depositing a germanium layer over a silicon substrate; forming an oxide capping layer over the germanium layer; after forming the oxide capping layer, annealing the germanium layer to diffuse germanium atoms of the germanium layer into the silicon substrate, such that a portion of the silicon substrate is turned into a silicon germanium layer; and forming a gate structure over the silicon germanium layer.

公开(公告)号：US20240170332A1

公开(公告)日：2024-05-23

申请号：US18420779

申请日：2024-01-24

申请人： UNITED MICROELECTRONICS CORP.

发明人： Wei-Ren Huang ,  Chen-Hsiao Wang ,  Kai-Kuang Ho

IPC分类号： H01L21/78 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/311 ,  H01L21/66

CPC分类号： H01L21/78 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/31144 ,  H01L22/32

摘要： A wafer with a test structure includes a wafer with a front side and a back side. A first die, a second die, a third die and a scribe line are disposed on the wafer. The scribe line is positioned between the dice. The first die includes a first dielectric layer and a first metal connection disposed within and on the first dielectric layer. A test structure and a dielectric layer are disposed on the scribe line, wherein the test structure is on the dielectric layer. Two first trenches are respectively disposed between the first dielectric layer and the dielectric layer and disposed at one side of the dielectric layer. Two second trenches penetrate the wafer, and each of the two second trenches respectively connects to a corresponding one of the two first trenches. A grinding tape covers the front side of the wafer and contacts the test structure.

公开(公告)号：US20240170295A1

公开(公告)日：2024-05-23

申请号：US18090955

申请日：2022-12-29

申请人： YANGTZE MEMORY TECHNOLOGIES CO., LTD.

发明人： Guoliang Chen ,  Mengyong Liu ,  Yang Liu ,  Junqing He

IPC分类号： H01L21/3065 ,  H01J37/32 ,  H01L21/477 ,  H01L21/67

CPC分类号： H01L21/3065 ,  H01J37/32449 ,  H01L21/477 ,  H01L21/67023

摘要： A semiconductor structure includes a first semiconductor structure and a second semiconductor structure. The method of bonding a semiconductor structure includes performing a surface treatment on a first surface of the first semiconductor structure and a second surface of the second semiconductor structure based on a first gas and a second gas. The first gas excites at least one of the first surface or the second surface to generate a free radical. The second gas is excited to generate a plasma gas. A free negative ion in the plasma gas is combined with the free radical. The method also includes performing a face-to-face bonding on the first surface and the second surface.

公开(公告)号：US20240168371A1

公开(公告)日：2024-05-23

申请号：US18165759

申请日：2023-02-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Da Huang ,  Chun-Fu Kuo ,  Yi Hsing Yu ,  Li-Te Lin

IPC分类号： G03F1/68 ,  G03F1/48 ,  G03F7/004 ,  G03F7/075 ,  H01L21/3065

CPC分类号： G03F1/68 ,  G03F1/48 ,  G03F7/0043 ,  G03F7/075 ,  H01L21/3065

摘要： Disclosed is a method of manufacturing a semiconductor device. The method includes forming a patterned hardmask over an underlying target layer on a substrate; and performing plasma fabrication operations in parallel on the patterned hardmask and underlying target layer in a plasma etching chamber using a plasma etch gas and a selective source gas. The plasma operations include forming a protective cap on the patterned hardmask; and removing portions of the underlying layer that are not covered by the patterned hardmask. In various embodiments, the selective source gas includes a chemical compound that includes a halogen gas that can be dissociated into a metal and a halogen, and the plasma operations include dissociating the metal and the halogen in the selective source gas and forming a protective cap on the patterned hardmask using the metal that has been dissociated.

公开(公告)号：US11990530B2

公开(公告)日：2024-05-21

申请号：US18317165

申请日：2023-05-15

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Jingyun Zhang ,  Choonghyun Lee ,  Chun Wing Yeung ,  Robin Hsin Kuo Chao ,  Heng Wu

IPC分类号： H01L21/02 ,  H01L21/306 ,  H01L21/3065 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L29/66522 ,  H01L21/02532 ,  H01L21/02546 ,  H01L21/02609 ,  H01L21/3065 ,  H01L29/42392 ,  H01L29/66469 ,  H01L29/6653 ,  H01L29/78696 ,  H01L29/66545

摘要： Semiconductor devices and methods of forming the same include forming a stack of alternating first and second sacrificial layers. The first sacrificial layers are recessed relative to the second sacrificial layers. Replacement channel layers are grown from sidewalls of the first sacrificial layers. A first source/drain region is grown from the replacement channel layer. The recessed first sacrificial layers are etched away. A second source/drain region is grown from the replacement channel layer. The second sacrificial layers are etched away. A gate stack is formed between and around the replacement channel layers.