公开(公告)号：US07825491B2

公开(公告)日：2010-11-02

申请号：US11562289

申请日：2006-11-21

Applicant: Lex Kosowsky

Inventor： Lex Kosowsky

IPC: H01L23/62

CPC classification number: H05K1/0257 ,  H01L25/167 ,  H01L51/5203 ,  H01L2924/0002 ,  H01L2924/12044 ,  H05K1/0259 ,  H05K1/0373 ,  H05K1/05 ,  H05K1/167 ,  H05K2201/0738 ,  H05K2201/10106 ,  H01L2924/00

Abstract: A voltage switchable dielectric material (VSD) material as part of a light-emitting component, including LEDs and OLEDs.

Abstract translation: 作为发光部件的一部分的可变压电介质材料（VSD）材料，包括LED和OLED。

公开(公告)号：US20100270546A1

公开(公告)日：2010-10-28

申请号：US12832033

申请日：2010-07-07

Applicant: Lex Kosowsky

Inventor： Lex Kosowsky

IPC: H01L51/44

CPC classification number: H05K1/0257 ,  H01L25/167 ,  H01L51/5203 ,  H01L2924/0002 ,  H01L2924/12044 ,  H05K1/0259 ,  H05K1/0373 ,  H05K1/05 ,  H05K1/167 ,  H05K2201/0738 ,  H05K2201/10106 ,  H01L2924/00

Abstract: A voltage switchable dielectric material (VSD) material as part of a light-emitting component, including LEDs and OLEDs.

公开(公告)号：US20100264225A1

公开(公告)日：2010-10-21

申请号：US12820956

申请日：2010-06-22

Applicant: Lex Kosowsky

Inventor： Lex Kosowsky

IPC: G06K19/077

CPC classification number: G06K19/02 ,  G06K19/0701 ,  G06K19/0715 ,  G06K19/07735 ,  G06K19/07749 ,  H01L23/60 ,  H01L23/66 ,  H01L2223/6677 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/14 ,  H01Q1/2225 ,  H01Q7/00 ,  H05K1/0254 ,  H05K1/0373 ,  H05K2201/0738 ,  Y10T29/49016 ,  H01L2924/00

Abstract: A wireless communication device, such as an RFID tag, is provided material that is dielectric, unless a voltage is applied that exceeds the materials characteristic voltage level. In the presence of such voltage, the material becomes conductive. The integration of such material into the device may be mechanical and/or electrical.

Abstract translation: 提供诸如RFID标签的无线通信设备，其是介电材料，除非施加超过材料特性电压电平的电压。 在存在这种电压的情况下，材料变得导电。 将这种材料整合到装置中可以是机械的和/或电的。

公开(公告)号：US07763185B2

公开(公告)日：2010-07-27

申请号：US11624640

申请日：2007-01-18

Applicant: Chi-Ming Chan ,  Kai-Mo Ng ,  Catherine Yuen-Chien Wong ,  Ying Kit Cheung

Inventor： Chi-Ming Chan ,  Kai-Mo Ng ,  Catherine Yuen-Chien Wong ,  Ying Kit Cheung

IPC: H01C7/00 ,  H01C7/10 ,  H01C7/13

CPC classification number: H01B1/22 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/167 ,  H05K2201/0738 ,  Y10T428/257 ,  Y10T428/31663

Abstract: The invention provides a process for preparing an overvoltage protection material comprising: (i) preparing a mixture comprising a polymer binder precursor and a conductive material; and (ii) heating the mixture to cause reaction of the polymer binder precursor and generate a polymer matrix having conductive material dispersed therein, wherein the polymer binder precursor is chosen such that substantially no solvent is generated during the reaction.

公开(公告)号：US20100147697A1

公开(公告)日：2010-06-17

申请号：US12703723

申请日：2010-02-10

Applicant: Lex Kosowsky ,  Robert Fleming

Inventor： Lex Kosowsky ,  Robert Fleming

IPC: C25D9/00

CPC classification number: H01C7/1006 ,  B82Y10/00 ,  H01B1/22 ,  H01B1/24 ,  H01C7/105 ,  H01C17/0652 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/0373 ,  H05K1/167 ,  H05K3/188 ,  H05K2201/0248 ,  H05K2201/0257 ,  H05K2201/026 ,  H05K2201/0272 ,  H05K2201/0738 ,  H05K2203/0723 ,  H05K2203/105 ,  Y10S977/742 ,  Y10S977/779 ,  Y10T428/30 ,  Y10T428/31678

Abstract: One or more embodiments provide for a device that utilizes voltage switchable dielectric material having semi-conductive or conductive materials that have a relatively high aspect ratio for purpose of enhancing mechanical and electrical characteristics of the VSD material on the device.

Abstract translation: 一个或多个实施例提供了一种使用具有半导体或导电材料的电压可切换介电材料的器件，该器件具有相对较高的纵横比，以便增强器件上的VSD材料的机械和电学特性。

公开(公告)号：US20100139956A1

公开(公告)日：2010-06-10

申请号：US12703674

申请日：2010-02-10

Applicant: Lex Kosowsky ,  Robert Fleming

Inventor： Lex Kosowsky ,  Robert Fleming

IPC: H05K1/09 ,  H01B1/00 ,  H01B1/04

CPC classification number: H01C7/1006 ,  B82Y10/00 ,  H01B1/22 ,  H01B1/24 ,  H01C7/105 ,  H01C17/0652 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/0373 ,  H05K1/167 ,  H05K3/188 ,  H05K2201/0248 ,  H05K2201/0257 ,  H05K2201/026 ,  H05K2201/0272 ,  H05K2201/0738 ,  H05K2203/0723 ,  H05K2203/105 ,  Y10S977/742 ,  Y10S977/779 ,  Y10T428/30 ,  Y10T428/31678

Abstract: One or more embodiments provide for a device that utilizes voltage switchable dielectric material having semi-conductive or conductive materials that have a relatively high aspect ratio for purpose of enhancing mechanical and electrical characteristics of the VSD material on the device.

Abstract translation: 一个或多个实施例提供了一种使用具有半导体或导电材料的电压可切换介电材料的器件，该器件具有相对较高的纵横比，以便增强器件上的VSD材料的机械和电学特性。

公开(公告)号：US20100109834A1

公开(公告)日：2010-05-06

申请号：US12607952

申请日：2009-10-28

Applicant: Lex Kosowsky ,  Robert Fleming ,  Ning Shi

Inventor： Lex Kosowsky ,  Robert Fleming ,  Ning Shi

IPC: H01C7/00

CPC classification number: H01C7/12 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/115 ,  H05K1/167 ,  H05K2201/0738 ,  H05K2201/09736 ,  H05K2201/09781

Abstract: A substrate device includes a layer of non-linear resistive transient protective material and a plurality of conductive elements that form part of a conductive layer. The conductive elements include a pair of electrodes that are spaced by a gap, but which electrically interconnect when the transient protective material is conductive. The substrate includes features to linearize a transient electrical path that is formed across the gap.

Abstract translation: 衬底装置包括形成导电层的一部分的非线性电阻性瞬态保护材料层和多个导电元件。 导电元件包括​​一对间隔开的电极，但当瞬态保护材料是导电的时，它们进行电互连。 衬底包括使跨越间隙形成的瞬态电路线性化的特征。

公开(公告)号：US20090256669A1

公开(公告)日：2009-10-15

申请号：US12417589

申请日：2009-04-02

Applicant: Lex Kosowsky ,  Robert Fleming ,  Bhret Graydon

Inventor： Lex Kosowsky ,  Robert Fleming ,  Bhret Graydon

IPC: H01C7/10

CPC classification number: H05K1/0257 ,  H05K1/0259 ,  H05K1/0373 ,  H05K2201/0738 ,  H05K2203/105

Abstract: A substrate device includes an embedded layer of VSD material that overlays a conductive element or layer to provide a ground. An electrode, connected to circuit elements that are to be protected, extends into the thickness of the substrate to make contact with the VSD layer. When the circuit elements are operated under normal voltages, the VSD layer is dielectric and not connected to ground. When a transient electrical event occurs on the circuit elements, the VSD layer switches instantly to a conductive state, so that the first electrode is connected to ground.

Abstract translation: 衬底器件包括覆盖导电元件或层以提供接地的VSD材料的嵌入层。 连接到要被保护的电路元件的电极延伸到衬底的厚度以与VSD层接触。 当电路元件在正常电压下工作时，VSD层是电介质的，不连接到地。 当在电路元件上发生瞬态电事件时，VSD层立即切换到导通状态，使得第一电极连接到地。

公开(公告)号：US20090180225A1

公开(公告)日：2009-07-16

申请号：US12191179

申请日：2008-08-13

Applicant: Chi-Liang Pan ,  Min-Lin Lee ,  Shinn-Juh Lai ,  Shih-Hsien Wu ,  Chen-Hsuan Chiu

Inventor： Chi-Liang Pan ,  Min-Lin Lee ,  Shinn-Juh Lai ,  Shih-Hsien Wu ,  Chen-Hsuan Chiu

IPC: H02H9/00

CPC classification number: H01L23/60 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/0373 ,  H05K1/116 ,  H05K1/167 ,  H05K3/4688 ,  H05K2201/0738 ,  H05K2201/09718 ,  H01L2924/00014

Abstract: An ESD protection structure is provided. A substrate includes a first voltage variable material and has a first surface, a second surface substantially paralleled to the first surface and a via connecting the first and second surfaces. A first metal layer is disposed in the substrate for coupling to a ground terminal. The first voltage variable material is in a conductive state when an ESD event occurs, such that the via is electrically connected with the first metal layer to form a discharge path, and the first voltage variable material is in an isolation state when the ESD event is absent, such that the via is electrically isolated from the first metal layer.

Abstract translation: 提供ESD保护结构。 衬底包括第一电压可变材料，并具有第一表面，与第一表面基本平行的第二表面和连接第一表面和第二表面的通孔。 第一金属层设置在衬底中用于耦合到接地端子。 当ESD事件发生时，第一电压可变材料处于导通状态，使得通孔与第一金属层电连接以形成放电路径，并且当ESD事件为ESD时，第一电压可变材料处于隔离状态 不存在，使得通孔与第一金属层电隔离。

公开(公告)号：US20080301934A1

公开(公告)日：2008-12-11

申请号：US12190551

申请日：2008-08-12

Applicant: George Dudnikov, JR.

Inventor： George Dudnikov, JR.

IPC: H05K3/20

CPC classification number: H05K3/429 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/116 ,  H05K1/167 ,  H05K3/184 ,  H05K3/422 ,  H05K2201/0187 ,  H05K2201/0738 ,  H05K2201/096 ,  H05K2201/09645 ,  H05K2201/09718 ,  H05K2201/09881 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other.