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公开(公告)号：US20090284851A1
公开(公告)日：2009-11-19
申请号：US12353750
申请日：2009-01-14
申请人： Chih-Ming Huang , Chih-Lun Chen
发明人： Chih-Ming Huang , Chih-Lun Chen
IPC分类号： G02B7/02
摘要： A device for locking lens and a method for the same are provided. The device is used in a voice-coil motor of a photographing module of a cell phone. The voice-coil motor has a lens-stand for a lens being turned to a locking depth inside. The device includes a circumgyration-stop instrument having a first sustaining surface, and a focusing ring having a turning end. A turn-locking length of the turning end is equal to the locking depth inside. The device includes a circumgyration-stop preventing a pressure being persisted to apply on the lens as the focusing ring finishes the turn of the lens. The first turn-stop surface props the first sustaining surface as the focusing ring is turned to an extremity of the turn-locking length. The focusing ring accordingly escapes the circumgyration-stop instrument for finishing the focusing of the lens in the lens-stand.
摘要翻译： 提供一种用于锁定镜头的装置及其方法。 该装置用于手机拍摄模块的音圈电机。 音圈电机具有用于透镜转向内部锁定深度的透镜架。 该装置包括具有第一维持表面的旋转停止装置和具有转向端的聚焦环。 转向端的转向锁定长度等于内部的锁定深度。 该装置包括环绕止动件，防止当聚焦环完成透镜转动时持续施加在透镜上的压力。 当聚焦环转到转向锁定长度的末端时，第一个转动表面支撑第一个维持表面。 聚焦环相应地逃避了旋转停止仪器，以完成镜头在镜头架中的聚焦。
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公开(公告)号：US20090261476A1
公开(公告)日：2009-10-22
申请号：US12148319
申请日：2008-04-18
IPC分类号： H01L23/482 , H01L21/60
CPC分类号： H01L24/19 , H01L21/6835 , H01L23/3114 , H01L24/24 , H01L24/82 , H01L25/105 , H01L2221/68345 , H01L2224/24226 , H01L2224/82001 , H01L2225/1035 , H01L2924/01005 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/15311
摘要： A semiconductor device and a manufacturing method thereof are disclosed. The method includes the steps of providing a carrier board having conductive circuits disposed thereon and a plurality of chips with active surfaces having solder pads disposed thereon, wherein conductive bumps are disposed on the solder pads; mounting chips on the carrier board; filling the spacing between the chips with a dielectric layer and forming openings in the dielectric layer at periphery of each chip to expose the conductive circuits; forming a metal layer in the openings of the dielectric layer and at periphery of the active surface of the chips for electrically connecting the conductive bumps and the conductive circuits; and cutting along the dielectric layer between the chips and removing the carrier board to separate each chip and exposing the conductive circuits from the non-active surface.
摘要翻译： 公开了一种半导体器件及其制造方法。 该方法包括以下步骤：提供具有布置在其上的导电电路的载体板和具有设置在其上的焊料焊盘的有源表面的多个芯片，其中导电凸块设置在焊盘上; 将芯片安装在载板上; 用电介质层填充芯片之间的间隔，并在每个芯片周边的电介质层中形成开口以露出导电电路; 在所述电介质层的开口部和所述芯片的有源面的外围形成金属层，用于电连接所述导电凸块和所述导电电路; 并沿着芯片之间的电介质层切割并去除载体板以分离每个芯片并使导电电路与非活性表面相接触。
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公开(公告)号：US07508066B2
公开(公告)日：2009-03-24
申请号：US11267632
申请日：2005-11-03
申请人： Chien-Ping Huang , Chih-Ming Huang
发明人： Chien-Ping Huang , Chih-Ming Huang
CPC分类号： H01L23/3677 , H01L21/4871 , H01L21/561 , H01L23/3107 , H01L23/3128 , H01L23/367 , H01L23/3733 , H01L23/4334 , H01L23/49548 , H01L23/49816 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2224/16225 , H01L2224/16245 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48247 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/351 , Y10T29/49126 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A heat dissipating semiconductor package and a fabrication method thereof are provided. A semiconductor chip is mounted on a chip carrier. A heat sink is mounted on the chip, and includes an insulating core layer, a thin metallic layer formed on each of an upper surface and a lower surface of the insulating core layer and a thermal via hole formed in the insulating core layer. A molding process is performed to encapsulate the chip and the heat sink with an encapsulant to form a package unit. A singulation process is performed to peripherally cut the package unit. A part of the encapsulant above the thin metallic layer on the upper surface of the heat sink is removed, such that the thin metallic layer on the upper surface of the heat sink is exposed, and heat generated by the chip can be dissipated through the heat sink.
摘要翻译： 提供散热半导体封装及其制造方法。 半导体芯片安装在芯片载体上。 散热器安装在芯片上，并且包括绝缘芯层，形成在绝缘芯层的上表面和下表面中的每一个上的薄金属层和形成在绝缘芯层中的热通孔。 进行成型工艺以用密封剂封装芯片和散热器以形成封装单元。 执行单个处理以周边地切割包装单元。 在散热器的上表面上的薄金属层上方的一部分密封剂被去除，使得散热器的上表面上的薄金属层被暴露，并且由芯片产生的热可以通过热量消散 水槽。
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公开(公告)号：US20090039527A1
公开(公告)日：2009-02-12
申请号：US12221725
申请日：2008-08-06
CPC分类号： H01L27/14618 , H01L27/14625 , H01L27/14683 , H01L2224/05001 , H01L2224/056 , H01L2224/13 , H01L2224/13025 , H01L2224/16146 , H01L2224/94 , H01L2224/97 , H01L2924/19104 , H01L2924/19105 , H01L2924/00014 , H01L2224/81 , H01L2224/83
摘要： A sensor-type package and a method for fabricating the same are provided. A wafer having a plurality of semiconductor chips is provided, wherein a plurality of holes are formed on a first surface of each of the semiconductor chips, and a plurality of metallic pillars formed in the holes and a plurality of bond pads connected to the metallic pillars form through silicon vias (TSVs). A groove is formed on a second surface of each of the semiconductor chips to expose the metallic pillars. A plurality of sensor chips having TSVs are stacked in the grooves of the semiconductor chips and electrically connected to the exposed metallic pillars. A transparent cover is mounted onto the second surfaces of the semiconductor chips to cover the grooves. A plurality of conductive components are implanted on the bond pads of the semiconductor chips. The wafer is cut along borders among the semiconductor chips.
摘要翻译： 提供了一种传感器型封装及其制造方法。 提供具有多个半导体芯片的晶片，其中在每个半导体芯片的第一表面上形成多个孔，并且形成在孔中的多个金属柱和连接到金属柱的多个接合焊盘 通过硅通孔（TSV）形成。 在每个半导体芯片的第二表面上形成凹槽以暴露金属柱。 具有TSV的多个传感器芯片堆叠在半导体芯片的凹槽中并电连接到暴露的金属柱。 透明盖安装在半导体芯片的第二表面上以覆盖凹槽。 在半导体芯片的接合焊盘上注入多个导电元件。 在半导体芯片之间沿着边缘切割晶片。
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公开(公告)号：US20090014860A1
公开(公告)日：2009-01-15
申请号：US12011832
申请日：2008-01-29
CPC分类号： H01L25/0652 , H01L25/18 , H01L2224/32145 , H01L2224/48227 , H01L2224/73215 , H01L2224/73265 , H01L2224/92247 , H01L2225/06562 , H01L2924/00012
摘要： A multi-chip stack structure and a manufacturing method thereof are provided. The fabrication method includes the steps of: providing a chip carrier having a first surface and a second surface opposing thereto and at least a first chip and a second chip mounted on the first surface; electrically connecting the chips to the chip carrier by a plurality of bonding wires; and stacking at least a third chip on the first and second chips by a film deposed therebetween, wherein the third chip is stepwise stacked on the first chip and at least a part of the bonding wire connected to the second chip is covered by the film, and electrically connecting the third chip and the chip carrier by a bonding wire, thereby enabling a plurality of chips to be stacked on the chip carrier to enhance the electrical performance of electronic products.
摘要翻译： 提供了一种多芯片堆叠结构及其制造方法。 该制造方法包括以下步骤：提供具有与其相对的第一表面和第二表面的芯片载体和至少安装在第一表面上的第一芯片和第二芯片; 通过多个接合线将芯片电连接到芯片载体上; 并且通过其间放置的膜将第一和第二芯片上的至少第三芯片堆叠起来，其中第三芯片逐步堆叠在第一芯片上，并且连接到第二芯片的键合线的至少一部分被膜覆盖， 并通过接合线电连接第三芯片和芯片载体，从而能够将多个芯片堆叠在芯片载体上，以增强电子产品的电气性能。
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56.发明授权Sensor semiconductor device and fabrication method of the sensor semiconductor device 有权传感器半导体器件及传感器半导体器件的制造方法公开(公告)号：US07446307B2
公开(公告)日：2008-11-04
申请号：US11373723
申请日：2006-03-10
CPC分类号： H01L27/14618 , H01L24/97 , H01L27/14632 , H01L27/14687 , H01L2224/24225 , H01L2224/97 , H01L2224/82
摘要： A sensor semiconductor device and a fabrication method thereof are provided. The fabrication method includes mounting a sensor chip on a surface of a substrate; forming a transparent cover on the sensor chip; forming a dielectric layer and a circuit layer on the substrate, wherein the sensor chip is electrically connected to the substrate through the circuit layer and the transparent cover is exposed from the dielectric layer such that light can pass through the transparent cover to reach a sensor region of the sensor chip and allow the sensor chip to operate; and implanting a plurality of solder balls on another surface of the substrate to electrically connect the sensor chip to an external device. The sensor semiconductor device can be cost-effectively fabricated, and the circuit cracking and known good die (KGD) problems of the prior art can be avoided.
摘要翻译： 提供了一种传感器半导体器件及其制造方法。 制造方法包括将传感器芯片安装在基板的表面上; 在传感器芯片上形成透明盖; 在基板上形成电介质层和电路层，其中传感器芯片通过电路层与基板电连接，透明盖从电介质层露出，使得光可透过透明盖到达传感器区域 的传感器芯片，并允许传感器芯片工作; 以及在所述基板的另一表面上植入多个焊球，以将所述传感器芯片电连接到外部设备。 可以成本有效地制造传感器半导体器件，并且可以避免现有技术的电路破裂和已知的良好裸片（KGD）问题。
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57.发明授权Method for fabricating wafer level semiconductor package with build-up layer 有权用于制造具有堆积层的晶片级半导体封装的方法公开(公告)号：US07445957B2
公开(公告)日：2008-11-04
申请号：US11580560
申请日：2006-10-12
CPC分类号： H01L21/6835 , H01L21/568 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/20 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/97 , H01L2924/01029 , H01L2924/01033 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/351 , H01L2924/3511 , H01L2224/82 , H01L2924/00
摘要： A wafer level semiconductor package with a build-up layer is provided, which includes a glass frame having a through hole for receiving a semiconductor chip therein, a low-modulus buffer material filled within the space formed between the semiconductor chip and the glass frame, a build-up layer formed on the glass frame and the semiconductor chip such that the build-up layer is electrically connected to the semiconductor chip, and a plurality of conductive elements mounted on the build-up layer so that the semiconductor chip is electrically connected to external devices. With the use of the glass frame and low-modulus buffer material, the wafer level semiconductor package thus-obtained is free from warpage, chip-crack, and delamination problems and the reliability thereof is enhanced. A method for fabricating the wafer level semiconductor package is also provided.
摘要翻译： 提供具有积层的晶片级半导体封装，其包括具有用于接收其中的半导体芯片的通孔的玻璃框架，填充在形成在半导体芯片和玻璃框架之间的空间内的低模量缓冲材料， 形成在所述玻璃框架和所述半导体芯片上的堆积层，使得所述积层层电连接到所述半导体芯片，以及安装在所述积层层上的多个导电元件，使得所述半导体芯片电连接 到外部设备。 通过使用玻璃框架和低模量缓冲材料，由此获得的晶片级半导体封装没有翘曲，芯片裂纹和分层问题，并且其可靠性得到提高。 还提供了一种用于制造晶片级半导体封装的方法。
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58.发明申请Heat dissipation unit and a semiconductor package that has the heat dissipation unit 审中-公开散热单元和具有散热单元的半导体封装公开(公告)号：US20080246142A1
公开(公告)日：2008-10-09
申请号：US12080798
申请日：2008-04-04
IPC分类号： H01L23/367
CPC分类号： H01L23/4334 , H01L24/48 , H01L24/49 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/49175 , H01L2224/73265 , H01L2924/00014 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A heat dissipation unit and a semiconductor package having the same are disclosed. The semiconductor package includes a carrier; an electronic component mounted on and electrically connected to the carrier; a heat dissipation unit, which includes a flat section attached to the electronic component, extension sections connected to the flat section, and a heat dissipation section connected to the extension sections; and an encapsulant encapsulating the electronic component and the heat dissipation unit, wherein stress releasing sections are at least disposed at intersectional corners between the extension sections and the flat section so as to prevent projections from being formed by concentrated stresses in a punching process of the heat dissipation unit, thereby maintaining flatness of the flat section and further preventing circuits of the electronic component from being damaged due to a contact point produced between the electronic component and the flat section in a molding process.
摘要翻译： 公开了一种散热单元和具有该散热单元的半导体封装。 半导体封装包括载体; 电子部件，其安装在所述载体上并与其电连接; 散热单元，其包括附接到所述电子部件的平坦部分，连接到所述平坦部分的延伸部分和连接到所述延伸部分的散热部分; 以及封装电子部件和散热部的密封剂，其中应力释放部至少设置在延伸部和平坦部之间的交叉角处，以防止在热冲压加工中由于集中应力而形成突起 从而保持平坦部分的平坦度，并且进一步防止电子部件的电路在模制过程中由于在电子部件和平坦部分之间产生的接触点而损坏。
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公开(公告)号：US20080176358A1
公开(公告)日：2008-07-24
申请号：US12009866
申请日：2008-01-23
IPC分类号： H01L21/56
CPC分类号： H01L25/0657 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/48471 , H01L2224/4945 , H01L2224/73265 , H01L2224/83136 , H01L2224/83191 , H01L2224/838 , H01L2224/92247 , H01L2225/0651 , H01L2225/06562 , H01L2225/06575 , H01L2924/00014 , H01L2924/01033 , H01L2924/01074 , H01L2924/01082 , H01L2924/07802 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599
摘要： The present invention provides a fabrication method of a multi-chip stacking structure. The method includes steps of: stacking the first chips on the chip carrier in a step-like manner to form a first chip module; electrically connecting the first chip module to the chip carrier by a plurality of first bonding wires; stacking the second chips on the first chip module in step-like manner to form a second chip module, wherein a bottom chip of the second chip module is stacked on a top chip of the first chip module by an adhesive layer with the bottom chip deviated from the top chip horizontally in a direction toward the first bonding wires; and electrically connecting the bond pads of the second chip module to the chip carrier by a plurality of second bonding wires.
摘要翻译： 本发明提供一种多芯片堆叠结构的制造方法。 该方法包括以下步骤：以阶梯状方式堆叠芯片载体上的第一芯片以形成第一芯片模块; 通过多个第一接合线将第一芯片模块电连接到芯片载体; 在第一芯片模块上堆叠第二芯片以形成第二芯片模块，其中第二芯片模块的底部芯片通过粘合剂层堆叠在第一芯片模块的顶部芯片上，底部芯片偏离 从顶部芯片沿着朝向第一接合线的方向水平地; 以及通过多个第二接合线将所述第二芯片模块的所述接合焊盘电连接到所述芯片载体。
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60.发明申请公开(公告)号：US20080166831A1
公开(公告)日：2008-07-10
申请号：US12048079
申请日：2008-03-13
IPC分类号： H01L31/18
CPC分类号： H01L27/14683 , H01L27/14618 , H01L2224/24226
摘要： A sensor semiconductor device and a method for fabricating the same are proposed. A sensor chip is mounted on a substrate, and a dielectric layer and a circuit layer are formed on the substrate, wherein the circuit layer is electrically connected to the substrate and the sensor chip. The dielectric layer is formed with an opening for exposing a sensor region of the sensor chip. A light-penetrable lid covers the opening of the dielectric layer, such that light is able to penetrate the light-penetrable lid to reach the sensor region and activate the sensor chip. The sensor chip can be electrically connected to an external device via a plurality of solder balls implanted on a surface of the substrate not for mounting the sensor chip. Therefore, the sensor semiconductor device is fabricated in a cost-effective manner, and circuit cracking and a know good die (KGD) problem are prevented.
摘要翻译： 提出了一种传感器半导体器件及其制造方法。 传感器芯片安装在基板上，并且在基板上形成电介质层和电路层，其中电路层电连接到基板和传感器芯片。 电介质层形成有用于暴露传感器芯片的传感器区域的开口。 透光盖子覆盖电介质层的开口，使得光线能够穿透透光盖子到达传感器区域并激活传感器芯片。 传感器芯片可以通过植入在基板的表面上的多个焊球电连接到外部设备，而不用于安装传感器芯片。 因此，传感器半导体器件以成本有效的方式制造，并且防止了电路破裂和知道的裸芯片（KGD）问题。
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