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    Image sensor having plural pixels adjacent to each other in a thickness direction and method for manufacturing the same
    51.
    发明授权
    Image sensor having plural pixels adjacent to each other in a thickness direction and method for manufacturing the same 有权
    具有在厚度方向上彼此相邻的多个像素的图像传感器及其制造方法

    公开(公告)号：US07626156B2

    公开(公告)日：2009-12-01

    申请号：US12209000

    申请日：2008-09-11

    申请人： Hiroshi Tada ,  Masayuki Hayashi ,  Masaya Nakayama

    发明人： Hiroshi Tada ,  Masayuki Hayashi ,  Masaya Nakayama

    IPC分类号： H01L27/00

    CPC分类号： H01L27/14647

    摘要： An image sensor 1 has a substrate 2 and primary light-receiving pixels 4 arrayed in the direction of the surface of the substrate, and the primary light-receiving pixels are formed by laminating plural secondary light-receiving pixels 10, 20 and 30 which sense lights in different wavelength ranges, respectively, via at least sealing insulation layers 18 and 28 between adjacent secondary light-receiving pixels in the thickness direction. Each secondary light-receiving pixel includes a photoelectric conversion portion 14, 24, or 34 for photoelectrically converting the lights and a signal output portion 12, 22 or 32 for outputting signals from a thin film transistor 40 according to charges generated by the photoelectric conversion portion, and the active layer 48 of the thin film transistor is formed from an oxide semiconductor or organic semiconductor.

    摘要翻译： 图像传感器1具有在基板的表面方向排列的基板2和一次受光像素4，并且通过层叠感测的多个次级受光像素10,20和30来形成一次受光像素 通过至少在相邻的次级光接收像素之间的厚度方向上的密封绝缘层18和28分别在不同波长范围内的光。 每个次级光接收像素包括用于光电转换光的光电转换部分14,24或34以及用于根据由光电转换部分产生的电荷从薄膜晶体管40输出信号的信号输出部分12,22或32 并且薄膜晶体管的有源层48由氧化物半导体或有机半导体形成。

    On-demand process sorting method and apparatus
    55.
    发明授权
    On-demand process sorting method and apparatus 失效
    按需处理分拣方法和装置

    公开(公告)号：US06370676B1

    公开(公告)日：2002-04-09

    申请号：US09321048

    申请日：1999-05-27

    申请人： Masayuki Hayashi ,  Richard F. Keil ,  Robert J. Savaglio

    发明人： Masayuki Hayashi ,  Richard F. Keil ,  Robert J. Savaglio

    IPC分类号： B06F1750

    CPC分类号： G01R31/3016 ,  G01R31/319

    摘要： A process sort test circuit and methodology for determining performance characteristic of an IC chip. The circuit is located on an IC chip itself and comprises an input for receiving an input signal; a first path from the input to a first output for transmitting the input signal to the first output, the first path sensitive to variations in a manufacturing process for the IC chip; a second path from the input to a second output for transmitting the input signal to the second output, the second path being substantially less sensitive to the variations in the manufacturing process for the IC chip; and, a pulse generator device coupled to the first and second outputs for detecting a difference in arrival times of the input signal at the first and second outputs and for outputting a sort signal if the difference is of a preselected magnitude. The sort signal enables output indication of a performance characteristic of the IC chip.

    摘要翻译： 用于确定IC芯片的性能特性的工艺分类测试电路和方法。 该电路本身位于IC芯片上，并包括用于接收输入信号的输入端; 从输入到用于将输入信号传输到第一输出的第一输出的第一路径，对IC芯片的制造过程中的变化敏感的第一路径; 从输入到第二输出的第二路径，用于将输入信号传输到第二输出，第二路径对于IC芯片的制造过程的变化基本上较不敏感; 以及耦合到所述第一和第二输出的脉冲发生器装置，用于检测在所述第一和第二输出处的所述输入信号的到达时间差，并且如果所述差是预选量值则输出分类信号。 分类信号使得IC芯片的性能特性的输出指示。

    Method of measuring the amount of dislocation of cervical vertebrae
    56.
    发明授权
    Method of measuring the amount of dislocation of cervical vertebrae 失效
    测量颈椎脱位量的方法

    公开(公告)号：US5944664A

    公开(公告)日：1999-08-31

    申请号：US1034

    申请日：1997-12-30

    申请人： Masayuki Hayashi

    发明人： Masayuki Hayashi

    IPC分类号： A61B5/107 ,  A61B6/00 ,  A61B17/56 ,  A61B19/00 ,  G06T7/00

    CPC分类号： A61B5/4504 ,  A61B5/107 ,  G06T7/0012 ,  A61B2017/564 ,  A61B2090/061 ,  A61B6/505

    摘要： A method of measuring the amount of dislocation of the cervical vertebrae of the patient includes a step of defining, on the base posterior view, an end point on a line connecting a point representing the front end of the nasal septum and a point being equidistant from a pair of ocular orbits; a step of determining, on each side of the base posterior view, a point of intersection (or contact) of the "profile of a foramen magnum of a skull" and the region where a condyle of the skull is joined to, or in close proximity to, a superior articular pit of atlas; and a step of defining, on the base posterior view, a bisector of the angle which a line connecting the front end point to one of the points of origin forms with respect to another line connecting the front end point to the other of the points of origin. The amount of dislocation of the cervical vertebrae is determined by means of the bisector. In the case of the atlas, points of foramen transversariums representing points of the substantial center of the foramen transversariums of the atlas are defined on the image of the base posterior view. The amount of dislocation of the atlas is calculated by measuring the distance between one point of foramen transversarium and the bisector and the distance between the other point of foramen transversarium and the same.

    摘要翻译： 测量患者的颈椎脱位量的方法包括在基底后视图上界定连接代表鼻中隔的前端的点的线上的终点和等距离的点 一对眼睛轨道; 在基部后视图的每一侧上确定“颅骨的孔的轮廓的轮廓与颅骨的髁的连接的区域”的交点（或接触点）或接近的步骤 靠近，地图集的上级关键坑; 以及在基部后视图上限定将前端点连接到原点之一的线相对于将前端点连接到另一点的另一线形成的角度的平分线的步骤 起源。 通过平分线确定颈椎脱位量。 在地图集的情况下，在基底后视图的图像上定义表示图集的孔的横截面的实质中心点的孔的横断面点。 通过测量一个孔的横截面和平分线之间的距离以及另一个孔的横截面距离来计算图谱的位错量。

    System and method for calibrating damping factor of analog PLL
    60.
    发明授权
    System and method for calibrating damping factor of analog PLL 失效
    用于校准模拟PLL阻尼系数的系统和方法

    公开(公告)号：US5563552A

    公开(公告)日：1996-10-08

    申请号：US542103

    申请日：1995-10-12

    申请人： John E. Gersbach ,  Masayuki Hayashi

    发明人： John E. Gersbach ,  Masayuki Hayashi

    IPC分类号： H03L7/089 ,  H03L7/095 ,  H03L7/10 ,  H03L7/183

    CPC分类号： H03L7/095 ,  H03L7/0898 ,  H03L7/10 ,  H03L7/183 ,  H03L2207/04 ,  Y10S331/02

    摘要： Calibration systems and techniques for analog phase-lock loops (PLLs) providing the capability to dynamically maintain a constant damping factor. Damping factor is calibrated by automatically setting a reference bias current I.sub.r to the PLL's charge pump such that the charge current I.sub.c output therefrom maintains the desired PLL damping characteristic. The technique presented involves selecting a known first frequency F.sub.1 and allowing the PLL circuit to reach steady state, after which a known second frequency F.sub.2 is applied and the PLL circuit is monitored to determine whether steady state at this second frequency F.sub.2 is accomplished within a predetermined target time T.sub.x, which corresponds to the desired damping factor. The determination of whether lock occurs within the target time T.sub.x is then employed to automatically set the reference current I.sub.r.

    摘要翻译： 用于模拟锁相环（PLL）的校准系统和技术提供动态维持恒定阻尼因子的能力。 通过将参考偏置电流Ir自动设置到PLL的电荷泵来校准阻尼因子，使得从其输出的充电电流Ic保持期望的PLL阻尼特性。 所提出的技术涉及选择已知的第一频率F1并使PLL电路达到稳定状态，之后施加已知的第二频率F2，并且监视PLL电路以确定在该第二频率F2下的稳态是否在预定的 目标时间Tx，其对应于期望的阻尼因子。 然后采用确定在目标时间Tx内发生锁定以自动设置参考电流Ir。