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    MoOx-Based Resistance Switching Materials
    51.
    发明申请
    MoOx-Based Resistance Switching Materials 有权
    基于MoOx的电阻开关材料

    公开(公告)号：US20140183432A1

    公开(公告)日：2014-07-03

    申请号：US13727958

    申请日：2012-12-27

    Applicant: INTERMOLECULAR, INC.

    Inventor： Sergey Barabash ,  Tony P. Chiang ,  Dipankar Pramanik

    IPC: H01L45/00

    CPC classification number: H01L45/145 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1641

    Abstract: Molybdenum oxide can be used to form switching elements in a resistive memory device. The atomic ratio of oxygen to molybdenum can be between 2 and 3. The molybdenum oxide exists in various Magneli phases, such as Mo13O33, Mo4O11, Mo17O47, Mo8O23, or Mo9O26. An electric field can be established across the switching layers, for example, by applying a set or reset voltage. The electric field can cause movement of the oxygen charges, e.g., O2− ions, changing the composition profile of the switching layers, forming bistable states, including a high resistance state with MoO3 and a low resistance state with MoOx (x

    Abstract translation: 氧化钼可用于在电阻式存储器件中形成开关元件。 氧与钼的原子比可以在2和3之间。氧化钼存在于各种Magneli相中，例如Mo13O33，Mo4O11，Mo17O47，Mo8O23或Mo9O26。 可以跨开关层建立电场，例如通过施加置位或复位电压。 电场可导致氧电荷的移动，例如O 2离子，改变开关层的组成分布，形成双稳态，包括具有MoO 3的高电阻状态和具有MoO x（x <3）的低电阻状态）。

    Nonvolatile memory elements
    52.
    发明授权
    Nonvolatile memory elements 有权
    非易失性存储元件

    公开(公告)号：US08765567B2

    公开(公告)日：2014-07-01

    申请号：US14062473

    申请日：2013-10-24

    Applicant: Intermolecular Inc.

    Inventor： Sandra G Malhotra ,  Sean Barstow ,  Tony P. Chiang ,  Pragati Kumar ,  Prashant B Phatak ,  Sunil Shanker ,  Wen Wu

    IPC: H01L21/02

    CPC classification number: H01L45/1608 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641

    Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.

    Abstract translation: 提供了基于电阻式开关存储元件层的非易失性存储元件。 非易失性存储元件可以具有电阻性开关金属氧化物层。 电阻式开关金属氧化物层可以具有一层或多层氧化物。 电阻式开关金属氧化物可以掺杂有增加其熔融温度并增强其热稳定性的掺杂剂。 可以形成层以增强非易失性存储元件的热稳定性。 用于非易失性存储元件的电极可以包含导电层和缓冲层。

    Memory device having an integrated two-terminal current limiting resistor
    53.
    发明授权
    Memory device having an integrated two-terminal current limiting resistor 有权
    存储器件具有集成的两端限流电阻

    公开(公告)号：US08748237B2

    公开(公告)日：2014-06-10

    申请号：US14064787

    申请日：2013-10-28

    Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    Inventor： Dipankar Pramanik ,  Tony P. Chiang ,  Mankoo Lee

    IPC: H01L29/8605

    CPC classification number: H01L45/14 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0045 ,  G11C2013/0073 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/76 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16

    Abstract: A resistor structure incorporated into a resistive switching memory cell or device to form memory devices with improved device performance and lifetime is provided. The resistor structure may be a two-terminal structure designed to reduce the maximum current flowing through a memory device. A method is also provided for making such memory device. The method includes depositing a resistor structure and depositing a variable resistance layer of a resistive switching memory cell of the memory device, where the resistor structure is disposed in series with the variable resistance layer to limit the switching current of the memory device. The incorporation of the resistor structure is very useful in obtaining desirable levels of device switching currents that meet the switching specification of various types of memory devices. The memory devices may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices.

    Abstract translation: 提供了并入电阻式开关存储单元或装置中以形成具有改进的器件性能和寿命的存储器件的电阻器结构。 电阻器结构可以是设计成减小流过存储器件的最大电流的两端结构。 还提供了一种用于制造这种存储器件的方法。 该方法包括沉积电阻器结构并沉积存储器件的电阻式开关存储单元的可变电阻层，其中电阻器结构与可变电阻层串联设置以限制存储器件的开关电流。 电阻器结构的结合对于获得满足各种类型的存储器件的开关规范的期望的器件开关电流水平是非常有用的。 存储器件可以形成为可用于各种电子器件的大容量非易失性存储器集成电路的一部分。

    Resistive switching memory element including doped silicon electrode
    54.
    发明授权
    Resistive switching memory element including doped silicon electrode 有权
    电阻式开关存储元件包括掺杂硅电极

    公开(公告)号：US08698121B2

    公开(公告)日：2014-04-15

    申请号：US13935388

    申请日：2013-07-03

    Applicant: Intermolecular, Inc.

    Inventor： Prashant B. Phatak ,  Tony P. Chiang ,  Michael Miller ,  Wen Wu

    IPC: H01L47/00

    CPC classification number: H01L45/1616 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146

    Abstract: A resistive switching memory is described, including a first electrode comprising doped silicon having a first work function, a second electrode having a second work function that is different from the first work function by between 0.1 and 1.0 electron volts (eV), a metal oxide layer between the first electrode and the second electrode, the metal oxide layer switches using bulk-mediated switching using unipolar or bipolar switching voltages for switching from a low resistance state to a high resistance state and vice versa.

    Abstract translation: 描述了一种电阻式开关存储器，其包括包括具有第一功函数的掺杂硅的第一电极，具有与第一功函数不同的第二功函数的第二电极在0.1和1.0电子伏特（eV）之间的金属氧化物 在第一电极和第二电极之间，金属氧化物层使用单极或双极开关电压进行大量介导的开关，用于从低电阻状态切换到高电阻状态，反之亦然。

    Work Function Tailoring for Nonvolatile Memory Applications
    55.
    发明申请
    Work Function Tailoring for Nonvolatile Memory Applications 审中-公开
    非易失性存储器应用的工作功能定制

    公开(公告)号：US20140065790A1

    公开(公告)日：2014-03-06

    申请号：US14078838

    申请日：2013-11-13

    Applicant: Intermolecular Inc. ,  SanDisk 3D LLC ,  Kabushiki Kaisha Toshiba

    Inventor： Yun Wang ,  Tony P. Chiang ,  Imran Hashim

    IPC: H01L45/00

    CPC classification number: H01L45/1608 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/065 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1633 ,  H01L45/1641

    Abstract: Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.

    Abstract translation: 本发明的实施例一般涉及具有设置在至少一个电极和形成在非易失性存储器件中的可变电阻层之间的界面层结构的电阻式开关非易失性存储器件及其形成方法。 通常，电阻式开关存储器元件可以形成为可用于各种电子设备（例如数码相机，移动电话，手持式计算机和音乐播放器）的大容量非易失性存储器集成电路的一部分。 在电阻式开关非易失性存储器件的一种结构中，界面层结构包括钝化区域，界面耦合区域和/或可变电阻层接口区域，其被配置为调整非易失性存储器件的性能，例如降低形成 器件的开关电流并降低器件的成型电压，并降低从一个成形器件到另一个器件的性能变化。

    High Throughput Current-Voltage Combinatorial Characterization Tool and Method for Combinatorial Solar Test Substrates
    56.
    发明申请
    High Throughput Current-Voltage Combinatorial Characterization Tool and Method for Combinatorial Solar Test Substrates 审中-公开

    公开(公告)号：US20130342230A1

    公开(公告)日：2013-12-26

    申请号：US13971325

    申请日：2013-08-20

    Applicant: Intermolecular, Inc

    Inventor： Yun Wang ,  Tony P. Chiang ,  Chi-I Lang

    IPC: G01R31/26

    CPC classification number: G01R31/26 ,  G01N21/55 ,  G01R31/2607 ,  H02S50/10

    Abstract: Measuring current-voltage (I-V) characteristics of a solar cell using a lamp that emits light, a substrate that includes a plurality of solar cells, a positive electrode attached to the solar cells, and a negative electrode peripherally deposited around each of the solar cells and connected to a common ground, an articulation platform coupled to the substrate, a multi-probe switching matrix or a Z-stage device, a programmable switch box coupled to the multi-probe switching matrix or Z-stage device and selectively articulating the probes by raising the probes until in contact with at least one of the positive electrode and the negative electrode and lowering the probes until contact is lost with at least one of the positive electrode and the negative electrode, a source meter coupled to the programmable switch box and measuring the I-V characteristics of the substrate.

    Atomic Layer Deposition of Hafnium and Zirconium Oxides for Memory Applications
    58.
    发明申请
    Atomic Layer Deposition of Hafnium and Zirconium Oxides for Memory Applications 审中-公开
    用于记忆应用的铪和氧化锆的原子层沉积

    公开(公告)号：US20130334484A1

    公开(公告)日：2013-12-19

    申请号：US13972587

    申请日：2013-08-21

    Applicant: Intermolecular Inc. ,  SanDisk 3D LLC ,  Kabushiki Kaisha Toshiba

    Inventor： Yun Wang ,  Tony P. Chiang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik

    IPC: H01L45/00

    CPC classification number: H01L45/146 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1616

    Abstract: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack having a metal oxide buffer layer disposed on or over a metal oxide bulk layer. The metal oxide bulk layer contains a metal-rich oxide material and the metal oxide buffer layer contains a metal-poor oxide material. The metal oxide bulk layer is less electrically resistive than the metal oxide buffer layer since the metal oxide bulk layer is less oxidized or more metallic than the metal oxide buffer layer. In one example, the metal oxide bulk layer contains a metal-rich hafnium oxide material and the metal oxide buffer layer contains a metal-poor zirconium oxide material.

    Abstract translation: 本发明的实施例一般涉及用于制造这种存储器件的非易失性存储器件和方法。 用于形成改进的存储器件（例如ReRAM单元）的方法提供优化的原子层沉积（ALD）工艺，用于形成金属氧化物膜堆叠，其具有设置在金属氧化物本体层上或其上的金属氧化物缓冲层。 金属氧化物本体层含有富金属氧化物材料，金属氧化物缓冲层含有贫金属氧化物。 由于金属氧化物本体层比金属氧化物缓冲层氧化较少或更金属，所以金属氧化物本体层的电阻小于金属氧化物缓冲层的电阻。 在一个实例中，金属氧化物本体层含有富金属氧化铪材料，金属氧化物缓冲层含有贫金属氧化锆材料。

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