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    CMOS imager with Cu wiring and method of eliminating high reflectivity interfaces therefrom
    54.
    发明授权
    CMOS imager with Cu wiring and method of eliminating high reflectivity interfaces therefrom 有权
    具有Cu布线的CMOS成像器和从其中消除高反射率界面的方法

    公开(公告)号：US07342268B2

    公开(公告)日：2008-03-11

    申请号：US10905277

    申请日：2004-12-23

    申请人： James W. Adkisson ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Robert K. Leidy ,  Richard J. Rassel ,  Anthony K. Stamper

    发明人： James W. Adkisson ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Robert K. Leidy ,  Richard J. Rassel ,  Anthony K. Stamper

    IPC分类号： H01L31/062

    CPC分类号： H01L27/14636 ,  H01L21/76819 ,  H01L21/76834 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/14645 ,  H01L27/14683

    摘要： An image sensor and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack to result in a pixel array exhibiting increased light sensitivity. The image sensor includes structures having a minimum thickness of barrier layer metal that traverses the optical path of each pixel in the sensor array or, that have portions of barrier layer metal selectively removed from the optical paths of each pixel, thereby minimizing reflectance. That is, by implementing various block or single mask methodologies, portions of the barrier layer metal are completely removed at locations of the optical path for each pixel in the array. In a further embodiment, the barrier metal layer may be formed atop the Cu metallization by a self-aligned deposition.

    摘要翻译： 一种图像传感器和制造方法，其中传感器包括铜（Cu）金属化水平，允许结合较薄的层间电介质堆叠以产生呈现增加的光敏度的像素阵列。 图像传感器包括具有穿过传感器阵列中的每个像素的光路的阻挡层金属的最小厚度的结构，或者具有从每个像素的光路中选择性地去除的阻挡层金属的部分，从而使反射率最小化。 也就是说，通过实现各种块或单掩模方法，在阵列中的每个像素的光路的位置处完全去除了阻挡层金属的部分。 在另一个实施例中，阻挡金属层可以通过自对准沉积形成在Cu金属化之上。

    CMOS imager photodiode with enhanced capacitance
    57.
    发明授权
    CMOS imager photodiode with enhanced capacitance 有权
    具有增强电容的CMOS成像光电二极管

    公开(公告)号：US08440490B2

    公开(公告)日：2013-05-14

    申请号：US13288686

    申请日：2011-11-03

    申请人： James W. Adkisson ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Dale J. Pearson ,  Dennis L. Rogers

    发明人： James W. Adkisson ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Dale J. Pearson ,  Dennis L. Rogers

    IPC分类号： H01L31/18

    CPC分类号： H01L27/14643 ,  H01L27/1463 ,  H01L27/14689 ,  H01L31/035281

    摘要： A method for manufacturing a pixel sensor cell that includes a photosensitive element having a non-laterally disposed charge collection region. The method includes forming a trench recess in a substrate of a first conductivity type material, and filling the trench recess with a material having second conductivity type material. The second conductivity type material is then diffused out of the filled trench material to the substrate region surrounding the trench to form the non-laterally disposed charge collection region. The filled trench material is removed to provide a trench recess, and the trench recess is filled with a material having a first conductivity type material. A surface implant layer is formed at either side of the trench having a first conductivity type material. A collection region of a trench-type photosensitive element is formed of the outdiffused second conductivity type material and is isolated from the substrate surface.

    摘要翻译： 一种制造像素传感器单元的方法，该像素传感器单元包括具有非横向放置的电荷收集区域的感光元件。 该方法包括在第一导电类型材料的衬底中形成沟槽凹槽，并用具有第二导电类型材料的材料填充沟槽凹槽。 然后将第二导电类型材料从填充的沟槽材料扩散到围绕沟槽的衬底区域，以形成非横向布置的电荷收集区域。 去除填充的沟槽材料以提供沟槽凹槽，并且用具有第一导电类型材料的材料填充沟槽凹槽。 表面注入层形成在具有第一导电类型材料的沟槽的任一侧。 沟槽型感光元件的收集区域由向外扩散的第二导电型材料形成，并与衬底表面隔离。

    Interface device with integrated solar cell(S) for power collection
    58.
    发明授权
    Interface device with integrated solar cell(S) for power collection 有权
    具有用于集电的集成太阳能电池（S）的接口装置

    公开(公告)号：US08384690B2

    公开(公告)日：2013-02-26

    申请号：US12779994

    申请日：2010-05-14

    申请人： Brent A. Anderson ,  Mark D. Jaffe ,  Jed H. Rankin

    发明人： Brent A. Anderson ,  Mark D. Jaffe ,  Jed H. Rankin

    IPC分类号： G06F3/041 ,  G06F3/045 ,  H01L31/042

    CPC分类号： G06F3/042 ,  G06F3/041 ,  G06F3/0421 ,  G06F3/044 ,  G06F2203/04109

    摘要： Disclosed herein are embodiments of an interface device (e.g., a display, touchpad, touchscreen display, etc.) with integrated power collection functions. In one embodiment, a solar cell or solar cell array can be located within a substrate at a first surface and an array of interface elements can also be located within the substrate at the first surface such that portions of the solar cell(s) laterally surround the individual interface elements or groups thereof. In another embodiment, a solar cell or solar cell array can be located within the substrate at a first surface and an array of interface elements can be located within the substrate at a second surface opposite the first surface (i.e., opposite the solar cell or solar cell array). In yet another embodiment, an array of diodes, which can function as either solar cells or sensing elements, can be within a substrate at a first surface and can be wired to allow for selective operation in either a power collection mode or sensing mode.

    摘要翻译： 这里公开了具有集成的功率收集功能的接口设备（例如，显示器，触摸板，触摸屏显示器等）的实施例。 在一个实施例中，太阳能电池或太阳能电池阵列可以位于第一表面的衬底内，并且界面元件阵列也可以位于第一表面的衬底内，使得太阳能电池的一部分横向包围 各个接口元件或其组合。 在另一个实施例中，太阳能电池或太阳能电池阵列可以位于第一表面的衬底内，并且界面元件的阵列可以位于衬底内的与第一表面相对的第二表面（即，与太阳能电池或太阳能 单元阵列）。 在另一个实施例中，可以用作太阳能电池或感测元件的二极管阵列可以在第一表面的衬底内，并且可以被布线以允许在电力收集模式或感测模式中的选择性操作。

    Random personalization of chips during fabrication
    59.
    发明授权
    Random personalization of chips during fabrication 有权
    制造期间芯片的随机个性化

    公开(公告)号：US08015514B2

    公开(公告)日：2011-09-06

    申请号：US12344725

    申请日：2008-12-29

    申请人： Mark D. Jaffe ,  Stephen A. Mongeon ,  Leah M. P. Pastel ,  Jed H. Rankin

    发明人： Mark D. Jaffe ,  Stephen A. Mongeon ,  Leah M. P. Pastel ,  Jed H. Rankin

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5068 ,  G06F2217/66 ,  H01L22/20 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Disclosed are embodiments of a method for randomly personalizing chips during fabrication, a personalized chip structure and a design structure for such a personalized chip structure. The embodiments use electronic device design and manufacturing processes to randomly or pseudo-randomly create a specific variation in one or more instances of a particular electronic device formed on each chip. The device design and manufacturing processes are tuned so that the specific variation occurs with some predetermined probability, resulting in a desired hardware distribution and personalizing each chip. The resulting personalized chips can be used for modal distribution of chips. For example, chips can be personalized to allow sorting when a single chip design can be used to support multiple applications. The resulting personalized chips can also be used for random number generation for creating unique on-chip identifiers, private keys, etc.

    摘要翻译： 公开了用于在制造期间随机个性化芯片的方法的实施例，个性化芯片结构和用于这种个性化芯片结构的设计结构。 实施例使用电子设备设计和制造过程来随机地或伪随机地在每个芯片上形成的特定电子设备的一个或多个实例中创建特定变化。 调整设备设计和制造过程，使得特定变化以某种预定概率发生，从而产生期望的硬件分布和个性化每个芯片。 所得到的个性化芯片可用于芯片的模态分配。 例如，当单芯片设计可用于支持多种应用时，芯片可以被个性化以允许排序。 所产生的个性化芯片也可以用于随机数生成，用于创建唯一的片上标识符，私钥等。

    Methods for Enhancing Quality of Pixel Sensor Image Frames for Global Shutter Imaging
    60.
    发明申请
    Methods for Enhancing Quality of Pixel Sensor Image Frames for Global Shutter Imaging 有权
    提高全球快门成像像素传感器图像质量的方法

    公开(公告)号：US20090268063A1

    公开(公告)日：2009-10-29

    申请号：US12107825

    申请日：2008-04-23

    申请人： John J. Ellis-Monaghan ,  Mark D. Jaffe

    发明人： John J. Ellis-Monaghan ,  Mark D. Jaffe

    IPC分类号： H04N9/64 ,  H04N5/335

    CPC分类号： H04N5/361 ,  H04N5/359

    摘要： The image quality of an image frame from a CMOS image sensor array operated in global shutter mode may be enhanced by dispersing or randomizing the noise introduced by leakage currents from floating drains among the rows of the image frame. Further, the image quality may be improved by accounting for time dependent changes in the output of dark pixels in dark pixel rows or dark pixel columns. In addition, voltage and time dependent changes in the output of dark pixels may also be measured to provide an accurate estimate of the noise introduced to the charge held in the floating drains. Such methods may be employed individually or in combination to improve the quality of the image.

    摘要翻译： 来自在全球快门模式下操作的CMOS图像传感器阵列的图像帧的图像质量可以通过将来自浮动排水口的泄漏电流引入的噪声分散或随机化在图像帧的行中来增强。 此外，通过考虑暗像素行或暗像素列中的暗像素的输出中的时间依赖性变化，可以提高图像质量。 此外，还可以测量暗像素的输出中的电压和时间相关的变化，以提供引入到浮动排水管中的电荷的噪声的准确估计。 这样的方法可以单独使用或组合使用以提高图像的质量。