公开(公告)号：US20130070004A1

公开(公告)日：2013-03-21

申请号：US13700560

申请日：2011-01-25

申请人： Naoto Inoue ,  Akira Tomiyoshi ,  Masayuki Takahashi ,  Osamu Teranuma

发明人： Naoto Inoue ,  Akira Tomiyoshi ,  Masayuki Takahashi ,  Osamu Teranuma

IPC分类号： G09G3/36

CPC分类号： G09G3/36 ,  G02B27/2264 ,  G09G3/003 ,  G09G3/342 ,  G09G2310/024 ,  G09G2320/0209 ,  G09G2320/0633 ,  G09G2320/064 ,  H04N13/341 ,  H04N13/356

摘要： Disclosed is a liquid crystal display device wherein display performance of a two-dimensional image and that of a three-dimensional image are both improved. The liquid crystal display device is provided with: a liquid crystal display panel, which displays the two-dimensional image and the three-dimensional image by selectively switching the images; and a backlight, which supplies light to the liquid crystal display panel. The backlight includes an illuminating region, which is scan-lighted corresponding to scanning of the liquid crystal display panel, and the scanning frequencies of the illuminating region at the time of displaying the two-dimensional image and the three-dimensional image on the liquid crystal display panel are different from each other.

摘要翻译： 公开了一种二维图像和三维图像的显示性能都得到改善的液晶显示装置。 液晶显示装置具备：液晶显示面板，其通过选择性地切换图像来显示二维图像和三维图像; 以及向液晶显示面板供给光的背光源。 背光源包括对应于液晶显示面板的扫描进行扫描的照明区域，以及在液晶上显示二维图像和三维图像时的照明区域的扫描频率 显示面板彼此不同。

公开(公告)号：US20120127668A1

公开(公告)日：2012-05-24

申请号：US13376282

申请日：2010-06-22

申请人： Shingo Yamamoto ,  Akio Sumiya ,  Yasuo Matsuda ,  Naoto Inoue ,  Makoto Tami ,  Ryo Sugihara ,  Fumiaki Tanaka ,  Shintaro Hara ,  Shota Akinaga

发明人： Shingo Yamamoto ,  Akio Sumiya ,  Yasuo Matsuda ,  Naoto Inoue ,  Makoto Tami ,  Ryo Sugihara ,  Fumiaki Tanaka ,  Shintaro Hara ,  Shota Akinaga

IPC分类号： H05K7/20

CPC分类号： H05K7/20509 ,  H01L21/565 ,  H01L23/3121 ,  H01L2924/00 ,  H01L2924/0002 ,  H05K7/20 ,  H05K7/20154 ,  H05K7/20254 ,  H05K7/20854 ,  H05K7/20863 ,  H05K7/209

摘要： A power module can prevent damages due to cracking or breakage of an insulating substrate when molding even if a heat plate constituting a power module pre-product is made areally smaller than the insulating substrate, and can also sufficiently satisfy demand for minimization. Specifically, the power module pre-product is sealed by a molding resin layer in a state where externally exposed end portion on one end side in both external connecting terminals and the other surface side of a heat plate are each exposed to the outside. The power module substrate constituting a multilayer substrate body includes an aligning hole, into which an aligning pin is inserted, the pin being included in a lower molding die constituting a molding die with an upper molding die that molds a molding resin layer, so as to position the power module pre-product inside a cavity.

摘要翻译： 即使构成电源模块预制品的加热板小于绝缘基板，功率模块也可以防止由于绝缘基板的开裂或断裂而造成的损坏，并且还可以充分满足最小化的要求。 具体地说，在两个外部连接端子中的一端侧的外露端部和加热板的另一表面侧的外露端部各自露出的状态下，通过模制树脂层密封功率模块预制品。 构成多层基板主体的功率模块基板包括：对准销插入其中的定位孔，该引脚包括在构成模具的下模具中，上模塑模具成型树脂层，以便 将电源模块预产品定位在腔内。

公开(公告)号：US20050059215A1

公开(公告)日：2005-03-17

申请号：US10973852

申请日：2004-10-25

申请人： Inki Kim ,  Sang Kim ,  Min Paek ,  Chiew Ping ,  Wan Lee ,  Choong Chien ,  Zadig Lam ,  Hitomi Watanabe ,  Naoto Inoue

发明人： Inki Kim ,  Sang Kim ,  Min Paek ,  Chiew Ping ,  Wan Lee ,  Choong Chien ,  Zadig Lam ,  Hitomi Watanabe ,  Naoto Inoue

IPC分类号： H01L21/8234

CPC分类号： H01L21/823462 ,  H01L21/823481 ,  Y10S438/981

摘要： A method for making a semiconductor device having a first active region and a second active region includes providing first and second isolation structures defining the first active region on a substrate. The first active region uses a first operational voltage, and the second active region uses a second operational voltage that is different from the first voltage. A nitride layer overlying the first and second active regions is formed. An oxide layer overlying the nitride layer is formed. A first portion of the oxide layer overlying the first active region is removed to expose a first portion of the nitride layer. The exposed first portion of the nitride layer is removed using a wet etch method while leaving a second portion of the nitride layer that is overlying the second active region intact. Thereafter, a first gate oxide having a first thickness is formed on the first active region, the first gate oxide having a first edge facing the first isolation structure and a second edge facing the second isolation structure. The first edge is separated from the first isolation structure by a first distance. The second edge is separated from the second isolation structure by a second distance. Thereafter, a second gate oxide having a second thickness is formed on the second active region, the second thickness being different than the first thickness.

摘要翻译： 制造具有第一有源区和第二有源区的半导体器件的方法包括提供在衬底上限定第一有源区的第一和第二隔离结构。 第一有源区域使用第一工作电压，而第二有源区域使用不同于第一电压的第二工作电压。 形成覆盖第一和第二有源区的氮化物层。 形成覆盖氮化物层的氧化物层。 去除覆盖在第一有源区上的氧化物层的第一部分以露出氮化物层的第一部分。 使用湿蚀刻方法去除氮化物层的暴露的第一部分，同时留下覆盖第二有源区域的氮化物层的第二部分完好无损。 此后，在第一有源区上形成具有第一厚度的第一栅极氧化物，第一栅极氧化物具有面对第一隔离结构的第一边缘和面向第二隔离结构的第二边缘。 第一边缘与第一隔离结构隔开第一距离。 第二边缘与第二隔离结构隔开第二距离。 此后，在第二有源区上形成具有第二厚度的第二栅极氧化物，第二厚度不同于第一厚度。

公开(公告)号：US06492692B1

公开(公告)日：2002-12-10

申请号：US09407382

申请日：1999-09-28

申请人： Kazutoshi Ishii ,  Naoto Inoue ,  Koushi Maemura ,  Shoji Nakanishi ,  Yoshikazu Kojima ,  Kiyoaki Kadoi ,  Takao Akiba ,  Yasuhiro Moya ,  Kentaro Kuhara

发明人： Kazutoshi Ishii ,  Naoto Inoue ,  Koushi Maemura ,  Shoji Nakanishi ,  Yoshikazu Kojima ,  Kiyoaki Kadoi ,  Takao Akiba ,  Yasuhiro Moya ,  Kentaro Kuhara

IPC分类号： H01L2972

CPC分类号： H01L24/05 ,  H01L21/78 ,  H01L23/53228 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/02126 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05012 ,  H01L2224/05017 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/06051 ,  H01L2224/13017 ,  H01L2224/13027 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/4807 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/75252 ,  H01L2224/85201 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： To decrease the area of a chip, improve the manufacturing efficiency and decrease the cost in a semiconductor device such as a driver integrated circuit having a number of output pads, and an electronic circuit device such as electronic clock. There are disposed output pads superposed in two dimensions on driving transistors or logic circuits connected thereto, respectively. Further, not only aluminum interconnection but also bump electrodes or barrier metals are used for the interconnection of the semiconductor device. In a case where a semiconductor integrated circuit is electrically adhered on to a printed circuit board in a face down manner, a solder bump disposed on the semiconductor integrated circuit and the interconnection of the printed circuit board are directly connected to each other, thereby realizing the electrical connection. On this occasion, the bump electrode as the external connecting terminal of the semiconductor integrated circuit is laminated on the transistor.

摘要翻译： 为了减小芯片的面积，提高制造效率，降低诸如具有多个输出焊盘的驱动器集成电路等半导体装置以及诸如电子时钟之类的电子电路装置的成本。 在驱动晶体管或连接到其的逻辑电路上分别布置有两个重叠的输出焊盘。 此外，不仅铝互连而且凸起电极或阻挡金属用于半导体器件的互连。 在半导体集成电路以面朝下的方式电粘接到印刷电路板的情况下，设置在半导体集成电路上的焊料凸块和印刷电路板的互连直接连接，从而实现 电气连接。 在这种情况下，作为半导体集成电路的外部连接端子的突起电极层叠在晶体管上。

公开(公告)号：US06351362B1

公开(公告)日：2002-02-26

申请号：US09328108

申请日：1999-06-08

申请人： Naoto Inoue ,  Tetsuo Shioura

发明人： Naoto Inoue ,  Tetsuo Shioura

IPC分类号： H02H322

CPC分类号： H02H9/046

摘要： A protection circuit for an LCD controller IC comprises normally-off transistors through which a large current may escape, a resistor for disturbing the movement of charge in gate electrodes of transistors of an input circuit, and normally-off transistors for allowing electric charge in the gate electrodes of the transistors of the input circuit to escape. In one embodiment, the protection circuit includes first and second normally-off NMOS transistors connected to an input pad of the IC, a resistor arranged between the first and second normally-off NMOS transistors and the input circuit, and a third normally-off PMOS transistor and fourth normally-off NMOS transistor connected between the resistor and the input circuit.

摘要翻译： 用于LCD控制器IC的保护电路包括常闭晶体管，大电流可以通过该晶体管逃逸，用于干扰输入电路的晶体管的栅电极中的电荷的移动的电阻器，以及用于允许在 输入电路的晶体管的栅极电极逸出。 在一个实施例中，保护电路包括连接到IC的输入焊盘的第一和第二常闭NMOS晶体管，布置在第一和第二常闭NMOS晶体管与输入电路之间的电阻器，以及第三常闭PMOS 晶体管和第四常闭NMOS晶体管连接在电阻和输入电路之间。

公开(公告)号：US06329274B1

公开(公告)日：2001-12-11

申请号：US07995325

申请日：1992-12-28

申请人： Naoto Inoue ,  Kenji Aoki ,  Takashi Hosaka

发明人： Naoto Inoue ,  Kenji Aoki ,  Takashi Hosaka

IPC分类号： H01L2128

CPC分类号： H01L21/76897 ,  H01L21/2254 ,  H01L21/28512 ,  H01L21/28525 ,  H01L21/76802

摘要： For forming electrical interlayer contact in a semiconductor device, an insulating film is formed on a first electrically conductive layer and then a contact hole is formed in the insulating film to expose a part of the first electroconductive, an activated surface of the exposed part is formed in the contact hole, a gas containing an impurity component is supplied to form an impurity adsorption film on the activated surface, and the contact hole is filled with a second electrically conductive layer which electrically contacts the first layer through the contact hole.

摘要翻译： 为了在半导体器件中形成电中间层接触，在第一导电层上形成绝缘膜，然后在绝缘膜中形成接触孔以暴露第一导电部分，形成暴露部分的活化表面 在接触孔中，供给包含杂质成分的气体，以在活化表面上形成杂质吸附膜，并且接触孔填充有通过接触孔与第一层电接触的第二导电层。

公开(公告)号：US5901015A

公开(公告)日：1999-05-04

申请号：US826470

申请日：1997-03-27

申请人： Kazuhito Kurita ,  Toshihiro Kusunoki ,  Yasuhiro Habara ,  Takashi Ishizawa ,  Hideyuki Ikeda ,  Naoto Inoue

发明人： Kazuhito Kurita ,  Toshihiro Kusunoki ,  Yasuhiro Habara ,  Takashi Ishizawa ,  Hideyuki Ikeda ,  Naoto Inoue

IPC分类号： G11B5/48 ,  G11B11/105

CPC分类号： G11B5/4833 ,  G11B11/1055 ,  G11B11/1058

摘要： A magnetic head apparatus has a reduced thickness by preventing a jumping action of a magnetic head that can occur in a head-up state. A leaf spring has a first end and a second end opposite to the first end, and the leaf spring supporting the magnetic head at the first end, the leaf spring having a surface facing the magnetic medium. A mount member holds the leaf spring, the leaf spring being mounted to the mount member at the second end. A supporting portion extends from the mount member, and engages the surface of the leaf spring at a position between the magnetic head and the mount member.

摘要翻译： 磁头装置通过防止可能在平视状态下发生的磁头的跳跃动作而具有减小的厚度。 板簧具有与第一端相对的第一端和第二端，并且板簧在第一端支撑磁头，板簧具有面向磁介质的表面。 安装构件保持板簧，片簧在第二端安装到安装构件。 支撑部分从安装构件延伸，并且在磁头和安装构件之间的位置处接合片簧的表面。