公开(公告)号：US07439628B2

公开(公告)日：2008-10-21

申请号：US11474420

申请日：2006-06-26

申请人： Matthew E. Colburn

发明人： Matthew E. Colburn

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L21/76835 ,  H01L21/76807 ,  H01L21/7681 ,  H01L21/76829

摘要： Interconnect dual damascene structure are fabricated by depositing on a layer of at least one dielectric, a mask forming layer for providing the via-level mask layer of the dual damascene structures; creating an elongated via pattern in the via-level mask layer; depositing a layer of line-level dielectric and creating a line pattern through the layer of line-level dielectric, and transferring the line pattern through the projected intersection of the elongated via-level pattern and of the line-level pattern thereby generating an aligned dual damascene structure. A conductive liner layer is deposited in the dual damascene structure followed by filling the dual damascene structure with a conductive fill metal to form a set of metal lines. The metal and liner layers are planarized.

摘要翻译： 互连双镶嵌结构通过沉积在至少一个介电层的层上制造，掩模形成层用于提供双镶嵌结构的通孔级掩模层; 在通孔级掩模层中形成细长的通孔图案; 沉积一层线路电介质并通过线路级电介质层产生线路图案，并且通过细长通孔电平图案和线路电平图案的投影交点传送线路图案，从而产生对准的双 大马士革结构。 导电衬里层沉积在双镶嵌结构中，然后用导电填充金属填充双镶嵌结构以形成一组金属线。 金属和衬里层被平坦化。

公开(公告)号：US07405147B2

公开(公告)日：2008-07-29

申请号：US10707996

申请日：2004-01-30

申请人： Daniel C. Edelstein ,  Matthew E. Colburn ,  Edward C. Cooney, III ,  Timothy J. Dalton ,  John A. Fitzsimmons ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Michael W. Lane ,  Vincent J. McGahay ,  Lee M. Nicholson ,  Satyanarayana V. Nitta ,  Sampath Purushothaman ,  Sujatha Sankaran ,  Thomas M. Shaw ,  Andrew H. Simon ,  Anthony K. Stamper

发明人： Daniel C. Edelstein ,  Matthew E. Colburn ,  Edward C. Cooney, III ,  Timothy J. Dalton ,  John A. Fitzsimmons ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Michael W. Lane ,  Vincent J. McGahay ,  Lee M. Nicholson ,  Satyanarayana V. Nitta ,  Sampath Purushothaman ,  Sujatha Sankaran ,  Thomas M. Shaw ,  Andrew H. Simon ,  Anthony K. Stamper

IPC分类号： H01L21/00

CPC分类号： B82Y30/00 ,  H01L21/0332 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/7682 ,  H01L21/76829 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  Y10S438/947 ,  H01L2924/00

摘要： A method for manufacturing a structure includes providing a structure having an insulator layer with at least one interconnect and forming a sub lithographic template mask on the insulator layer. A selective etching step is used for etching the insulator layer through the sub lithographic template mask to form sub lithographic features near the at least one interconnect. A supra lithographic blocking mask may also be utilized. In another aspect, the method includes forming pinch off sections of sub lithographic size formed in a capping layer on the insulator layer. A semiconductor structure includes an insulator layer having at least one interconnect feature and at least one column formed in the insulator layer. A plurality of sub lithographic features formed on a top portion of the insulator layer and communicating with the at least one column is also provided. The plurality of sub lithographic features have a cross section or diameter less than any of the at least one column. A gap may be prohibited from forming on or near scribe lines or vias.

摘要翻译： 一种制造结构的方法包括提供具有至少一个互连的绝缘层的结构，并在绝缘体层上形成次光刻模板掩模。 选择性蚀刻步骤用于通过子光刻模板掩模蚀刻绝缘体层，以在至少一个互连附近形成亚光刻特征。 还可以使用超光刻阻挡掩模。 另一方面，该方法包括形成在绝缘体层上的覆盖层中形成的亚光刻尺寸的夹断部分。 半导体结构包括具有至少一个互连特征的绝缘体层和形成在绝缘体层中的至少一个列。 还提供了形成在绝缘体层的顶部并与至少一个柱连通的多个次级光刻特征。 所述多个亚光刻特征具有小于或小于所述至少一列中的任何一个的横截面或直径。 可能禁止在划线或通孔上或附近形成间隙。

公开(公告)号：US20080157314A1

公开(公告)日：2008-07-03

申请号：US11619196

申请日：2007-01-03

申请人： Lawrence A. Clevenger ,  Matthew E. Colburn ,  Timothy J. Dalton ,  Michael C. Gaidis ,  Louis L. C. Hsu ,  Carl Radens ,  Keith Kwong Hon Wong ,  Chih-Chao Yang

发明人： Lawrence A. Clevenger ,  Matthew E. Colburn ,  Timothy J. Dalton ,  Michael C. Gaidis ,  Louis L. C. Hsu ,  Carl Radens ,  Keith Kwong Hon Wong ,  Chih-Chao Yang

IPC分类号： H01L23/02

CPC分类号： H01L23/576 ,  H01L21/31144 ,  H01L23/544 ,  H01L28/20 ,  H01L28/40 ,  H01L2223/54433 ,  H01L2223/5444 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00

摘要： A method of forming a stochastically based integrated circuit encryption structure includes forming a lower conductive layer over a substrate, forming a short prevention layer over the lower conductive layer, forming an intermediate layer over the short prevention layer, wherein the intermediate layer is characterized by randomly structured nanopore features. An upper conductive layer is formed over the random nanopore structured intermediate layer. The upper conductive layer is patterned into an array of individual cells, wherein a measurable electrical parameter of the individual cells has a random distribution from cell to cell with respect to a reference value of the electrical parameter.

摘要翻译： 一种形成随机的集成电路加密结构的方法包括在衬底上形成下导电层，在下导电层上形成防短层，在短路防护层上形成中间层，其中中间层的特征是随机 结构纳米孔特征。 在无规纳米孔结构化中间层上形成上导电层。 上导电层被图案化成单个单元的阵列，其中各个单元的可测量电参数相对于电参数的参考值具有从单元到单元的随机分布。

公开(公告)号：US08623458B2

公开(公告)日：2014-01-07

申请号：US12642018

申请日：2009-12-18

申请人： Joy Cheng ,  Matthew E. Colburn ,  Stefan Harrer ,  William D. Hinsberg ,  Steven J. Holmes ,  Ho-Cheol Kim ,  Daniel Paul Sanders

发明人： Joy Cheng ,  Matthew E. Colburn ,  Stefan Harrer ,  William D. Hinsberg ,  Steven J. Holmes ,  Ho-Cheol Kim ,  Daniel Paul Sanders

IPC分类号： B81C1/00 ,  C08J5/18 ,  C08J5/00

CPC分类号： G03F7/0002 ,  B82Y10/00 ,  B82Y40/00

摘要： A layered structure comprising a self-assembled material is formed by a method that includes forming a photochemically, thermally and/or chemically treated patterned photoresist layer disposed on a first surface of a substrate. The treated patterned photoresist layer comprises a non-crosslinked treated photoresist. An orientation control material is cast on the treated patterned photoresist layer, forming a layer containing orientation control material bound to a second surface of the substrate. The treated photoresist and, optionally, any non-bound orientation control material are removed by a development process, resulting in a pre-pattern for self-assembly. A material capable of self-assembly is cast on the pre-pattern. The casted material is allowed to self-assemble with optional heating and/or annealing to produce the layered structure.

摘要翻译： 包括自组装材料的层状结构通过包括形成设置在衬底的第一表面上的光化学，热和/或化学处理的图案化光致抗蚀剂层的方法形成。 经处理的图案化光刻胶层包括非交联处理的光致抗蚀剂。 将取向控制材料浇铸在经处理的图案化的光致抗蚀剂层上，形成包含与基材的第二表面结合的取向控制材料的层。 经处理的光致抗蚀剂和任选的任何未结合的取向控制材料通过显影过程被去除，从而形成用于自组装的预图案。 能够自组装的材料在预制图案上铸造。 允许铸造材料通过任选的加热和/或退火自组装以产生分层结构。

公开(公告)号：US08507346B2

公开(公告)日：2013-08-13

申请号：US12949148

申请日：2010-11-18

申请人： Martin Burkhardt ,  Matthew E. Colburn ,  Allen H. Gabor ,  Oleg Gluschenkov ,  Scott D. Halle ,  Howard S. Landis ,  Helen Wang

发明人： Martin Burkhardt ,  Matthew E. Colburn ,  Allen H. Gabor ,  Oleg Gluschenkov ,  Scott D. Halle ,  Howard S. Landis ,  Helen Wang

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/84 ,  H01L21/338 ,  H01L21/3205 ,  H01L21/4763 ,  H01L21/311 ,  H01L21/302 ,  H01L21/461

CPC分类号： H01L29/78 ,  H01L21/28123 ,  H01L21/32139 ,  H01L22/12 ,  H01L22/26

摘要： A method of forming a semiconductor device having a substrate, an active region and an inactive region includes: forming a hardmask layer over the substrate; transferring a first pattern into the hardmask layer in the active region of the semiconductor device; forming one or more fills in the inactive region; forming a cut-away hole within, covering, or partially covering, the one or more fills to expose a portion of the hardmask layer, the exposed portion being within the one or more fills; and exposing the hardmask layer to an etchant to divide the first pattern into a second pattern including at least two separate elements.

摘要翻译： 一种形成具有衬底，有源区和非活性区的半导体器件的方法包括：在衬底上形成硬掩模层; 将第一图案转移到半导体器件的有源区中的硬掩模层中; 在非活性区域中形成一个或多个填充物; 在所述一个或多个填充物内部，覆盖或部分地覆盖所述硬掩模层的一部分以暴露所述硬掩模层的一部分内的切除孔，所述暴露部分在所述一个或多个填充物内; 以及将所述硬掩模层暴露于蚀刻剂以将所述第一图案划分成包括至少两个分离元件的第二图案。

公开(公告)号：US08470711B2

公开(公告)日：2013-06-25

申请号：US12952248

申请日：2010-11-23

申请人： John C. Arnold ,  Sean D. Burns ,  Matthew E. Colburn ,  Steven J. Holmes ,  Yunpeng Yin

发明人： John C. Arnold ,  Sean D. Burns ,  Matthew E. Colburn ,  Steven J. Holmes ,  Yunpeng Yin

IPC分类号： H01L21/44

CPC分类号： H01L23/00 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/76816 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for tone inversion for integrated circuit fabrication includes providing a substrate with an underlayer on top of the substrate; creating a first pattern, the first pattern being partially etched into a portion of the underlayer such that a remaining portion of the underlayer is protected and forms a second pattern, and such that the first pattern does not expose the substrate located underneath the underlayer; covering the first pattern with a layer of image reverse material (IRM); and etching the second pattern into the substrate. A structure for tone inversion for integrated circuit fabrication includes a substrate; a partially etched underlayer comprising a first pattern located over the substrate, the first pattern being partially etched into a portion of the underlayer such that a remaining portion of the underlayer is protected and forms a second pattern, and such that the first pattern does not expose the substrate located underneath the underlayer; and an image reversal material (IRM) layer located over the partially etched underlayer.

摘要翻译： 用于集成电路制造的色调反转的方法包括：在衬底的顶部上提供具有底层的衬底; 产生第一图案，所述第一图案被部分地蚀刻到所述底层的一部分中，使得所述底层的剩余部分被保护并形成第二图案，并且使得所述第一图案不暴露位于所述底层下方的所述基板; 用一层图像反向材料（IRM）覆盖第一个图案; 并将第二图案刻蚀成衬底。 用于集成电路制造的色调反转的结构包括：衬底; 部分蚀刻的底层包括位于所述衬底上方的第一图案，所述第一图案被部分蚀刻到所述底层的一部分中，使得所述底层的剩余部分被保护并形成第二图案，并且使得所述第一图案不暴露 底层位于底层下方; 以及位于部分蚀刻的底层上方的图像反转材料（IRM）层。

公开(公告)号：US20130026639A1

公开(公告)日：2013-01-31

申请号：US13615980

申请日：2012-09-14

申请人： John C. Arnold ,  Kuang-Jung Chen ,  Matthew E. Colburn ,  Dario L. Goldfarb ,  Stefan Harrar ,  Steven J. Holmes ,  Pushkara Varanasi

发明人： John C. Arnold ,  Kuang-Jung Chen ,  Matthew E. Colburn ,  Dario L. Goldfarb ,  Stefan Harrar ,  Steven J. Holmes ,  Pushkara Varanasi

IPC分类号： H01L21/428 ,  H01L23/48

CPC分类号： H01L23/53295 ,  G03F7/091 ,  G03F7/38 ,  H01L21/0274 ,  H01L21/31144 ,  H01L21/76811 ,  H01L21/76813 ,  H01L2221/1021 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating a dual damascene structure includes providing a first photoresist layer coated on an underlying dielectric stack, exposing said first photoresist layer to a first predetermined pattern of light, coating a second photoresist layer onto the pre-exposed first photoresist layer, exposing said second photoresist layer to a second predetermined pattern of light, optionally post-exposure baking the multi-tiered photoresist layers and developing said photoresist layers to form a multi-tiered dual damascene structure in the photoresist layers.

摘要翻译： 一种用于制造双镶嵌结构的方法包括提供涂覆在下面的电介质堆叠上的第一光致抗蚀剂层，将所述第一光致抗蚀剂层暴露于第一预定图案的光，将第二光致抗蚀剂层涂覆到预曝光的第一光致抗蚀剂层上， 第二光致抗蚀剂层到第二预定图案的光，任选地后曝光烘烤多层光致抗蚀剂层并显影所述光致抗蚀剂层以在光致抗蚀剂层中形成多层双镶嵌结构。

公开(公告)号：US20120321740A1

公开(公告)日：2012-12-20

申请号：US13599694

申请日：2012-08-30

申请人： Matthew E. Colburn ,  Yves C. Martin ,  Theodore G. van Kessel ,  Hematha K. Wickramasinghe

发明人： Matthew E. Colburn ,  Yves C. Martin ,  Theodore G. van Kessel ,  Hematha K. Wickramasinghe

IPC分类号： B29C59/02 ,  B82Y40/00

CPC分类号： B29C43/021 ,  B29C43/003 ,  B29C43/3642 ,  B29C2043/025 ,  B29C2043/3647 ,  B29C2043/3649 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  H01L21/0273

摘要： An apparatus for nano lithography includes a mask having a pattern formed thereon and a pneumatic pressure driving source for applying a pneumatic pressure to at least one of a surface of the mask and a surface of a workpiece, thereby to uniformly transfer the pattern from the mask to the workpiece.

摘要翻译： 纳米光刻装置包括具有形成在其上的图案的掩模和用于向掩模的表面和工件的表面中的至少一个施加气动压力的气动压力驱动源，从而均匀地将图案从掩模 到工件。

公开(公告)号：US20120244711A1

公开(公告)日：2012-09-27

申请号：US13069536

申请日：2011-03-23

申请人： Yunpeng Yin ,  John C. Arnold ,  Matthew E. Colburn ,  Sean D. Burns

发明人： Yunpeng Yin ,  John C. Arnold ,  Matthew E. Colburn ,  Sean D. Burns

IPC分类号： H01L21/31

CPC分类号： H01L21/0337 ,  H01L21/3086 ,  H01L21/31144 ,  H01L21/32139

摘要： An improved method of performing sidewall spacer imager transfer is presented. The method includes forming a set of sidewall spacers next to a plurality of mandrels, the set of sidewall spacers being directly on top of a hard-mask layer; transferring image of at least a portion of the set of sidewall spacers to the hard-mask layer to form a device pattern; and transferring the device pattern from the hard-mask layer to a substrate underneath the hard-mask layer.

摘要翻译： 提出了一种执行侧壁间隔成像器传输的改进方法。 该方法包括在多个心轴旁边形成一组侧壁间隔物，该组侧壁间隔物直接位于硬掩模层的顶部上; 将所述一组侧壁间隔物的至少一部分图像转印到所述硬掩模层以形成器件图案; 并将器件图案从硬掩模层转移到硬掩模层下面的衬底。

公开(公告)号：US20120133078A1

公开(公告)日：2012-05-31

申请号：US13364101

申请日：2012-02-01

申请人： Carlton Grant Willson ,  Matthew E. Colburn

发明人： Carlton Grant Willson ,  Matthew E. Colburn

IPC分类号： B29C39/20 ,  C08G77/00 ,  C07F7/08 ,  C01B33/04 ,  C07F7/18

CPC分类号： B82Y10/00 ,  B29C43/003 ,  B29C43/021 ,  B29C2043/025 ,  B82Y40/00 ,  G03F7/0002 ,  H05K3/061 ,  Y10S977/887 ,  Y10S977/897

摘要： A method of forming a relief image in a structure comprising a substrate and a transfer layer formed thereon comprises covering the transfer layer with a polymerizable fluid composition, and then contacting the polymerizable fluid composition with a mold having a relief structure formed therein such that the polymerizable fluid composition fills the relief structure in the mold. The polymerizable fluid composition is subjected to conditions to polymerize polymerizable fluid composition and form a solidified polymeric material therefrom on the transfer layer. The mold is then separated from the solid polymeric material such that a replica of the relief structure in the mold is formed in the solidified polymeric material; and the transfer layer and the solidified polymeric material are subjected to an environment to selectively etch the transfer layer relative to the solidified polymeric material such that a relief image is formed in the transfer layer.

摘要翻译： 在包括基板和形成在其上的转印层的结构中形成浮雕图像的方法包括用可聚合流体组合物覆盖转印层，然后使可聚合流体组合物与其中形成有浮雕结构的模具接触，使得可聚合的 流体组合物填充模具中的浮雕结构。 可聚合流体组合物经受聚合可聚合流体组合物并在转移层上形成固化的聚合物材料的条件。 然后将模具与固体聚合物材料分离，使得在固化的聚合物材料中形成模具中的浮雕结构的复制品; 并且转印层和固化的聚合物材料经受环境以相对于固化的聚合物材料选择性地蚀刻转印层，使得在转印层中形成浮雕图像。