公开(公告)号：US20130256771A1

公开(公告)日：2013-10-03

申请号：US13900581

申请日：2013-05-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato ,  Shuhei Nagatsuka ,  Takanori Matsuzaki ,  Hiroki Inoue

IPC: H01L27/108

CPC classification number: H01L29/7869 ,  G11C16/0425 ,  H01L27/105 ,  H01L27/108 ,  H01L27/10802 ,  H01L27/10805 ,  H01L27/11 ,  H01L27/115 ,  H01L27/11517 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/11563 ,  H01L27/11568 ,  H01L27/1225 ,  H01L28/40 ,  H01L29/78693 ,  H01L29/788 ,  H01L29/7881 ,  H01L29/792

Abstract: The semiconductor device includes a source line, a bit line, a signal line, a word line, memory cells connected in parallel between the source line and the bit line, a first driver circuit electrically connected to the source line and the bit line through switching elements, a second driver circuit electrically connected to the source line through a switching element, a third driver circuit electrically connected to the signal line, and a fourth driver circuit electrically connected to the word line. The memory cell includes a first transistor including a first gate electrode, a first source electrode, and a first drain electrode, a second transistor including a second gate electrode, a second source electrode, and a second drain electrode, and a capacitor. The second transistor includes an oxide semiconductor material.

Abstract translation: 半导体器件包括源极线，位线，信号线，字线，在源极线和位线之间并联连接的存储器单元，通过开关电连接到源极线和位线的第一驱动器电路 元件，通过开关元件电连接到源极线的第二驱动器电路，电连接到信号线的第三驱动电路，以及电连接到字线的第四驱动电路。 存储单元包括第一晶体管，包括第一栅电极，第一源电极和第一漏电极，第二晶体管包括第二栅电极，第二源电极和第二漏极，以及电容器。 第二晶体管包括氧化物半导体材料。

公开(公告)号：US20130228838A1

公开(公告)日：2013-09-05

申请号：US13861681

申请日：2013-04-12

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hiroki Inoue ,  Kiyoshi Kato ,  Takanori Matsuzaki ,  Shuhei Nagatsuka

IPC: H01L27/108

CPC classification number: H01L27/1052 ,  G11C11/404 ,  G11C11/405 ,  G11C11/4091 ,  G11C16/0408 ,  G11C16/08 ,  G11C16/24 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/425 ,  H01L21/441 ,  H01L21/477 ,  H01L27/108 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/1156 ,  H01L27/1207 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/66969 ,  H01L29/78651 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device including a nonvolatile memory cell in which a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor are included is provided. Data is written to the memory cell by turning on the writing transistor and applying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor, so that the predetermined amount of charge is held in the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential.

公开(公告)号：US20130162306A1

公开(公告)日：2013-06-27

申请号：US13721120

申请日：2012-12-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki Inoue ,  Tatsuya Onuki

IPC: H03K17/06

CPC classification number: H03K17/063 ,  G11C11/403 ,  G11C2211/4016

Abstract: Provided is a method for driving a semiconductor device, which allows a reduction in scale of a circuit, reduce the power consumption, and increase the speed of reading data. An H level (data “1”) potential or an L level (data “0”) potential is written to a node of a memory cell. Potentials of a source line and a bit line are set to the same potential at an M level (L level

Abstract translation: 提供了一种用于驱动半导体器件的方法，其允许减小电路的规模，降低功耗，并且提高读取数据的速度。 将H电平（数据“1”）电位或L电平（数据“0”）电位写入存储单元的节点。 源极线和位线的电位在M电平（L电平

公开(公告)号：US12294805B2

公开(公告)日：2025-05-06

申请号：US18584020

申请日：2024-02-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiichi Yoneda ,  Hiroki Inoue

IPC: H04N25/78 ,  H04N25/709 ,  H04N25/77 ,  H10K39/32

Abstract: An imaging device with low power consumption is provided. A pixel includes a first circuit and a second circuit. The first circuit can generate imaging data and retain difference data that is a difference between the imaging data and data obtained in an initial frame. The second circuit includes a circuit that compares the difference data and a voltage range set arbitrarily. The second circuit supplies a reading signal based on the comparison result. With the use of the structure, reading from the pixel is not performed when it is determined that the difference data is within the set voltage range and reading from the pixel can be performed when it is determined that the difference data is outside the voltage range.

公开(公告)号：US12238435B2

公开(公告)日：2025-02-25

申请号：US18668606

申请日：2024-05-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takeya Hirose ,  Seiichi Yoneda ,  Hiroki Inoue ,  Takayuki Ikeda ,  Shunpei Yamazaki

IPC: H04N25/78 ,  H04N25/705 ,  H04N25/77

Abstract: An imaging device having a function of processing an image is provided. The imaging device has an additional function such as image processing, can hold analog data obtained by an image capturing operation in a pixel, and can extract data obtained by multiplying the analog data by a predetermined weight coefficient. Difference data between adjacent light-receiving devices can be obtained in a pixel, and data on luminance gradient can be obtained. When the data is taken in a neural network or the like, inference of distance data or the like can be performed. Since enormous volume of image data in the state of analog data can be held in pixels, processing can be performed efficiently.

公开(公告)号：US12040795B2

公开(公告)日：2024-07-16

申请号：US17413791

申请日：2019-12-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki Inoue ,  Munehiro Kozuma ,  Takeshi Aoki ,  Shuji Fukai ,  Fumika Akasawa ,  Shintaro Harada ,  Sho Nagao

IPC: H03K19/094 ,  H01L27/06

CPC classification number: H03K19/094 ,  H01L27/0629

Abstract: A semiconductor device using unipolar transistors, in which high and low levels are expressed using high and low power supply potentials, is provided. The semiconductor device includes four transistors, two capacitors, two wirings, two input terminals, and an output terminal. A source or a drain of the first transistor and a source or a drain of the fourth transistor are electrically connected to the first wiring. A gate of the fourth transistor is electrically connected to the first input terminal, and a gate of the second transistor is electrically connected to the second input terminal. A source or a drain of the second transistor and a source or a drain of the third transistor are electrically connected to the second wiring. The first transistor, the second transistor, and the two capacitors are electrically connected to the output terminal.

公开(公告)号：US11917318B2

公开(公告)日：2024-02-27

申请号：US17768972

申请日：2020-10-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiichi Yoneda ,  Hiroki Inoue

IPC: H04N25/78 ,  H04N25/709 ,  H04N25/77 ,  H10K39/32

CPC classification number: H04N25/78 ,  H04N25/709 ,  H04N25/77 ,  H10K39/32

Abstract: An imaging device with low power consumption is provided. A pixel includes a first circuit and a second circuit. The first circuit can generate imaging data and retain difference data that is a difference between the imaging data and data obtained in an initial frame. The second circuit includes a circuit that compares the difference data and a voltage range set arbitrarily. The second circuit supplies a reading signal based on the comparison result. With the use of the structure, reading from the pixel is not performed when it is determined that the difference data is within the set voltage range and reading from the pixel can be performed when it is determined that the difference data is outside the voltage range.

公开(公告)号：US11227543B2

公开(公告)日：2022-01-18

申请号：US16489716

申请日：2018-02-26

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shintaro Harada ,  Yoshiyuki Kurokawa ,  Takeshi Aoki ,  Yuki Okamoto ,  Hiroki Inoue ,  Koji Kusunoki ,  Yosuke Tsukamoto ,  Katsuki Yanagawa ,  Kei Takahashi ,  Shunpei Yamazaki

IPC: G06F3/041 ,  G09G3/3225 ,  G06F1/16 ,  G06K9/00 ,  G06N3/04 ,  G06N3/08 ,  G09G5/22 ,  G09G3/36

Abstract: An electronic device capable of efficiently recognizing a handwritten character is provided.
The electronic device includes a first circuit, a display portion, and a touch sensor. The first circuit includes a neural network. The display portion includes a flexible display. The touch sensor has the function of outputting an input handwritten character as image information to the first circuit. The first circuit has the function of analyzing the image information and converting the image information into character information, and a function of displaying an image including the character information on the display portion. The analysis is performed by inference through the use of the neural network.

公开(公告)号：US10134789B2

公开(公告)日：2018-11-20

申请号：US14746926

申请日：2015-06-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki Okamoto ,  Yoshiyuki Kurokawa ,  Hiroki Inoue ,  Takuro Ohmaru

IPC: H01L27/146 ,  H01L29/786 ,  H01L31/105 ,  H01L31/0272

Abstract: An imaging device with high productivity and improved dynamic range is provided. The imaging device includes a pixel driver circuit and a photoelectric conversion element including a p-type semiconductor, an n-type semiconductor, and an i-type semiconductor. In a plan view, the total area of a part of the i-type semiconductor overlapped with neither a metal material nor a semiconductor material constituting the pixel driver circuit is preferably greater than or equal to 65%, more preferably greater than or equal to 80%, and still more preferably greater than or equal to 90% of the area of the whole i-type semiconductor. Plural photoelectric conversion elements are provided in the same semiconductor, whereby a process for separating the photoelectric conversion elements can be omitted. The i-type semiconductors in the plural photoelectric conversion elements are separated from each other by the p-type semiconductor or the n-type semiconductor.

公开(公告)号：US09755643B2

公开(公告)日：2017-09-05

申请号：US14967592

申请日：2015-12-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki Inoue ,  Takanori Matsuzaki ,  Shuhei Nagatsuka ,  Takahiko Ishizu ,  Tatsuya Onuki

IPC: H03L5/00 ,  H03K19/0185 ,  H03K19/00

CPC classification number: H03K19/018521 ,  G11C5/147 ,  G11C7/04 ,  G11C7/14 ,  G11C8/08 ,  G11C11/403 ,  G11C11/4085 ,  G11C11/412 ,  G11C11/418 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/0629 ,  H01L27/092 ,  H01L27/1156 ,  H03K3/356182 ,  H03K19/0016

Abstract: To provide a semiconductor device that inhibits unexpected output of a high-level signal immediately after the rise of a power supply voltage. The semiconductor device includes a first buffer circuit, a level shifter circuit, and a second buffer circuit. A first potential is supplied to the first buffer circuit, and a second potential is supplied to the level shifter circuit and the second buffer circuit; consequently, the semiconductor device returns to a normal state. When the semiconductor device returns to a normal state, the second potential is supplied, so that the potential of a node in the level shifter circuit increases. To utilize the increase in the second potential or suppress malfunction due to the increase in the potential, capacitors are provided in the level shifter circuit. This inhibits unexpected operation of a transistor in the level shifter circuit.