公开(公告)号：US10079067B1

公开(公告)日：2018-09-18

申请号：US15697469

申请日：2017-09-07

Applicant: Winbond Electronics Corp.

Inventor： Frederick Chen ,  Shao-Ching Liao ,  Ping-Kun Wang ,  Chia-Hua Ho

IPC: G11C11/00 ,  G11C16/34 ,  G11C16/04 ,  G11C16/24 ,  G11C11/56 ,  G11C13/00 ,  G11C11/16

CPC classification number: G11C16/3422 ,  G11C7/04 ,  G11C11/1673 ,  G11C11/5628 ,  G11C11/5642 ,  G11C13/0026 ,  G11C13/003 ,  G11C13/004 ,  G11C16/0483 ,  G11C16/24 ,  G11C16/28 ,  G11C2013/0057

Abstract: A data read method and a non-volatile memory apparatus using the same are provided. The data read method includes: obtaining a first read current and a second read current from a memory cell pair of the non-volatile memory; performing a calculation operation according to the first read current and the second read current to obtain a calculation result; and determining a logical state of the memory cell pair according to the calculation result. The calculation operation includes at least a signal addition operation and a signal multiplying operation.

公开(公告)号：US20180233665A1

公开(公告)日：2018-08-16

申请号：US15949078

申请日：2018-04-10

Applicant: Winbond Electronics Corp.

Inventor： Frederick Chen ,  Ping-Kun Wang ,  Shao-Ching Liao ,  Po-Yen Hsu ,  Yi-Hsiu Chen ,  Ting-Ying Shen ,  Bo-Lun Wu ,  Meng-Hung Lin ,  Chia-Hua Ho ,  Ming-Che Lin

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/146 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/122 ,  H01L45/1253 ,  H01L45/1266 ,  H01L45/1616

Abstract: A resistive random access memory is provided. The resistive random access memory includes a bottom electrode over a substrate, a top electrode, a resistance-switching layer, an oxygen exchange layer, and a sidewall protective layer. The top electrode is disposed over the bottom electrode. The resistance-switching layer is disposed between the bottom electrode and the top electrode. The oxygen exchange layer is disposed between the resistance-switching layer and the top electrode. The sidewall protective layer containing metal or semiconductor is disposed at sidewalls of the resistance-switching layer, and the sidewalls of the resistance-switching layer is doped with the metal or semiconductor from the sidewall protective layer.

公开(公告)号：US09972779B2

公开(公告)日：2018-05-15

申请号：US14967386

申请日：2015-12-14

Applicant: Winbond Electronics Corp.

Inventor： Frederick Chen ,  Ping-Kun Wang ,  Shao-Ching Liao ,  Po-Yen Hsu ,  Yi-Hsiu Chen ,  Ting-Ying Shen ,  Bo-Lun Wu ,  Meng-Hung Lin

IPC: H01L47/00 ,  H01L45/00

CPC classification number: H01L45/1266 ,  H01L45/08 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/146

Abstract: A resistive random access memory is provided. The resistive random access memory includes a bottom electrode, a top electrode, a resistance-switching layer, an oxygen exchange layer, and a sidewall protective layer. The bottom electrode is disposed over a substrate. The top electrode is disposed over the bottom electrode. The resistance-switching layer is disposed between the bottom electrode and the top electrode. The oxygen exchange layer is disposed between the resistance-switching layer and the top electrode. The sidewall protective layer as an oxygen supply layer is at least disposed at sidewalls of the oxygen exchange layer.

公开(公告)号：US09824733B2

公开(公告)日：2017-11-21

申请号：US14918574

申请日：2015-10-21

Applicant: Winbond Electronics Corp.

Inventor： Shao-Ching Liao ,  Ping-Kun Wang ,  Frederick Chen

IPC: G11C11/00 ,  H01L45/00 ,  G11C5/14 ,  G11C13/00 ,  G11C11/56 ,  H01L27/24

CPC classification number: G11C11/00 ,  G11C5/147 ,  G11C11/5642 ,  G11C11/5685 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0083 ,  H01L27/2409 ,  H01L45/00

Abstract: An operating method for a resistive memory cell and a resistive memory are provided. The operating method for the resistive memory cell includes following steps. A forming operation for the resistive memory cell is performed. Whether the resistive memory cell is in a first state is determined, wherein the first state is corresponding to a first operation. When the resistive memory cell is not in the first state, a complementary switching operation regarding a second operation for the resistive memory cell is performed, so that the resistive memory cell generates a complementary switching phenomenon regarding the second operation. Thus, the resistive memory cell which cannot retain data by normal forming operation can effectively obtain the data retention capability by the complementary switching phenomenon.

公开(公告)号：US09412445B1

公开(公告)日：2016-08-09

申请号：US14824081

申请日：2015-08-12

Applicant: Winbond Electronics Corp.

Inventor： Frederick Chen ,  Meng-Hung Lin ,  Ping-Kun Wang

IPC: G11C11/00 ,  G11C13/00 ,  G11C29/50 ,  G11C29/04

CPC classification number: G11C13/004 ,  G11C7/04 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0033 ,  G11C13/0035 ,  G11C13/0069 ,  G11C29/04 ,  G11C29/50 ,  G11C2013/0057

Abstract: A resistive memory apparatus and a reading method thereof are provided. In this method, two reading pulses are applied to a resistive memory cell, such that a first reading resistance and a second reading resistance of the resistive memory cell at different temperatures are sequentially obtained. Next, a resistive state of the second reading resistance is determined according to the reading resistances and the temperatures corresponding to the reading resistances. Thereafter, a logic level of storage data of the resistive memory cell is determined according to the resistive state of the second reading resistance.

Abstract translation: 提供了一种电阻式存储装置及其读取方法。 在该方法中，将两个读取脉冲施加到电阻性存储单元，使得在不同温度下顺次获得电阻式存储单元的第一读取电阻和第二读取电阻。 接下来，根据读取电阻和对应于读取电阻的温度来确定第二读取电阻的电阻状态。 此后，根据第二读取电阻的电阻状态来确定电阻性存储单元的存储数据的逻辑电平。