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61.发明申请公开(公告)号：US20180113633A1
公开(公告)日：2018-04-26
申请号：US15335030
申请日：2016-10-26
发明人： Horia Simionescu , Timothy Hoglund , Sridhar Rao Veerla , Panthini Pandit , Gowrisankar Radhakrishnan
IPC分类号： G06F3/06 , G06F12/0871
CPC分类号： G06F3/0619 , G06F3/065 , G06F3/0659 , G06F3/067 , G06F3/0689 , G06F12/0864 , G06F12/0871 , G06F12/0875 , G06F12/0895 , G06F2212/1016 , G06F2212/302 , G06F2212/452 , G06F2212/604 , G06F2212/621
摘要： A system and method for efficient cache buffering are provided. The disclosed method includes receiving a host command from a host, extracting command information from the host command, determining an Input/Output (I/O) action to be taken in connection with the host command, determining that the I/O action spans more than one strip, and based on the I/O action spanning more than one strip, allocating a cache frame anchor for a row on-demand along with a cache frame anchor for a strip to accommodate the I/O action.
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公开(公告)号：US09930581B2
公开(公告)日：2018-03-27
申请号：US14761430
申请日：2013-01-22
发明人： Wei Bai , Jing Han , Na Wei , Haiming Wang , Lili Zhang , Xinying Gao , Pengfei Sun
CPC分类号： H04W36/0055 , H04W76/19
摘要： Systems and techniques for link failure management in multiple connection systems. Upon detection of a link failure with a local area base station during a dual connection mode in which the user device is connected to a macro base station and a local area base station, a user device sends a failure indication and a measurement results report for serving and neighboring base stations to its serving macro base station, and selects a response to the failure based at least in part on evaluation information received from the macro base station. Upon detection of a link failure with a macro base station, the user device determines whether to reconnect to the macro base station or a different macro base station and whether to reconnect with the original local area base station or a different local area base station.
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公开(公告)号：US20180076837A1
公开(公告)日：2018-03-15
申请号：US15696898
申请日：2017-09-06
CPC分类号： H03F1/26 , H03F1/223 , H03F1/56 , H03F3/19 , H03F3/245 , H03F3/265 , H03F2200/294 , H03F2200/333 , H03F2200/387 , H03F2200/451 , H03K21/08 , H04B1/04 , H04B1/10 , H04B1/1036 , H04B1/18 , H04B1/40 , H04B15/04 , H04B2001/0491 , H04B2001/1063 , H04L27/0002
摘要： The present disclosure is directed to a dual output path LNA that can be used to break the tradeoff between the output impedance and linearity of an LNA without the problems of a programmable output impedance LNA. In an embodiment, the dual output path architecture includes an LNA driving a low level of impedance in a low voltage gain path, thus achieving high linearity in the presence of large blockers, and driving a high level of impedance in a high voltage gain path to increase the LNA's voltage gain and minimize performance degradation due to a noisier, low power receiver front-end chain following the LNA. The present disclosure is further directed to a local oscillator (LO) offset circuit with low power and reduced spur generation.
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公开(公告)号：US20180074188A1
公开(公告)日：2018-03-15
申请号：US15705723
申请日：2017-09-15
发明人： Angel Polo , Mike David Herndon , Tom F. Baker
摘要： In some aspects, the disclosure is directed to methods and systems for virtual angle-of-arrival (AoA) or angle-of-departure (AoD) tracking for virtually tracking multiple Targets. The wireless devices (e.g. Tracker and Targets) may participate in a mesh configuration and share data within the mesh. A first device may purport to be a virtual tracker, while acting as an AoA or Angle of Departure (AoD) Target. The devices being tracked (e.g. virtual targets), may instead operate as Trackers. Processor- and energy-intensive calculations may be distributed to the virtual targets and transmitted via the mesh for aggregation at the virtual tracker.
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公开(公告)号：US09912585B2
公开(公告)日：2018-03-06
申请号：US14743373
申请日：2015-06-18
发明人： Jouni Korhonen , Philippe Klein
IPC分类号： H04L12/721 , H04L12/751 , H04L12/841 , H04L12/803 , H04L12/725
CPC分类号： H04L45/66 , H04L45/02 , H04L45/302 , H04L47/125 , H04L47/28
摘要： In some aspects, the disclosure is directed to methods and systems for management of path selection and reservation between layer 3 devices, as well as path selection and reservation across L2/L3 boundaries. In one implementation, path selection can be managed by separating independent but “cooperating” layers, with layer 3 topology and non-adjacent layer 2 topologies handled separately. A first layer 3 router can be identified as a path computation engine (PCE), while other layer 3 routers can be implemented as path control clients (PCC(s)). One layer 2 PCE can be assigned per layer 2 topology, preventing competing path assignments and reservations.
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公开(公告)号：US09910798B2
公开(公告)日：2018-03-06
申请号：US14874998
申请日：2015-10-05
发明人： Horia Cristian Simionescu , Timothy E. Hoglund , Sridhar Rao Veerla , Panthini Pandit , Gowrisankar Radhakrishnan
IPC分类号： G06F13/36 , G06F13/28 , G06F12/0893 , G06F3/06
CPC分类号： G06F13/28 , G06F3/061 , G06F3/0613 , G06F3/0647 , G06F3/0656 , G06F3/0659 , G06F3/0689 , G06F12/0893 , G06F2212/1016 , G06F2212/60
摘要： Methods and structure for managing cache memory for a storage controller. One exemplary embodiment a Redundant Array of Independent Disks (RAID) storage controller. The storage controller includes an interface operable to receive Input/Output (I/O) requests from a host, a Direct Memory Access (DMA) module, a memory comprising cache data for a logical volume, and a control unit. The control unit is able to generate Scatter Gather Lists (SGLs) that indicate the location of cache data for incoming read requests. Each SGL is stored in the memory, and at least one SGL points to cache data that is no longer indexed by the cache. The control unit is also able to service an incoming read request based on the SGL, by directing the DMA module to transfer the cache data that is no longer indexed to the host.
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公开(公告)号：US20180063951A1
公开(公告)日：2018-03-01
申请号：US15251230
申请日：2016-08-30
发明人： Nitesh Kumbhat , Li Sun , Aaron Lee , Deog-Soon Choi , Hyun-Mo Ku , Jack Ajoian
CPC分类号： H05K1/111 , H05K1/0271 , H05K1/0373 , H05K1/185 , H05K3/0014 , H05K9/0081 , H05K2201/068 , H05K2201/10977
摘要： A process for forming an encapsulating mold compound into a molded solder mask on a bottom surface of a PCB is provided that allows the molded solder mask to have a very precise, preselected thickness, or height, while also ensuring that no gaps between the solder mask and side walls of the electrical contact pads exist. A circuit board and circuit board assembly that incorporate the molded solder mask are also provided. The molded solder mask is fabricated in such a way that overlap between the molded solder mask and the electrical contact pads and gaps between the molded solder mask and the side walls of the electrical contact pads are avoided. In addition, the molded solder mask allows the pitch between adjacent electrical contact pads to be greatly reduced compared to the pitch that is possible using a traditional solder mask formed by the traditional photolithographic approach.
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公开(公告)号：US20180062892A1
公开(公告)日：2018-03-01
申请号：US15803724
申请日：2017-11-03
CPC分类号： H04L27/18 , H04B7/0408 , H04B7/063 , H04W16/28 , H04W52/38 , H04W76/27 , H04W88/085
摘要： A device implementing a distributed dynamic configuration of a scalable radio frequency communication system includes a primary radio frequency (RF) integrated circuit (RFIC) and at least one secondary RFIC. The primary RFIC includes at least one phase shifter, and the primary RFIC may be configured to apply a first phase shift to an RF signal using the at least one first phase shifter, and to transmit the RF signal to at least one secondary RFIC. The at least one secondary RFIC includes at least one second phase shifter, and the at least one secondary RFIC may be configured to apply a second phase shift to the RF signal using the at least one second phase shifter, and to transmit the RF signal via at least one antenna element. The first and second phase shifts may be received by the primary RFIC from a baseband processor.
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公开(公告)号：US20180062020A1
公开(公告)日：2018-03-01
申请号：US15797827
申请日：2017-10-30
发明人： Simon Fafard , Denis Masson
IPC分类号： H01L31/10 , H01L31/028 , H01L31/0693 , H01L31/0735 , H01L31/103 , H01L31/109 , H01L31/18 , H01L31/04
CPC分类号： H01L31/10 , H01L31/0304 , H01L31/0693 , H01L31/0735 , H01L31/1035 , H01L31/109 , H01L31/14 , H01L31/1852 , H02S40/44 , Y02E10/544
摘要： An optical transducer, optoelectronic device, and semiconductor are disclosed. An illustrative optical transducer is disclosed to include a plurality of p-n stacks, where each p-n stack comprises at least a p-layer and an n-layer, and formed therein a built-in photovoltage between the p-layer and the n-layer. The p-layers and n-layers are disclosed to have substantially the same n-type material in substantially the same composition such that each p-n stack in the plurality of p-n stacks has a substantially similar built-in photovoltage. The optical transducer is further disclosed to include a plurality of connecting layers, each connecting layer in the plurality of connecting layers being sandwiched between two adjacent p-n stacks for electrically connecting the two adjacent p-n stacks. The p-n stacks in the plurality of p-n stacks may be arranged such that the built-in photovoltage of each p-n stack additively contributes to an overall electric potential of the transducer.
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公开(公告)号：US09907169B1
公开(公告)日：2018-02-27
申请号：US15251230
申请日：2016-08-30
发明人： Nitesh Kumbhat , Li Sun , Aaron Lee , Deog-Soon Choi , Hyun-Mo Ku , Jack Ajoian
CPC分类号： H05K1/111 , H05K1/0271 , H05K1/0373 , H05K1/185 , H05K3/0014 , H05K9/0081 , H05K2201/068 , H05K2201/10977
摘要： A process for forming an encapsulating mold compound into a molded solder mask on a bottom surface of a PCB is provided that allows the molded solder mask to have a very precise, preselected thickness, or height, while also ensuring that no gaps between the solder mask and side walls of the electrical contact pads exist. A circuit board and circuit board assembly that incorporate the molded solder mask are also provided. The molded solder mask is fabricated in such a way that overlap between the molded solder mask and the electrical contact pads and gaps between the molded solder mask and the side walls of the electrical contact pads are avoided. In addition, the molded solder mask allows the pitch between adjacent electrical contact pads to be greatly reduced compared to the pitch that is possible using a traditional solder mask formed by the traditional photolithographic approach.
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