公开(公告)号：US20100219867A1

公开(公告)日：2010-09-02

申请号：US12659010

申请日：2010-02-23

Applicant: Jong-Ryun Choi ,  Dong Hwan Lee ,  Su Ho Kim ,  Won Lee ,  Alex Joo ,  Ji Hun Oh

Inventor： Jong-Ryun Choi ,  Dong Hwan Lee ,  Su Ho Kim ,  Won Lee ,  Alex Joo ,  Ji Hun Oh

IPC: H03L7/06

CPC classification number: H03L7/0814 ,  H03L7/0805 ,  H03L7/0818 ,  H03L7/10

Abstract: A delay locked loop is provided. The delay locked loop controls the number of delay cells that delay the phase of an input clock during a locking operation and controls a phase delay value of at least one delay cell among a plurality of delay cells after the locking operation is completed.

Abstract translation: 提供延迟锁定环。 延迟锁定环控制在锁定操作期间延迟输入时钟的相位的延迟单元的数量，并且在锁定操作完成之后控制多个延迟单元中的至少一个延迟单元的相位延迟值。

公开(公告)号：US20100194456A1

公开(公告)日：2010-08-05

申请号：US12592753

申请日：2009-12-02

Applicant: Hee Chai Kang ,  Kyeong Ho Ryu ,  Seong Ook Jung ,  Won Lee ,  Dong Hwan Lee ,  Alex Joo ,  Jong Ryun Choi

Inventor： Hee Chai Kang ,  Kyeong Ho Ryu ,  Seong Ook Jung ,  Won Lee ,  Dong Hwan Lee ,  Alex Joo ,  Jong Ryun Choi

IPC: H03L7/06

CPC classification number: H03L7/0814 ,  H03K5/00006 ,  H03K5/133 ,  H03K2005/00058 ,  H03L7/07 ,  H03L7/0995 ,  H03L7/10

Abstract: A delay locked loop controls a plurality of delay blocks included in a delay line and thus generate a plurality of clock signals which have a frequency obtained by multiplying a frequency of a reference clock signal, an accurate phase delay, and a constant duty cycle. The delay locked loop calculates an initial delay value and applies it to the delay blocks, thereby preventing harmonic locking and reducing locking time.

Abstract translation: 延迟锁定环控制包括在延迟线中的多个延迟块，从而产生具有通过将参考时钟信号的频率，精确相位延迟和恒定占空比相乘而获得的频率的多个时钟信号。 延迟锁定环路计算初始延迟值并将其应用于延迟块，从而防止谐波锁定并减少锁定时间。

公开(公告)号：US20100173284A1

公开(公告)日：2010-07-08

申请号：US12649239

申请日：2009-12-29

Applicant: Dong Hwan LEE ,  Jin Seok Kang ,  Jae Sung Lee ,  Young Suk Park ,  Dong Hyun Kim

Inventor： Dong Hwan LEE ,  Jin Seok Kang ,  Jae Sung Lee ,  Young Suk Park ,  Dong Hyun Kim

IPC: C12Q1/70

CPC classification number: C12Q1/707 ,  C12Q1/6851

Abstract: The present invention relates to a composition for detection of HCV by a single step reaction, comprising a specific primer and probe. In particular, the present invention relates to a composition for detection of HCV by a single step reaction, comprising the primer sequences of SEQ ID NOs:1 and 2; a composition for detection of HCV by a single step reaction, comprising both the primer sequences and a probe of SEQ ID NOs:5 or 9; a method for detecting HCV by a single step reaction, comprising the steps of obtaining a sample from a subject, and amplifying and detecting HCV using the primer and probe; and a kit comprising the primer and probe, in which the HCV detection method is characterized by a single step reaction.

Abstract translation: 本发明涉及用于通过单步反应检测HCV的组合物，其包含特异性引物和探针。 特别地，本发明涉及通过单步反应检测HCV的组合物，其包含SEQ ID NO：1和2的引物序列; 用于通过单步反应检测HCV的组合物，其包含引物序列和SEQ ID NO：5或9的探针; 一种通过单步反应检测HCV的方法，包括以下步骤：从受试者获得样品，并使用引物和探针扩增和检测HCV; 以及包含引物和探针的试剂盒，其中HCV检测方法的特征在于单步反应。

公开(公告)号：US20090295496A1

公开(公告)日：2009-12-03

申请号：US12262206

申请日：2008-10-31

Applicant: Dong Hwan LEE ,  Hee Soo YOON

Inventor： Dong Hwan LEE ,  Hee Soo YOON

IPC: H01P5/10 ,  H03H7/42

CPC classification number: H01P5/10 ,  H03H7/1758 ,  H03H7/1775 ,  H03H7/422

Abstract: A balun having a first balanced terminal, a second balanced terminal and an unbalanced terminal, includes a filter unit and a first transmission line. The filter unit is connected to the first balanced terminal, the second balanced terminal and the unbalanced terminal, and includes a low-pass filter and a high-pass filter. The first transmission line is connected between the filter unit and the first balanced terminal.

Abstract translation: 具有第一平衡端子，第二平衡端子和不平衡端子的平衡 - 不平衡转换器包括滤波器单元和第一传输线。 滤波器单元连接到第一平衡端子，第二平衡端子和不平衡端子，并且包括低通滤波器和高通滤波器。 第一传输线连接在滤波器单元和第一平衡端子之间。

公开(公告)号：US20090268419A1

公开(公告)日：2009-10-29

申请号：US12436996

申请日：2009-05-07

Applicant: Don Chul Choi ,  Jae Cheol Ju ,  Dong Hwan Lee ,  Sang Soo Park ,  Hee Soo Yoon

Inventor： Don Chul Choi ,  Jae Cheol Ju ,  Dong Hwan Lee ,  Sang Soo Park ,  Hee Soo Yoon

IPC: H05K7/12

CPC classification number: H05K1/023 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/24226 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H05K1/0233 ,  H05K1/112 ,  H05K1/16 ,  H05K1/162 ,  H05K3/4611 ,  H05K2201/09309 ,  H05K2201/09454 ,  H05K2201/09718 ,  H05K2201/10022 ,  H05K2201/1003 ,  H01L2924/00

Abstract: Disclosed herein is a printed circuit board having an RF module power stage circuit embedded therein. Specifically, this invention relates to a printed circuit board having an RF module power stage circuit embedded therein, in which a terminal pad for a resistor, a bead, or an inductor is defined or formed on a power supply plane of a multilayered wired board to connect the resistor, the bead, or the inductor to the power supply plane, and the resistor, the bead, or the inductor is connected in parallel with a decoupling capacitor by using a via hole or by embedding the resistor, the bead or the inductor perpendicular to the power supply plane, thus decreasing the size of the RF module and improving the performance thereof.

公开(公告)号：US20090268418A1

公开(公告)日：2009-10-29

申请号：US12437042

申请日：2009-05-07

Applicant: Don Chul Choi ,  Jae Cheol Ju ,  Dong Hwan Lee ,  Sang Soo Park ,  Hee Soo Yoon

Inventor： Don Chul Choi ,  Jae Cheol Ju ,  Dong Hwan Lee ,  Sang Soo Park ,  Hee Soo Yoon

IPC: H05K1/18

CPC classification number: H05K1/023 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/24226 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H05K1/0233 ,  H05K1/112 ,  H05K1/16 ,  H05K1/162 ,  H05K3/4611 ,  H05K2201/09309 ,  H05K2201/09454 ,  H05K2201/09718 ,  H05K2201/10022 ,  H05K2201/1003 ,  H01L2924/00

Abstract: Disclosed herein is a printed circuit board having an RF module power stage circuit embedded therein. Specifically, this invention relates to a printed circuit board having an RF module power stage circuit embedded therein, in which a terminal pad for a resistor, a bead, or an inductor is defined or formed on a power supply plane of a multilayered wired board to connect the resistor, the bead, or the inductor to the power supply plane, and the resistor, the bead, or the inductor is connected in parallel with a decoupling capacitor by using a via hole or by embedding the resistor, the bead or the inductor perpendicular to the power supply plane, thus decreasing the size of the RF module and improving the performance thereof.

Abstract translation: 这里公开了具有嵌入其中的RF模块功率级电路的印刷电路板。 具体地说，本发明涉及一种具有嵌入其中的RF模块功率级电路的印刷电路板，其中在多层有线电路板的电源平面上限定或形成用于电阻器，焊道或电感器的端子焊盘， 将电阻器，焊道或电感器连接到电源平面，并且电阻器，焊道或电感器通过使用通孔或通过嵌入电阻器，焊道或电感器而与去耦电容器并联连接 垂直于电源平面，从而减小RF模块的尺寸并提高其性能。

公开(公告)号：US20090224849A1

公开(公告)日：2009-09-10

申请号：US12211331

申请日：2008-09-16

Applicant: Dong Hwan Lee ,  Hee Soo Yoon

Inventor： Dong Hwan Lee ,  Hee Soo Yoon

IPC: H03H7/01

CPC classification number: H03H7/0115 ,  H03H7/1766 ,  H03H7/1775 ,  H03H2001/0085

Abstract: There is provided a band pass filter including: a stacked body having a stacked structure of a plurality of dielectric sheets; and a plurality of elements provided in the stacked body, the plurality of elements including: a first capacitor electrode; a second capacitor electrode partially overlapping the first capacitor electrode to form capacitive coupling; a third capacitor electrode connected to the second capacitor electrode; a first inductor pattern having one end connected to the first capacitor electrode and the other end connected to a ground; a second inductor pattern having one end connected to the third capacitor electrode and the other end connected to the ground; an input terminal provided at one region of the first inductor pattern; and an output terminal provided at one region of the second inductor pattern.

Abstract translation: 提供了一种带通滤波器，包括：堆叠体，其具有多个电介质层的堆叠结构; 以及设置在所述层叠体中的多个元件，所述多个元件包括：第一电容器电极; 第二电容器电极部分地与第一电容器电极重叠以形成电容耦合; 连接到第二电容器电极的第三电容器电极; 第一电感器图案，其一端连接到第一电容器电极，另一端连接到地; 第二电感器图案，其一端连接到第三电容器电极，另一端连接到地; 输入端子，设置在所述第一电感器图案的一个区域; 以及设置在第二电感器图案的一个区域处的输出端子。

公开(公告)号：US07557445B2

公开(公告)日：2009-07-07

申请号：US11431021

申请日：2006-05-10

Applicant: Don C. Choi ,  Dong-Hwan Lee ,  Hee-Soo Yoon

Inventor： Don C. Choi ,  Dong-Hwan Lee ,  Hee-Soo Yoon

IPC: H01L23/48 ,  H01R12/00 ,  H05K1/00

CPC classification number: H05K1/144 ,  H01L23/49811 ,  H01L2224/16225 ,  H01L2924/01019 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15174 ,  H01L2924/16195 ,  H01L2924/1627 ,  H01L2924/3011 ,  H05K3/368 ,  H05K3/445 ,  H05K2201/10318 ,  H05K2201/10378 ,  Y10S439/931 ,  Y10T29/49126 ,  H01L2924/00

Abstract: A multilayer substrate, comprising a first substrate, a connector and a second substrate, is disclosed. The first substrate has a circuit pattern. The connector, coupling onto the first substrate, has a ring structure, in which a plurality of holes are separated a predetermined distance from one another. The second substrate, coupling onto the second substrate by inserting the connector, has a circuit pattern, which is electrically connected to a circuit pattern formed on the first substrate using the plurality of holes formed on the connector. A multilayer substrate and a method for producing it in accordance with the present invention can shield the EMI generated by a high-speed switching element.

Abstract translation: 公开了一种包括第一基板，连接器和第二基板的多层基板。 第一衬底具有电路图案。 耦合到第一基板上的连接器具有环形结构，其中多个孔彼此隔开预定距离。 通过插入连接器而耦合到第二基板上的第二基板具有电路图案，其使用形成在连接器上的多个孔电连接到形成在第一基板上的电路图案。 根据本发明的多层基板及其制造方法可以屏蔽由高速开关元件产生的EMI。

公开(公告)号：US20080024480A1

公开(公告)日：2008-01-31

申请号：US11766149

申请日：2007-06-21

Applicant: Ahn-Ho Jee ,  Dong-Hwan Lee ,  Chul-Hwan Lee ,  Young-Man Kim

Inventor： Ahn-Ho Jee ,  Dong-Hwan Lee ,  Chul-Hwan Lee ,  Young-Man Kim

IPC: G06F3/038

CPC classification number: G06F1/3203 ,  G06F1/3265 ,  G09G3/3696 ,  G09G2320/0613 ,  G09G2330/021 ,  Y02D10/153

Abstract: A display panel includes a light-providing unit, a display panel and a panel driving unit. The display panel selectively displays an image corresponding to a first driving mode and a second driving mode using light from the light-providing unit. The panel driving unit includes a power supply, a data driver and a gate controller. The power supply includes a first power supply and a second power supply selectively outputting a first power voltage and a second power voltage corresponding to the first driving mode and the second driving mode. The second power voltage is smaller than the first power voltage. The data driver and the gate controller respectively output a data voltage and a gate controlling signal to the display panel corresponding to the driving mode.

Abstract translation: 显示面板包括发光单元，显示面板和面板驱动单元。 显示面板使用来自光提供单元的光来选择性地显示与第一驱动模式对应的图像和第二驱动模式。 面板驱动单元包括电源，数据驱动器和门控制器。 电源包括第一电源和第二电源，其选择性地输出对应于第一驱动模式和第二驱动模式的第一电源电压和第二电源电压。 第二电源电压小于第一电源电压。 数据驱动器和门控制器分别将数据电压和门控制信号输出到对应于驱动模式的显示面板。

公开(公告)号：US20080012819A1

公开(公告)日：2008-01-17

申请号：US11690687

申请日：2007-03-23

Applicant: Chul Hwan Lee ,  Ahn Ho Jee ,  Dong Hwan Lee ,  Jin Young Choi ,  Yong Han Park ,  Tae Kyung Lee

Inventor： Chul Hwan Lee ,  Ahn Ho Jee ,  Dong Hwan Lee ,  Jin Young Choi ,  Yong Han Park ,  Tae Kyung Lee

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G3/3614 ,  G09G2310/0281 ,  G09G2330/021

Abstract: A gate driving unit connected to odd-numbered gate lines and a gate driving unit connected to even-numbered gate lines are sequentially operated, and a common voltage signal is inverted when the operation states of the two gate driving units are changed, thereby minimizing a number of changes in the voltage level of the common voltage signal supplied to a display panel during one frame, reducing power consumption of the display device, and allowing pixels of the display panel to perform line inversion.

Abstract translation: 连接到奇数编号的栅极线的栅极驱动单元和连接到偶数栅极线的栅极驱动单元被顺序地操作，并且当两个栅极驱动单元的操作状态改变时，公共电压信号被反转，从而最小化 在一帧期间提供给显示面板的公共电压信号的电压电平的变化数量，降低显示装置的功耗，并允许显示面板的像素进行线路反转。