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    Semiconductor device having a semiconductor substrate with reduced step between memory cells
    61.
    发明授权
    Semiconductor device having a semiconductor substrate with reduced step between memory cells 失效
    半导体器件具有在存储单元之间具有减小的步骤的半导体衬底

    公开(公告)号：US5300814A

    公开(公告)日：1994-04-05

    申请号：US915898

    申请日：1992-07-17

    Applicant: Susumu Matsumoto ,  Shin Hashimoto ,  Toshio Yamada ,  Yoshiro Nakata

    Inventor： Susumu Matsumoto ,  Shin Hashimoto ,  Toshio Yamada ,  Yoshiro Nakata

    IPC: H01L21/768 ,  H01L21/8242 ,  H01L23/522 ,  H01L23/528 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L23/48 ,  H01L29/46

    CPC classification number: H01L27/105 ,  H01L23/522 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  Y10S257/92

    Abstract: A semiconductor device comprising a semiconductor substrate, a plurality of memory cell regions each having a plurality of memory cells disposed on the semiconductor substrate, a word line formed in a first level above the semiconductor substrate, a bit line formed in a second level above the first level, and a backing line having a lower resistance than the word line and formed in a third level above the second level. A dummy bit line is formed in the second level outside the memory cell region so as to reduce the step formed at the periphery of the memory cell region. The dummy bit line is also used to interconnect the word line and the backing line so that an electrical connection therebetween is stabilized.

    Abstract translation: 一种半导体器件，包括半导体衬底，多个存储单元区域，每个存储单元区域具有设置在半导体衬底上的多个存储单元，形成在半导体衬底上方的第一级中的字线，形成在第二级上方的位线 第一级和背衬线，其具有比字线更低的电阻并且形成在高于第二级的第三级中。 在存储单元区域外部的第二电平中形成虚拟位线，以便减小形成在存储单元区域周边的台阶。 虚拟位线也用于互连字线和背衬线，使得它们之间的电连接稳定。

    Epitaxial wafer, method for manufacturing gallium nitride semiconductor device, gallium nitride semiconductor device and gallium oxide wafer
    62.
    发明授权
    Epitaxial wafer, method for manufacturing gallium nitride semiconductor device, gallium nitride semiconductor device and gallium oxide wafer 失效
    外延晶片，氮化镓半导体器件的制造方法，氮化镓半导体器件和氧化镓晶片

    公开(公告)号：US08592289B2

    公开(公告)日：2013-11-26

    申请号：US13148543

    申请日：2010-02-04

    Applicant: Shin Hashimoto ,  Katsushi Akita ,  Shinsuke Fujiwara ,  Hideaki Nakahata ,  Kensaku Motoki

    Inventor： Shin Hashimoto ,  Katsushi Akita ,  Shinsuke Fujiwara ,  Hideaki Nakahata ,  Kensaku Motoki

    IPC: H01L21/20 ,  H01L21/36 ,  C30B23/00 ,  C30B25/00 ,  C30B28/12 ,  C30B28/14

    CPC classification number: H01L21/0242 ,  C30B25/18 ,  C30B29/16 ,  C30B29/403 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/045 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787 ,  H01L33/007 ,  H01L33/16

    Abstract: A gallium nitride based semiconductor device is provided which includes a gallium nitride based semiconductor film with a flat c-plane surface provided on a gallium oxide wafer. A light emitting diode LED includes a gallium oxide support base 32 having a primary surface 32a of monoclinic gallium oxide, and a laminate structure 33 of Group III nitride. A semiconductor mesa of the laminate structure 33 includes a low-temperature GaN buffer layer 35, an n-type GaN layer 37, an active layer 39 of a quantum well structure, and a p-type gallium nitride based semiconductor layer 37. The p-type gallium nitride based semiconductor layer 37 includes, for example, a p-type AlGaN electron block layer and a p-type GaN contact layer. The primary surface 32a of the gallium oxide support base 32 is inclined at an angle of not less than 2 degrees and not more than 4 degrees relative to a (100) plane of monoclinic gallium oxide. Owing to this inclination, the gallium nitride based semiconductor epitaxially grown on the primary surface 32a of the gallium oxide support base has a flat surface.

    Abstract translation: 提供了一种氮化镓基半导体器件，其包括在氧化镓晶片上设置有平坦c面的氮化镓基半导体膜。 发光二极管LED包括具有单斜氧化镓的主表面32a的氧化镓载体基底32和III族氮化物的叠层结构33。 层压结构33的半导体台面包括低温GaN缓冲层35，n型GaN层37，量子阱结构的有源层39和p型氮化镓基半导体层37. p 型氮化镓系半导体层37例如包括p型AlGaN电子阻挡层和p型GaN接触层。 氧化镓载体基体32的主表面32a相对于单斜晶系氧化镓的（100）面倾斜2度以上4度以下。 由于该倾斜，在氧化镓载体基体的主表面32a上外延生长的氮化镓基半导体具有平坦的表面。

    Method for manufacturing semiconductor device using multiple ion implantation masks
    63.
    发明授权
    Method for manufacturing semiconductor device using multiple ion implantation masks 有权
    使用多个离子注入掩模制造半导体器件的方法

    公开(公告)号：US07981817B2

    公开(公告)日：2011-07-19

    申请号：US12523073

    申请日：2007-08-31

    Applicant: Koichi Hashimoto ,  Shin Hashimoto ,  Kyoko Egashira

    Inventor： Koichi Hashimoto ,  Shin Hashimoto ,  Kyoko Egashira

    IPC: H01L21/265

    CPC classification number: H01L29/7802 ,  H01L21/0465 ,  H01L21/266 ,  H01L29/0696 ,  H01L29/086 ,  H01L29/0869 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/66719 ,  Y10S438/942 ,  Y10S438/943 ,  Y10S438/945 ,  Y10S438/951

    Abstract: A production method for a semiconductor device includes providing a semiconductor substrate having semiconductor layer of a first conductivity type formed on a surface thereof; forming a first mask so as to cover a predetermined region of the semiconductor layer; (c) forming a well region of a second conductivity type by implanting impurity ions of the second conductivity type into the semiconductor layer having the first mask formed thereon; reducing the thickness of the first mask by removing a portion of the first mask; forming a second mask covering a portion of the well region by using photolithography; and forming a source region of the first conductivity type by implanting impurity ions of the first conductivity type into the semiconductor layer having the first mask with the reduced thickness and the second mask formed thereon.

    Abstract translation: 一种半导体器件的制造方法，其特征在于，在其表面形成有具有第一导电型半导体层的半导体基板， 形成第一掩模以覆盖半导体层的预定区域; 通过将第二导电类型的杂质离子注入到其上形成有第一掩模的半导体层中，形成第二导电类型的阱区; 通过去除第一掩模的一部分来减小第一掩模的厚度; 通过使用光刻法形成覆盖阱区的一部分的第二掩模; 以及通过将具有第一导电类型的杂质离子注入具有减小的厚度的第一掩模的半导体层和形成在其上的第二掩模来形成第一导电类型的源极区域。

    SEMICONDUCTOR DEVICE AND PROCESS FOR MANUFACTURING THE SAME
    64.
    发明申请
    SEMICONDUCTOR DEVICE AND PROCESS FOR MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20100048004A1

    公开(公告)日：2010-02-25

    申请号：US12523073

    申请日：2007-08-31

    Applicant: Koichi Hashimoto ,  Shin Hashimoto ,  Kyoko Egashira

    Inventor： Koichi Hashimoto ,  Shin Hashimoto ,  Kyoko Egashira

    IPC: H01L21/265

    CPC classification number: H01L29/7802 ,  H01L21/0465 ,  H01L21/266 ,  H01L29/0696 ,  H01L29/086 ,  H01L29/0869 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/66719 ,  Y10S438/942 ,  Y10S438/943 ,  Y10S438/945 ,  Y10S438/951

    Abstract: A production method for a semiconductor device includes the steps of: (a) providing a semiconductor substrate having a semiconductor layer 2 of a first conductivity type formed on a surface thereof; (b) forming a first mask 30 so as to cover a predetermined region of the semiconductor layer 2; (c) forming a well region 6 of a second conductivity type by implanting impurity ions of the second conductivity type into the semiconductor layer 2 having the first mask 30 formed thereon; (d) reducing the thickness t1 of the first mask 30 by removing a portion of the first mask 30; (e) forming a second mask 34 covering a portion of the well region 6 by using photolithography; and (f) forming a source region 8 of the first conductivity type by implanting impurity ions of the first conductivity type into the semiconductor layer 2 having the first mask 30′ with the reduced thickness and the second mask 34 formed thereon.

    Abstract translation: 半导体器件的制造方法包括以下步骤：（a）提供具有形成在其表面上的第一导电类型的半导体层2的半导体衬底; （b）形成第一掩模30以覆盖半导体层2的预定区域; （c）通过将第二导电类型的杂质离子注入到其上形成有第一掩模30的半导体层2中，形成第二导电类型的阱区6; （d）通过去除第一掩模30的一部分来减小第一掩模30的厚度t1; （e）通过使用光刻法形成覆盖阱区域6的一部分的第二掩模34; 以及（f）通过将具有第一导电类型的杂质离子注入具有减小的厚度的第一掩模30'和形成在其上的第二掩模34的半导体层2中，形成第一导电类型的源极区8。

    Apparatus and method for feeding slurry
    67.
    发明授权
    Apparatus and method for feeding slurry 失效

    公开(公告)号：US07249995B2

    公开(公告)日：2007-07-31

    申请号：US10865822

    申请日：2004-06-14

    Applicant: Akihiro Tanoue ,  Yoshiharu Hidaka ,  Shin Hashimoto

    Inventor： Akihiro Tanoue ,  Yoshiharu Hidaka ,  Shin Hashimoto

    IPC: B24C7/00

    CPC classification number: B24B37/04 ,  B24B57/02

    Abstract: A slurry feeding apparatus includes closed slurry bottle, piping, wet nitrogen generator, wet nitrogen supply pipe, suction and spray nozzles, temperature regulator, flow rate control valves, slurry delivery pump and controller for controlling the operation and flow rate of the slurry delivery pump. While a wafer is being polished by a CMP polisher, the controller continuously operates the pump. On the other hand, while the polisher is idling, the controller starts and stops the pump intermittently at regular intervals. No stirrer like a propeller is inserted into the slurry bottle, but the slurry is stirred up by spraying the slurry through the spray nozzle.

    Photomask and method for forming pattern
    68.
    发明申请
    Photomask and method for forming pattern 有权
    光掩模和形成图案的方法

    公开(公告)号：US20050074682A1

    公开(公告)日：2005-04-07

    申请号：US10957599

    申请日：2004-10-05

    Applicant: Kenji Noda ,  Shin Hashimoto

    Inventor： Kenji Noda ,  Shin Hashimoto

    IPC: G03F7/00 ,  G03C5/00 ,  G03F1/08 ,  G03F1/14 ,  G03F7/20

    CPC classification number: G03F1/36

    Abstract: A photomask includes, on a translucent substrate, three or more first light-shielding portions each in insular shape having a property of shielding exposure light and spaced equidistantly, a second light-shielding portion having a property of shielding the exposure light and formed to connect the adjacent first light-shielding portions, and first light-transmitting portions each in slit shape having a property of transmitting the exposure light and formed to be surrounded with the first and second light-shielding portions. The second light-shielding portion is formed to contain a point located equidistantly from the three or more first light-shielding portions.

    Abstract translation: 一种光掩模在透光性基板上具有三个以上的具有隔离曝光光等间隔的特性的具有岛状的三个以上的第一遮光部，具有屏蔽曝光光的特性的第二遮光部，形成为连接 相邻的第一遮光部和具有透射曝光光的特性的狭缝状的第一透光部，形成为被第一和第二遮光部包围。 第二遮光部形成为包含与三个以上的第一遮光部等距离地设置的点。

    Apparatus and method for feeding slurry
    70.
    发明授权
    Apparatus and method for feeding slurry 失效
    饲料浆料的设备和方法

    公开(公告)号：US06790127B2

    公开(公告)日：2004-09-14

    申请号：US09982064

    申请日：2001-10-19

    Applicant: Akihiro Tanoue ,  Yoshiharu Hidaka ,  Shin Hashimoto

    Inventor： Akihiro Tanoue ,  Yoshiharu Hidaka ,  Shin Hashimoto

    IPC: B24B100

    CPC classification number: B24B37/04 ,  B24B57/02

    Abstract: A slurry feeding apparatus includes closed slurry bottle, piping, wet nitrogen generator, wet nitrogen supply pipe, suction and spray nozzles, temperature regulator, flow rate control valves, slurry delivery pump and controller for controlling the operation and flow rate of the slurry delivery pump. While a wafer is being polished by a CMP polisher, the controller continuously operates the pump. On the other hand, while the polisher is idling, the controller starts and stops the pump intermittently at regular intervals. No stirrer like a propeller is inserted into the slurry bottle, but the slurry is stirred up by spraying the slurry through the spray nozzle.

    Abstract translation: 浆料输送装置包括封闭的浆液瓶，管道，湿氮发生器，湿氮供给管，抽吸喷嘴，温度调节器，流量控制阀，浆料输送泵和控制器，用于控制浆料输送泵的操作和流速 。 当晶圆被CMP抛光机抛光时，控制器连续地操作泵。 另一方面，当抛光机空转时，控制器会间歇地间歇地启动和停止泵。 没有像螺旋桨那样的搅拌器被插入到浆料瓶中，但是通过喷雾喷雾浆料来搅拌浆料。

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