公开(公告)号：US08153348B2

公开(公告)日：2012-04-10

申请号：US12034000

申请日：2008-02-20

Applicant: Srinivas D. Nemani ,  Shankar Venkataraman ,  Ellie Y. Yieh

Inventor： Srinivas D. Nemani ,  Shankar Venkataraman ,  Ellie Y. Yieh

IPC: G03F7/26

CPC classification number: G03F7/0757 ,  H01L21/02164 ,  H01L21/3086 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31612 ,  H01L21/6719 ,  H01L21/67207

Abstract: Method and systems for patterning a hardmask film using ultraviolet light is disclosed according to one embodiment of the invention. Embodiments of the present invention alleviate the processing problem of depositing and etching photoresist in order to produce a hardmask pattern. A hardmask layer, such as, silicon oxide, is first deposited on a substrate within a deposition chamber. In some cases, the hardmask layer is baked or annealed following deposition. After which, portions of the hardmask layer are exposed with ultraviolet light. The ultraviolet light produces a pattern of exposed and unexposed portions of hardmask material. Following the exposure, an etching process, such as a wet etch, may occur that removes the unexposed portions of the hardmask. Following the etch, the hardmask may be annealed, baked or subjected to a plasma treatment.

Abstract translation: 根据本发明的一个实施方案公开了使用紫外光图案化硬掩膜的方法和系统。 本发明的实施例减轻了沉积和蚀刻光刻胶的处理问题，以产生硬掩模图案。 首先将诸如氧化硅的硬掩模层沉积在沉积室内的衬底上。 在一些情况下，硬掩模层在沉积之后被烘烤或退火。 之后，硬掩模层的一部分用紫外线照射。 紫外光产生硬掩模材料的暴露和未曝光部分的图案。 曝光后，可能会发生腐蚀过程，例如湿蚀刻，从而去除硬掩模的未曝光部分。 在蚀刻之后，可以对硬掩模进行退火，烘烤或进行等离子体处理。

公开(公告)号：US07989366B2

公开(公告)日：2011-08-02

申请号：US11844810

申请日：2007-08-24

Applicant: Jeffrey C. Munro ,  Srinivas D. Nemani ,  Young S. Lee ,  Marlon Menezes ,  Christopher Dennis Bencher ,  Vijay Parihar

Inventor： Jeffrey C. Munro ,  Srinivas D. Nemani ,  Young S. Lee ,  Marlon Menezes ,  Christopher Dennis Bencher ,  Vijay Parihar

IPC: H01L21/00

CPC classification number: H01L21/268 ,  H01L21/26513

Abstract: Methods are disclosed for activating dopants in a doped semiconductor substrate. A carbon precursor is flowed into a substrate processing chamber within which the doped semiconductor substrate is disposed. A plasma is formed from the carbon precursor in the substrate processing chamber. A carbon film is deposited over the substrate with the plasma. A temperature of the substrate is maintained while depositing the carbon film less than 500° C. The deposited carbon film is exposed to electromagnetic radiation for a period less than 10 ms, and has an extinction coefficient greater than 0.3 at a wavelength comprised by the electromagnetic radiation.

Abstract translation: 公开了用于激活掺杂半导体衬底中的掺杂剂的方法。 碳前体流入其中设置掺杂半导体衬底的衬底处理室。 在基板处理室中由碳前体形成等离子体。 用等离子体沉积在衬底上的碳膜。 在沉积低于500℃的碳膜的同时保持基板的温度。沉积的碳膜暴露于电磁辐射小于10ms的时间段，并且在电磁波包括的波长处具有大于0.3的消光系数 辐射。

公开(公告)号：US20110151590A1

公开(公告)日：2011-06-23

申请号：US12846664

申请日：2010-07-29

Applicant: James D. Carducci ,  Srinivas D. Nemani ,  Hairong Tang ,  Hui Sun ,  Igor Markovsky ,  Ezra R. Gold ,  Iwalani S. Kaya ,  Ellie Y. Yieh ,  Chunlei Zhang ,  Kenneth S. Collins ,  Michael D. Armacost ,  Ajit Balakrishna ,  Thorsten B. Lill

Inventor： James D. Carducci ,  Srinivas D. Nemani ,  Hairong Tang ,  Hui Sun ,  Igor Markovsky ,  Ezra R. Gold ,  Iwalani S. Kaya ,  Ellie Y. Yieh ,  Chunlei Zhang ,  Kenneth S. Collins ,  Michael D. Armacost ,  Ajit Balakrishna ,  Thorsten B. Lill

IPC: H01L21/00 ,  C23C16/50 ,  H01L21/465

CPC classification number: H01L21/3105 ,  H01L21/31058 ,  H01L21/67167 ,  H01L21/6719 ,  H01L21/67207 ,  H01L21/76814 ,  H01L21/76825 ,  H01L21/76831

Abstract: A method, a system and a computer readable medium for integrated in-vacuo repair of low-k dielectric thin films damaged by etch and/or strip processing. A repair chamber is integrated onto a same platform as a plasma etch and/or strip chamber to repair a low-k dielectric thin film without breaking vacuum between the damage event and the repair event. UV radiation may be provided on the integrated etch/repair platform in any combination of before, after, or during the low-k repair treatment to increase efficacy of the repair treatment and/or stability of repair.

Abstract translation: 一种用于通过蚀刻和/或条带处理损坏的低k电介质薄膜的真正真正修复的方法，系统和计算机可读介质。 修复室与等离子体蚀刻和/或剥离室集成在相同的平台上，以修复低k电介质薄膜，而不破坏损坏事件和修复事件之间的真空。 紫外线辐射可以在低k修复处理之前，之后或期间以任何组合提供在集成蚀刻/修复平台上，以增加修复处理的效力和/或修复的稳定性。

公开(公告)号：US07745352B2

公开(公告)日：2010-06-29

申请号：US11845445

申请日：2007-08-27

Applicant: Abhijit Basu Mallick ,  Srinivas D. Nemani ,  Timothy W. Weidman

Inventor： Abhijit Basu Mallick ,  Srinivas D. Nemani ,  Timothy W. Weidman

IPC: H01L21/31 ,  H01L21/469 ,  B05D3/00

CPC classification number: H01L21/31633 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02337 ,  H01L21/3105 ,  H01L21/31608

Abstract: Methods of curing a silicon oxide layer on a substrate are provided. The methods may include the processes of providing a semiconductor processing chamber and a substrate and forming an silicon oxide layer overlying at least a portion of the substrate, the silicon oxide layer including carbon species as a byproduct of formation. The methods may also include introducing an acidic vapor into the semiconductor processing chamber, the acidic vapor reacting with the silicon oxide layer to remove the carbon species from the silicon oxide layer. The methods may also include removing the acidic vapor from the semiconductor processing chamber. Systems to deposit a silicon oxide layer on a substrate are also described.

Abstract translation: 提供了在基板上固化氧化硅层的方法。 所述方法可以包括提供半导体处理室和衬底以及形成覆盖衬底的至少一部分的氧化硅层的过程，所述氧化硅层包括作为形成副产物的碳物质。 所述方法还可以包括将酸性蒸气引入半导体处理室，酸性蒸汽与氧化硅层反应以从氧化硅层去除碳物质。 所述方法还可以包括从半导体处理室去除酸性蒸汽。 还描述了在衬底上沉积氧化硅层的系统。

公开(公告)号：US07524750B2

公开(公告)日：2009-04-28

申请号：US11553772

申请日：2006-10-27

Applicant: Srinivas D. Nemani ,  Young S. Lee ,  Ellie Y. Yieh ,  Anchuan Wang ,  Jason Thomas Bloking ,  Lung-Tien Han

Inventor： Srinivas D. Nemani ,  Young S. Lee ,  Ellie Y. Yieh ,  Anchuan Wang ,  Jason Thomas Bloking ,  Lung-Tien Han

IPC: H01L21/20

CPC classification number: H01L21/76224

Abstract: A process is provided for depositing an silicon oxide film on a substrate disposed in a process chamber. A process gas that includes a halogen source, a fluent gas, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The silicon oxide film is deposited over the substrate with a halogen concentration less than 1.0%. The silicon oxide film is deposited with the plasma using a process that has simultaneous deposition and sputtering components. The flow rate of the halogen source to the process chamber to the flow rate of the silicon source to the process chamber is substantially between 0.5 and 3.0.

Abstract translation: 提供了一种在设置在处理室中的衬底上沉积氧化硅膜的工艺。 包括卤素源，流动气体，硅源和氧化性气体反应物的处理气体流入处理室。 从处理气体形成具有至少1011个离子/ cm 3的离子密度的等离子体。 氧化硅膜以低于1.0％的卤素浓度沉积在衬底上。 使用具有同时沉积和溅射组分的工艺，用等离子体沉积氧化硅膜。 卤素源到处理室的流速与硅源到处理室的流速基本上在0.5和3.0之间。

公开(公告)号：US20090104789A1

公开(公告)日：2009-04-23

申请号：US11876541

申请日：2007-10-22

Applicant: Abhijit Basu Mallick ,  Jeffrey C. Munro ,  Linlin Wang ,  Srinivas D. Nemani ,  Yi Zheng ,  Zheng Yuan ,  Dimitry Lubomirsky ,  Ellie Y. Yieh

Inventor： Abhijit Basu Mallick ,  Jeffrey C. Munro ,  Linlin Wang ,  Srinivas D. Nemani ,  Yi Zheng ,  Zheng Yuan ,  Dimitry Lubomirsky ,  Ellie Y. Yieh

IPC: H01L21/31

CPC classification number: H01L21/31612 ,  C23C16/045 ,  C23C16/24 ,  C23C16/401 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/76837

Abstract: A method of forming a silicon oxide layer on a substrate. The method includes providing a substrate and forming a first silicon oxide layer overlying at least a portion of the substrate, the first silicon oxide layer including residual water, hydroxyl groups, and carbon species. The method further includes exposing the first silicon oxide layer to a plurality of silicon-containing species to form a plurality of amorphous silicon components being partially intermixed with the first silicon oxide layer. Additionally, the method includes annealing the first silicon oxide layer partially intermixed with the plurality of amorphous silicon components in an oxidative environment to form a second silicon oxide layer on the substrate. At least a portion of amorphous silicon components are oxidized to become part of the second silicon oxide layer and unreacted residual hydroxyl groups and carbon species in the second silicon oxide layer are substantially removed.

Abstract translation: 在基板上形成氧化硅层的方法。 该方法包括提供衬底并形成覆盖衬底的至少一部分的第一氧化硅层，第一氧化硅层包括残留的水，羟基和碳类。 该方法还包括将第一氧化硅层暴露于多个含硅物质以形成与第一氧化硅层部分混合的多个非晶硅组分。 此外，该方法包括在氧化环境中将与多个非晶硅组分部分混合的第一氧化硅层退火以在衬底上形成第二氧化硅层。 至少一部分非晶硅组分被氧化成第二氧化硅层的一部分，并且基本上去除了第二氧化硅层中未反应的残余羟基和碳物质。

公开(公告)号：US20090061647A1

公开(公告)日：2009-03-05

申请号：US11845445

申请日：2007-08-27

Applicant: Abhijit Basu Mallick ,  Srinivas D. Nemani ,  Timothy W. Weidman

Inventor： Abhijit Basu Mallick ,  Srinivas D. Nemani ,  Timothy W. Weidman

IPC: H01L21/31

CPC classification number: H01L21/31633 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02337 ,  H01L21/3105 ,  H01L21/31608

Abstract: Methods of curing a silicon oxide layer on a substrate are provided. The methods may include the processes of providing a semiconductor processing chamber and a substrate and forming an silicon oxide layer overlying at least a portion of the substrate, the silicon oxide layer including carbon species as a byproduct of formation. The methods may also include introducing an acidic vapor into the semiconductor processing chamber, the acidic vapor reacting with the silicon oxide layer to remove the carbon species from the silicon oxide layer. The methods may also include removing the acidic vapor from the semiconductor processing chamber. Systems to deposit a silicon oxide layer on a substrate are also described.

Abstract translation: 提供了在基板上固化氧化硅层的方法。 所述方法可以包括提供半导体处理室和衬底以及形成覆盖衬底的至少一部分的氧化硅层的过程，所述氧化硅层包括作为形成副产物的碳物质。 所述方法还可以包括将酸性蒸气引入半导体处理室，酸性蒸汽与氧化硅层反应以从氧化硅层去除碳物质。 所述方法还可以包括从半导体处理室去除酸性蒸汽。 还描述了在衬底上沉积氧化硅层的系统。

公开(公告)号：US07465680B2

公开(公告)日：2008-12-16

申请号：US11221303

申请日：2005-09-07

Applicant: Xiaolin Chen ,  Srinivas D. Nemani ,  DongQing Li ,  Jeffrey C. Munro ,  Marlon E. Menezes

Inventor： Xiaolin Chen ,  Srinivas D. Nemani ,  DongQing Li ,  Jeffrey C. Munro ,  Marlon E. Menezes

IPC: H01L21/31 ,  H01L21/469

CPC classification number: H01L21/3105 ,  C23C16/402 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/31612

Abstract: A plasma treatment process for increasing the tensile stress of a silicon wafer is described. Following deposition of a dielectric layer on a substrate, the substrate is lifted to an elevated position above the substrate receiving surface and exposed to a plasma treatment process which treats both the top and bottom surface of the wafer and increases the tensile stress of the deposited layer. Another embodiment of the invention involves biasing of the substrate prior to plasma treatment to bombard the wafer with plasma ions and raise the temperature of the substrate. In another embodiment of the invention, a two-step plasma treatment process can be used where the substrate is first exposed to a plasma at a processing position directly after deposition, and then raised to an elevated position where both the top and bottom of the wafer are exposed to the plasma.

Abstract translation: 描述了用于增加硅晶片的拉伸应力的等离子体处理工艺。 在基底上沉积介电层之后，将衬底提升到衬底接收表面上方的升高位置并暴露于等离子体处理工艺，其处理晶片的顶表面和底表面并增加沉积层的拉伸应力 。 本发明的另一实施例涉及在等离子体处理之前偏压衬底以用等离子体离子轰击晶片并提高衬底的温度。 在本发明的另一个实施例中，可以使用两步等离子体处理工艺，其中首先在沉积后直接在处理位置处暴露于等离子体，然后升高到晶片的顶部和底部两者的升高位置 暴露于等离子体。

公开(公告)号：US20070281448A1

公开(公告)日：2007-12-06

申请号：US11753968

申请日：2007-05-25

Applicant: Xiaolin Chen ,  Srinivas D. Nemani ,  Shankar Venkataraman

Inventor： Xiaolin Chen ,  Srinivas D. Nemani ,  Shankar Venkataraman

IPC: C23C16/00 ,  C23F1/00 ,  H01L21/306 ,  H01L21/20 ,  H01L21/302

CPC classification number: C23C16/045 ,  C23C16/402 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/3105 ,  H01L21/31633

Abstract: Methods of filling a gap on a substrate with silicon oxide are described. The methods may include the steps of introducing an organo-silicon precursor and an oxygen precursor to a deposition chamber, reacting the precursors to form a first silicon oxide layer in the gap on the substrate, and etching the first silicon oxide layer to reduce the carbon content in the layer. The methods may also include forming a second silicon oxide layer on the first layer, and etching the second layer to reduce the carbon content in the second layer. The silicon oxide layers are annealed after the gap is filled.

Abstract translation: 描述了用氧化硅填充衬底上的间隙的方法。 所述方法可以包括以下步骤：将有机硅前体和氧前体引入沉积室，使前体反应以在衬底上的间隙中形成第一氧化硅层，并蚀刻第一氧化硅层以还原碳 内容在图层中。 所述方法还可以包括在第一层上形成第二氧化硅层，并蚀刻第二层以降低第二层中的碳含量。 在填充间隙之后对氧化硅层进行退火。

公开(公告)号：US20070243693A1

公开(公告)日：2007-10-18

申请号：US11553772

申请日：2006-10-27

Applicant: Srinivas D. Nemani ,  Young S. Lee ,  Ellie Y. Yieh ,  Anchuan Wang ,  Jason Thomas Bloking ,  Lung-Tien Han

Inventor： Srinivas D. Nemani ,  Young S. Lee ,  Ellie Y. Yieh ,  Anchuan Wang ,  Jason Thomas Bloking ,  Lung-Tien Han

IPC: H01L21/76

CPC classification number: H01L21/76224

Abstract: A process is provided for depositing an silicon oxide film on a substrate disposed in a process chamber. A process gas that includes a halogen source, a fluent gas, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The silicon oxide film is deposited over the substrate with a halogen concentration less than 1.0%. The silicon oxide film is deposited with the plasma using a process that has simultaneous deposition and sputtering components. The flow rate of the halogen source to the process chamber to the flow rate of the silicon source to the process chamber is substantially between 0.5 and 3.0.

Abstract translation: 提供了一种在设置在处理室中的衬底上沉积氧化硅膜的工艺。 包括卤素源，流动气体，硅源和氧化性气体反应物的处理气体流入处理室。 从处理气体形成离子密度为至少10 11个/ cm 3的等离子体。 氧化硅膜以低于1.0％的卤素浓度沉积在衬底上。 使用具有同时沉积和溅射组分的工艺，用等离子体沉积氧化硅膜。 卤素源到处理室的流速与硅源到处理室的流速基本上在0.5和3.0之间。