公开(公告)号：US12040200B2

公开(公告)日：2024-07-16

申请号：US15962980

申请日：2018-04-25

Applicant: ASM IP Holding B.V.

Inventor： Shiva Rajavelu ,  John Tolle ,  Rich McCartney

IPC: H01L21/67 ,  C23C16/458 ,  C23C16/46 ,  C30B25/10

CPC classification number: H01L21/67115 ,  C30B25/10 ,  C30B25/105 ,  H01L21/67098 ,  H01L21/67248 ,  C23C16/4583 ,  C23C16/46

Abstract: A semiconductor processing apparatus is disclosed that may include a reaction chamber joined by an upstream inlet flange and a downstream outlet flange wherein a longitudinal direction of the chamber extends from the inlet flange to the outlet flange and a plurality of ribs are provided on an outer surface of at least an upper chamber wall. The semiconductor processing apparatus may also include at least one array of heating elements disposed above the reaction chamber and at least one variable positioning device coupled to the at least one array of heating elements and configured to controllably adjust the position of the at least one array of heating elements relative to the position of the plurality of ribs.

公开(公告)号：US20240011189A1

公开(公告)日：2024-01-11

申请号：US18372803

申请日：2023-09-26

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joseph P. Margetis

IPC: C30B25/14 ,  C30B25/16 ,  C30B25/18 ,  C30B25/08 ,  H01L21/67

CPC classification number: C30B25/14 ,  C30B25/16 ,  C30B25/18 ,  C30B25/08 ,  H01L21/67011

Abstract: Gas-phase reactor systems and methods suitable for use with precursors that are solid phase at room temperature and pressure are disclosed. The systems and methods as described herein can be used to, for example, form amorphous, polycrystalline, or epitaxial layers (e.g., one or more doped semiconductor layers) on a surface of a substrate.

公开(公告)号：US11374112B2

公开(公告)日：2022-06-28

申请号：US16000125

申请日：2018-06-05

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle

IPC: H01L21/02 ,  H01L29/66 ,  H01L21/285 ,  H01L29/78 ,  H01L29/167 ,  H01L29/08 ,  H01L23/535 ,  H01L29/165 ,  H01L29/45 ,  H01L29/161

Abstract: A method for depositing a Group IV semiconductor is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include, exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA metalorganic dopant precursor. The methods may further include depositing a Group IV semiconductor on a surface of the substrate. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

公开(公告)号：US20200224309A1

公开(公告)日：2020-07-16

申请号：US16816078

申请日：2020-03-11

Applicant: ASM IP Holding B.V.

Inventor： Sonti Sreeram ,  John Tolle ,  Joe Margetis ,  Junwei Su

IPC: C23C16/455

Abstract: A flange, flange assembly, and reactor system including the flange and flange assembly are disclosed. An exemplary flange assembly includes heated and cooled sections to independently control temperatures of sections of the flange. Methods of using the flange, flange assembly and reactor system are also disclosed.

公开(公告)号：US10535516B2

公开(公告)日：2020-01-14

申请号：US15886225

申请日：2018-02-01

Applicant: ASM IP Holding B.V.

Inventor： David Kohen ,  Nupur Bhargava ,  John Tolle ,  Vijay D'Costa

IPC: H01L21/00 ,  H01L21/02 ,  H01L29/165

Abstract: A method for depositing a semiconductor structure on a surface of a substrate is disclosed. The method may include: depositing a first group IVA semiconductor layer over a surface of the substrate; contacting an exposed surface of the first group IVA semiconductor layer with a first gas comprising a first chloride gas; and depositing a second group IVA semiconductor layer over a surface of the first group IVA semiconductor layer. Related semiconductor structures are also disclosed.

公开(公告)号：US10373850B2

公开(公告)日：2019-08-06

申请号：US14645158

申请日：2015-03-11

Applicant: ASM IP HOLDING B.V.

Inventor： John Tolle ,  Eric R. Hill

IPC: C23C16/46 ,  H01L21/67

Abstract: A system for removing an oxide material from a surface of a substrate can include a substrate tray to receive the substrate, and a cooling body to receive the substrate tray. The system may include a first temperature control element configured to control a temperature of the substrate tray and a second temperature control element configured to control a temperature of the cooling body, where the first temperature control element and the second temperature control element can be independently controlled. A method for removing oxide material from a surface of a substrate can include providing the substrate on a substrate tray having heating elements, cooling the substrate by transferring heat from the substrate tray to a cooling body, depositing a halogen-containing material on the cooled substrate while the substrate is on the cooling body, and subsequently sublimating the halogen-containing material by heating the cooled substrate by transferring heat from the substrate tray to the substrate.

公开(公告)号：US10262859B2

公开(公告)日：2019-04-16

申请号：US15863340

申请日：2018-01-05

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle ,  Gregory Bartlett ,  Nupur Bhargava

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/24

Abstract: A gas distribution system is disclosed in order to obtain better film uniformity on a substrate in a cross-flow reactor. The better film uniformity may be achieved by an asymmetric bias on individual injection ports of the gas distribution system. The gas distribution may allow for varied tunability of the film properties.

公开(公告)号：US20190027583A1

公开(公告)日：2019-01-24

申请号：US16000125

申请日：2018-06-05

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L29/167 ,  H01L29/08 ,  H01L29/45 ,  H01L23/535 ,  H01L21/02 ,  H01L21/285

Abstract: A method for depositing a Group IV semiconductor is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include, exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA metalorganic dopant precursor. The methods may further include depositing a Group IV semiconductor on a surface of the substrate. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

公开(公告)号：US20160314967A1

公开(公告)日：2016-10-27

申请号：US15203642

申请日：2016-07-06

Applicant: ASM IP HOLDING, B.V.

Inventor： John Tolle

IPC: H01L21/02 ,  H01L31/18 ,  H01L29/165 ,  H01L31/0745

CPC classification number: H01L21/02535 ,  C30B25/183 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/161 ,  H01L29/165 ,  H01L31/0745 ,  H01L31/1812 ,  Y02E10/50

Abstract: Methods of forming germanium-tin films using germane as a precursor are disclosed. Exemplary methods include growing films including germanium and tin in an epitaxial chemical vapor deposition reactor, wherein a ratio of a tin precursor to germane is less than 0.1. Also disclosed are structures and devices including germanium-tin films formed using the methods described herein.

Abstract translation: 公开了使用锗烷作为前体形成锗 - 锡膜的方法。 示例性方法包括在外延化学气相沉积反应器中生长包括锗和锡的膜，其中锡前体与锗烷的比例小于0.1。 还公开了包括使用本文所述的方法形成的锗 - 锡膜的结构和装置。

公开(公告)号：US09299557B2

公开(公告)日：2016-03-29

申请号：US14220001

申请日：2014-03-19

Applicant: ASM IP HOLDING B.V.

Inventor： John Tolle ,  Matthew G. Goodman ,  Robert Michael Vyne ,  Eric R. Hill

IPC: H01L21/02 ,  H01L21/3205 ,  H01L21/324 ,  H01L21/311

CPC classification number: H01L21/02049 ,  B08B5/00 ,  B08B7/0014 ,  B08B7/0071 ,  C30B23/025 ,  C30B25/186 ,  C30B29/06 ,  H01L21/02046 ,  H01L21/02068 ,  H01L21/0217 ,  H01L21/02301 ,  H01L21/02348 ,  H01L21/02532 ,  H01L21/02598 ,  H01L21/02636 ,  H01L21/02661 ,  H01L21/31116 ,  H01L21/3205 ,  H01L21/324

Abstract: A method for integrated circuit fabrication can include removing silicon oxide by a pre-clean process. The pre-clean process can include depositing a halogen-containing material on the surface of a substrate in a first reaction chamber, and transferring the substrate having the halogen-containing material to a second reaction chamber. Silicon oxide material can be removed from a surface of the substrate by sublimating the halogen-containing material in the second reaction chamber. A target material, such as a conductive material, may subsequently be deposited on the substrate surface in the second reaction chamber.