公开(公告)号：US08076711B2

公开(公告)日：2011-12-13

申请号：US13114590

申请日：2011-05-24

申请人： Yoshio Ozawa

发明人： Yoshio Ozawa

IPC分类号： H01L29/76

CPC分类号： H01L29/42324 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/7881

摘要： According to an aspect of the invention, there is provided a semiconductor device including a plurality of memory cells, comprising a plurality of floating gate electrodes which are formed on a tunnel insulating film formed on a semiconductor substrate and have an upper portion which is narrower in a channel width direction than a lower portion, an interelectrode insulating film formed on the floating gate electrodes, and a control gate electrode which is formed on the interelectrode insulating film formed on the floating gate electrodes and partially buried between the floating gate electrodes opposing each other.

公开(公告)号：US08063432B2

公开(公告)日：2011-11-22

申请号：US12805620

申请日：2010-08-10

申请人： Yoshio Ozawa

发明人： Yoshio Ozawa

IPC分类号： H01L29/788 ,  H01L29/792

CPC分类号： H01L21/28273 ,  B30B11/004 ,  H01L29/42324 ,  H01L29/42336

摘要： A semiconductor device includes a tunnel insulation film formed on a semiconductor substrate, a floating gate electrode formed on the tunnel insulation film, an inter-electrode insulation film formed on the floating gate electrode, a control gate electrode formed on the inter-electrode insulation film, a pair of oxide films which are formed between the tunnel insulation film and the floating gate electrode and are formed near lower end portions of a pair of side surfaces of the floating gate electrode, which are parallel in one of a channel width direction and a channel length direction, and a nitride film which is formed between the tunnel insulation film and the floating gate electrode and is formed between the pair of oxide films.

摘要翻译： 半导体器件包括形成在半导体衬底上的隧道绝缘膜，形成在隧道绝缘膜上的浮栅电极，形成在浮栅上的电极间绝缘膜，形成在电极间绝缘膜上的控制栅电极 形成在所述隧道绝缘膜和所述浮栅之间并且形成在所述浮栅电极的一对侧面的下端部附近的一对氧化膜，所述一对侧面在沟道宽度方向和 沟道长度方向和形成在隧道绝缘膜和浮栅之间并形成在一对氧化膜之间的氮化物膜。

公开(公告)号：US20110272745A1

公开(公告)日：2011-11-10

申请号：US13185930

申请日：2011-07-19

申请人： Masahiro Kiyotoshi ,  Akihito Yamamoto ,  Yoshio Ozawa ,  Fumitaka Arai ,  Riichiro Shirota

发明人： Masahiro Kiyotoshi ,  Akihito Yamamoto ,  Yoshio Ozawa ,  Fumitaka Arai ,  Riichiro Shirota

IPC分类号： H01L27/105

CPC分类号： H01L27/249 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/28282 ,  H01L21/30604 ,  H01L21/31055 ,  H01L21/3212 ,  H01L21/32136 ,  H01L21/762 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/115 ,  H01L27/11568 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11582 ,  H01L27/24 ,  H01L27/2409 ,  H01L27/2436 ,  H01L29/513 ,  H01L29/518 ,  H01L45/04 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/126 ,  H01L45/141 ,  H01L45/144 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1633

摘要： A semiconductor memory includes a plurality of stripe-like active areas formed by stacking, in a direction perpendicular to a substrate, a plurality of layers extending parallel to the substrate, a first gate electrode formed on first side surfaces of the active areas, the first side surfaces being perpendicular to the substrate, a second gate electrode formed on second side surfaces of the active areas, the second side surfaces being perpendicular to the substrate. The layers are patterned in self-alignment with each other, intersections of the active areas and the first gate electrode form a plurality of memory cells, and the plurality of memory cells in an intersecting plane share the first gate electrode.

摘要翻译： 半导体存储器包括通过在垂直于衬底的方向上堆叠平行于衬底延伸的多个层而形成的多个条状有源区域，形成在有源区域的第一侧表面上的第一栅极电极，第一栅极电极 侧表面垂直于衬底，形成在有源区的第二侧表面上的第二栅电极，第二侧表面垂直于衬底。 这些层彼此自对准地构图，有源区和第一栅电极的交点形成多个存储单元，并且交叉平面中的多个存储单元共享第一栅电极。

公开(公告)号：US08008152B2

公开(公告)日：2011-08-30

申请号：US11727981

申请日：2007-03-29

申请人： Ryota Fujitsuka ,  Katsuaki Natori ,  Daisuke Nishida ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Yoshio Ozawa ,  Akihito Yamamoto

发明人： Ryota Fujitsuka ,  Katsuaki Natori ,  Daisuke Nishida ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Yoshio Ozawa ,  Akihito Yamamoto

IPC分类号： H01L21/00

CPC分类号： H01L21/31608 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28273 ,  H01L21/3141 ,  H01L21/3162 ,  H01L21/31641 ,  H01L21/31645 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/66825

摘要： A method of manufacturing a semiconductor device comprising a first insulating film formed on a semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, forming the second insulating film comprises forming a lower insulating film containing oxygen and a metal element, thermally treating the lower insulating film in an atmosphere containing oxidizing gas, and forming an upper insulating film on the thermally treated lower insulating film using film forming gas containing at least one of hydrogen and chlorine.

摘要翻译： 一种制造半导体器件的方法，包括形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及形成在第二绝缘膜上的控制电极 形成第二绝缘膜包括形成含有氧和金属元素的下绝缘膜，在含氧化气体的气氛中对下绝缘膜进行热处理，并且在热处理的下绝缘膜上形成上绝缘膜，使用含有 氢和氯中的至少一种。

公开(公告)号：US07972927B2

公开(公告)日：2011-07-05

申请号：US12540663

申请日：2009-08-13

申请人： Ryota Fujitsuka ,  Katsuyuki Sekine ,  Yoshio Ozawa

发明人： Ryota Fujitsuka ,  Katsuyuki Sekine ,  Yoshio Ozawa

IPC分类号： H01L21/336 ,  H01L21/3205 ,  H01L21/4763

CPC分类号： H01L27/11568 ,  H01L29/66833 ,  H01L29/792

摘要： According to a method of manufacturing a MONOS nonvolatile semiconductor memory device, a tunnel insulating film, a charge storage layer, a block insulating film containing a metal oxide and a control gate electrode are stacked on a semiconductor substrate. Heat treatment is carried out in an atmosphere containing an oxidizing gas after the tunnel insulating film, the charge storage layer and the block insulating film are stacked on the semiconductor substrate. Thereafter, the control gate electrode is formed on the block insulating film.

摘要翻译： 根据制造MONOS非易失性半导体存储器件的方法，在半导体衬底上层叠隧道绝缘膜，电荷存储层，含有金属氧化物的块绝缘膜和控制栅电极。 在隧道绝缘膜，电荷存储层和块绝缘膜堆叠在半导体衬底上之后，在含有氧化性气体的气氛中进行热处理。 此后，控制栅电极形成在块绝缘膜上。

公开(公告)号：US20110108905A1

公开(公告)日：2011-05-12

申请号：US13007258

申请日：2011-01-14

申请人： Masayuki ICHIGE ,  Fumitaka Arai ,  Riichiro Shirota ,  Toshitake Yaegashi ,  Yoshio Ozawa ,  Akihito Yamamoto ,  Ichiro Mizushima ,  Yoshihiko Saito

发明人： Masayuki ICHIGE ,  Fumitaka Arai ,  Riichiro Shirota ,  Toshitake Yaegashi ,  Yoshio Ozawa ,  Akihito Yamamoto ,  Ichiro Mizushima ,  Yoshihiko Saito

IPC分类号： H01L29/788

CPC分类号： H01L29/42336 ,  H01L21/28273 ,  H01L27/0207 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/7881

摘要： A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the second part in an extending direction of the control gate is narrower than that of the first part. A first space between the first parts of the first and second memory cells is filled with one kind of an insulator. The control gate is arranged at a second space between the second parts of the first and second memory cells.

摘要翻译： 非易失性半导体存储器包括具有浮动栅极和控制栅极的第一和第二存储单元。 第一和第二存储单元的浮动栅极包括第一部分和布置在第一部分上的第二部分，并且第二部分在控制栅极的延伸方向上的宽度比第一部分的宽度窄。 第一和第二存储单元的第一部分之间的第一空间填充有一种绝缘体。 控制栅极被布置在第一和第二存储单元的第二部分之间的第二空间处。

公开(公告)号：US07927949B2

公开(公告)日：2011-04-19

申请号：US12755532

申请日：2010-04-07

申请人： Yoshio Ozawa ,  Isao Kamioka ,  Junichi Shiozawa ,  Akihito Yamamoto ,  Ryota Fujitsuka ,  Yoshihiro Ogawa ,  Katsuaki Natori ,  Katsuyuki Sekine ,  Masayuki Tanaka ,  Daisuke Nishida

发明人： Yoshio Ozawa ,  Isao Kamioka ,  Junichi Shiozawa ,  Akihito Yamamoto ,  Ryota Fujitsuka ,  Yoshihiro Ogawa ,  Katsuaki Natori ,  Katsuyuki Sekine ,  Masayuki Tanaka ,  Daisuke Nishida

IPC分类号： H01L21/336 ,  H01L21/8238 ,  H01L21/3205 ,  H01L21/4763

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A semiconductor memory device manufacturing method includes forming a floating gate electrode above a semiconductor substrate, forming an interelectrode insulating film above the floating gate electrode, forming a first radical nitride film on a surface of the interelectrode insulating film by first radical nitriding, and forming a control gate electrode on the first radical nitride film.

摘要翻译： 一种半导体存储器件制造方法，包括在半导体衬底上形成浮置栅电极，在浮置栅电极上形成电极间绝缘膜，通过第一自由基氮化在电极间绝缘膜的表面上形成第一自由基氮化物膜， 第一自由基氮化物膜上的控制栅电极。

公开(公告)号：US20110068312A1

公开(公告)日：2011-03-24

申请号：US12795197

申请日：2010-06-07

申请人： Katsuyuki SEKINE ,  Yoshio Ozawa

发明人： Katsuyuki SEKINE ,  Yoshio Ozawa

IPC分类号： H01L45/00 ,  H01L29/22

CPC分类号： H01L27/2418 ,  G11C13/0007 ,  G11C13/003 ,  G11C2213/72 ,  H01L27/1021 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1675

摘要： According to one embodiment, a nonvolatile memory device comprises a plurality of first lines, a plurality of second lines, and memory cells. Each of the memory cells comprise a variable resistor, and a diode. The variable resistor includes a first metal oxide film and is configured to reversibly change resistance value by energy application. The diode includes a second metal oxide film and is connected in series to the variable resistor. The first metal oxide film has at least one of dielectric constant lower than that of the second metal oxide film and physical film thickness greater than that of the second metal oxide film.

摘要翻译： 根据一个实施例，非易失性存储器件包括多个第一线，多条第二线和存储单元。 每个存储单元包括可变电阻器和二极管。 可变电阻器包括第一金属氧化物膜，并且被配置为通过能量施加可逆地改变电阻值。 二极管包括第二金属氧化物膜并串联连接到可变电阻器。 第一金属氧化物膜具有比第二金属氧化物膜低的介电常数中的至少一种，并且物理膜厚度大于第二金属氧化物膜的介电常数。

公开(公告)号：US20110012190A1

公开(公告)日：2011-01-20

申请号：US12888140

申请日：2010-09-22

申请人： Masayuki Tanaka ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Akihito Yamamoto ,  Katsuaki Natori ,  Yoshio Ozawa

发明人： Masayuki Tanaka ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Akihito Yamamoto ,  Katsuaki Natori ,  Yoshio Ozawa

IPC分类号： H01L29/68

CPC分类号： H01L29/42324 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/7883

摘要： A semiconductor device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, the second insulating film including a lower silicon nitride film, a lower silicon oxide film formed on the lower silicon nitride film, an intermediate insulating film formed on the lower silicon oxide film and containing a metal element, the intermediate insulating film having a relative dielectric constant of greater than 7, an upper silicon oxide film formed on the intermediate insulating film, and an upper silicon nitride film formed on the upper silicon oxide film.

摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及形成在第二绝缘膜上的控制电极 ，所述第二绝缘膜包括下氮化硅膜，形成在所述下氮化硅膜上的下氧化硅膜，形成在所述下氧化硅膜上并含有金属元素的中间绝缘膜，所述中间绝缘膜具有相对电介质 大于7的常数，形成在中间绝缘膜上的上部氧化硅膜和形成在上部氧化硅膜上的上部氮化硅膜。

公开(公告)号：US20100288995A1

公开(公告)日：2010-11-18

申请号：US12728028

申请日：2010-03-19

申请人： Yoshio Ozawa ,  Katsuyuki Sekine ,  Kazuaki Nakajima

发明人： Yoshio Ozawa ,  Katsuyuki Sekine ,  Kazuaki Nakajima

IPC分类号： H01L45/00 ,  H01L21/20

CPC分类号： H01L45/1273 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1625 ,  H01L45/1641

摘要： A semiconductor memory device includes: a lower electrode including a plurality of projections formed on a top surface thereof; an oxide film covering the top surface and made of an oxide of a same metal as a metal contained in the lower electrode; and a resistance variable film provided on the oxide film and being in contact with the oxide film, the projections being buried in the oxide film, and a lower layer portion of the resistance variable film having an oxygen concentration lower than an oxygen concentration of a portion other than the lower layer portion of the resistance variable film.

摘要翻译： 半导体存储器件包括：下电极，其包括形成在其顶表面上的多个突起; 覆盖上表面并由与下部电极中所含的金属相同的金属的氧化物构成的氧化膜; 以及设置在氧化膜上并与氧化膜接触的电阻变化膜，所述突起被埋在氧化物膜中，并且电阻变化膜的下层部分的氧浓度低于部分的氧浓度 除了电阻可变膜的下层部分之外。