公开(公告)号：US6147400A

公开(公告)日：2000-11-14

申请号：US95251

申请日：1998-06-10

申请人： Tony Faraci ,  Thomas H. DiStefano ,  John W. Smith

发明人： Tony Faraci ,  Thomas H. DiStefano ,  John W. Smith

IPC分类号： H01L25/18 ,  H01L21/60 ,  H01L25/04 ,  H01L23/34

CPC分类号： H01L24/86 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/7965 ,  H01L24/45 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/351

摘要： A plurality of separate semiconductor chips, each having a contact-bearing surface and contacts on such surface, are disposed in an array so that the contact-bearing surfaces face and define a first surface of the array. A flexible, dielectric sheet with terminals thereon overlies the first or contact bearing surface of the semiconductor chips. Elongated leads are disposed between the dielectric element and the semiconductor chips. Each lead has a first end connected to a terminal on the dielectric element, and a second end connected to a contact on a semiconductor chip in the array. All of the leads are formed simultaneously by moving the dielectric element and the array relative to one another to simultaneously displace all of the first ends of the leads relative to all of the second ends. The dielectric element is subdivided after the forming step so as to leave one region of the dielectric element connected to each chip and thereby form individual units each including one chip, or a small number of chips.

公开(公告)号：US6030856A

公开(公告)日：2000-02-29

申请号：US872379

申请日：1997-06-10

申请人： Thomas H. DiStefano ,  Zlata Kovac ,  John W. Smith

发明人： Thomas H. DiStefano ,  Zlata Kovac ,  John W. Smith

IPC分类号： H01L21/58 ,  H01L23/16 ,  H01L23/31 ,  H01L23/498 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L24/32 ,  H01L23/16 ,  H01L23/3107 ,  H01L23/4985 ,  H01L24/83 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802

摘要： A method of making a microelectronic package includes providing first and second microelectronic elements having electrically conductive parts and disposing a resilient element having one or more intermediary layers capable of being wetted by an adhesive between the microelectronic elements. The resilient element includes fibrous material, a fibrous matrix and/or voids formed at the intermediary layers thereof. An adhesive is provided between the intermediary layers and the microelectronic elements. The adhesive is then cured while it remains in contact with the intermediary layers for bonding the resilient element and the microelectronic elements. The electrically conductive parts are then bonded together to form electrical interconnections. A microelectronic package comprising a resilient element including one or more intermediary layers capable of being wetted by an adhesive is also provided.

摘要翻译： 制造微电子封装的方法包括提供具有导电部件的第一和第二微电子元件，并且设置具有能够被微电子元件之间的粘合剂润湿的一个或多个中间层的弹性元件。 弹性元件包括在其中间层处形成的纤维材料，纤维基质和/或空隙。 在中间层和微电子元件之间提供粘合剂。 然后将粘合剂固化，同时粘合剂与中间层保持接触，用于粘合弹性元件和微电子元件。 然后将导电部件结合在一起以形成电互连。 还提供了包括能够被粘合剂润湿的一个或多个中间层的弹性元件的微电子封装。

公开(公告)号：US5885849A

公开(公告)日：1999-03-23

申请号：US19637

申请日：1998-02-06

申请人： Thomas H. DiStefano ,  Vernon Solberg

发明人： Thomas H. DiStefano ,  Vernon Solberg

IPC分类号： H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L21/283 ,  H01L21/58 ,  H01L21/60

CPC分类号： H01L23/3157 ,  H01L23/49827 ,  H01L23/5387 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2225/0652 ,  H01L2225/06579

摘要： A method of making a microelectronic assembly includes providing a starting subassembly having a microelectronic component with a top surface and having electrical contacts, the subassembly further including a plurality of terminals over the top surface of the component, each terminal being connected to at least one contact of the component but moveable with respect to the component; positioning a plurality of joining units each having a solid core on the terminal; providing a unit bonding material at interfaces between each core terminal; and bonding the joining units to the terminals by heating the joining units and terminals so as to convert the unit bonding material to a liquid phase without melting the cores and solidifying the unit bonding material.

摘要翻译： 制造微电子组件的方法包括提供具有顶表面并具有电触点的微电子部件的起始子组件，所述子组件还包括在部件的顶表面上的多个端子，每个端子连接到至少一个触点 的部件，但可相对于部件移动; 在端子上定位多个具有实芯的接合单元; 在每个核心终端之间的接口处提供单元接合材料; 以及通过加热所述接合单元和端子将所述接合单元结合到所述端子，以将所述单元接合材料转化为液相而不熔化所述芯并固化所述单元接合材料。

公开(公告)号：US5875545A

公开(公告)日：1999-03-02

申请号：US658577

申请日：1996-06-05

申请人： Thomas H. DiStefano ,  Gus Karavakis ,  Zlata Kovac ,  Craig Mitchell

发明人： Thomas H. DiStefano ,  Gus Karavakis ,  Zlata Kovac ,  Craig Mitchell

IPC分类号： H01L21/48 ,  H01L21/58 ,  H01L21/60 ,  H01L21/68 ,  H01L23/495 ,  H01L23/498 ,  H05K13/04 ,  H05K3/38

CPC分类号： H01L24/86 ,  H01L21/4821 ,  H01L21/6835 ,  H01L23/495 ,  H01L23/4985 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/81801 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  Y10T29/49117 ,  Y10T29/49121 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49149 ,  Y10T29/49171

摘要： A semiconductor chip connection component is provided with an adhesive, desirably in a solid, non-tacky condition on its bottom surface. The adhesive may be present in a pattern covering less than all of the component bottom surface, so as to provide a void-free interface when the adhesive bonds the component to the top surface of a chip. The adhesive desirably is brought to a flowable condition by heat transferred from the chip itself. The connection component may include leads having base metal strips in a trace area underlying the top surface and noble metal portions protruding beyond an edge of the top layer. A flowable, curable material encapsulates the base metal sections. Because the base metal sections desirably are free of undercuts, the same can be encapsulated in a void-free manner during formation of the component.

公开(公告)号：US5848467A

公开(公告)日：1998-12-15

申请号：US855127

申请日：1997-05-13

申请人： Igor Y. Khandros ,  Thomas H. DiStefano

发明人： Igor Y. Khandros ,  Thomas H. DiStefano

IPC分类号： H01L21/60 ,  H01L21/822 ,  H01L21/98 ,  H01L23/13 ,  H01L23/31 ,  H01L23/485 ,  H01L23/498 ,  H01L23/58 ,  H01L25/065 ,  H01L25/16 ,  H05K3/30

CPC分类号： H01L21/6836 ,  H01L21/822 ,  H01L22/32 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3164 ,  H01L23/485 ,  H01L23/49805 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/49861 ,  H01L24/27 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/02371 ,  H01L2224/04105 ,  H01L2224/16145 ,  H01L2224/274 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06579 ,  H01L2225/06596 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49171

摘要： Semiconductor chip assemblies are fabricated by providing a wafer having a plurality of semiconductor chips and providing a sheet separate from the wafer having a plurality of dielectric elements. Each chip has a plurality of contacts and each dielectric element has a plurality of terminal formed thereon. The sheet and the wafer are then assembled so that the terminals on the dielectric elements face away from the wafer and so that each chip is associated with a dielectric element. The contacts on each chip are connected to the terminals on a dielectric element associated with the chip. The individual dialectic elements are then severed from the sheet and the individual chips are severed from the wafer after the assembling and connecting step to provide subassemblies, each subassembly including a chip and the dielectric element associated with the chip. In another embodiment, a plurality of individual dielectric elements separate from one another and separate from a wafer are provided.

摘要翻译： 通过提供具有多个半导体芯片的晶片并且提供与具有多个电介质元件的晶片分开的片材来制造半导体芯片组件。 每个芯片具有多个触点，并且每个电介质元件具有形成在其上的多个端子。 然后组合片材和晶片，使得电介质元件上的端子远离晶片，并且使得每个芯片与介电元件相关联。 每个芯片上的触点连接到与芯片相关联的电介质元件上的端子。 然后将单独的辩证元件从纸张上切下，并且在组装和连接步骤之后将各个芯片从晶片切断以提供子组件，每个子组件包括芯片和与芯片相关联的电介质元件。 在另一个实施例中，提供了彼此分离并与晶片分离的多个单独的电介质元件。

公开(公告)号：US5801446A

公开(公告)日：1998-09-01

申请号：US411472

申请日：1995-03-28

申请人： Thomas H. DiStefano ,  Vernon Solberg

发明人： Thomas H. DiStefano ,  Vernon Solberg

IPC分类号： H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L23/12 ,  H01L23/14 ,  H01L23/50

CPC分类号： H01L23/3157 ,  H01L23/49827 ,  H01L23/5387 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2225/0652 ,  H01L2225/06579

摘要： A microelectronic component such as a semiconductor chip having electrical contacts is provided with terminals, the terminals being movable relative to the component. A joining unit having a solid core is disposed on each terminal and extends upwardly, away from the component. Each unit includes a bonding material such as a solder bonding the terminal and the solid core, the bonding material desirably defining a waist or narrow section spaced above the terminal, the waist having a curved surface forming a stress-relieving fillet. The joining units are bonded to contact pads of a substrate such as a circuit panel as by bonding the solder of the joining units to the terminals, or by means of a further solder on the contact pads having a lower melting point. The assembly provides substantial resistance to mechanical stress caused by thermal expansion. Preferably, the terminals are movable in vertical directions towards the component to compensate for nonplanarity during assembly.

摘要翻译： 诸如具有电触点的半导体芯片的微电子部件设置有端子，端子可相对于部件移动。 具有实芯的接合单元设置在每个端子上并且向上远离部件延伸。 每个单元包括接合材料，例如焊接端子和实芯，焊接材料期望地限定在端子之上间隔开的腰部或窄部分，腰部具有形成应力消除内圆角的弯曲表面。 接合单元通过将接合单元的焊料接合到端子，或者通过在具有较低熔点的接触焊盘上的另外的焊料粘合到诸如电路板的衬底的接触焊盘。 该组件提供了对由热膨胀引起的机械应力的实质性阻力。 优选地，端子可以在垂直方向上朝向部件移动以在组装期间补偿非平面性。

公开(公告)号：US5682061A

公开(公告)日：1997-10-28

申请号：US461102

申请日：1995-06-05

申请人： Igor Y. Khandros ,  Thomas H. DiStefano

发明人： Igor Y. Khandros ,  Thomas H. DiStefano

IPC分类号： H01L21/60 ,  H01L21/822 ,  H01L21/98 ,  H01L23/13 ,  H01L23/31 ,  H01L23/485 ,  H01L23/498 ,  H01L23/58 ,  H01L23/48

CPC分类号： H01L21/6836 ,  H01L21/822 ,  H01L22/32 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3164 ,  H01L23/485 ,  H01L23/49805 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/49861 ,  H01L24/27 ,  H01L24/81 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/13111 ,  H01L2224/16145 ,  H01L2224/274 ,  H01L2224/81801 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06579 ,  H01L2225/06596 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/351 ,  H05K2201/10378 ,  Y10T29/4913

摘要： A semiconductor chip assembly is mounted to contact pads in a compact area array. An interposer is disposed between the chip and the substrate. The contacts on the chip are connected to terminals on the interposer by flexible leads extending through apertures in the interposer. The terminals on the interposer in turn are bonded to the contact pads on the substrate. Flexibility of the leads permits relative movement of the contacts on the chip relative to the terminals and the contact pads of the substrate and hence relieves the stresses caused by differential thermal expansion. The arrangement provides a compact structure similar to that achieved through flip-chip bonding, but with markedly increased resistance to thermal cycling damage.

摘要翻译： 半导体芯片组件以紧凑的区域阵列安装到接触焊盘。 插入器设置在芯片和基板之间。 芯片上的触点通过延伸穿过插入器中的孔的柔性引线连接到插入器上的端子。 插入器上的端子又结合到衬底上的接触焊盘。 引线的灵活性允许芯片上的触点相对于基板的端子和接触垫的相对移动，并因此减轻由不同的热膨胀引起的应力。 该布置提供了类似于通过倒装芯片接合实现的紧凑结构，但是具有显着提高的耐热循环损伤性。

公开(公告)号：US5548091A

公开(公告)日：1996-08-20

申请号：US143080

申请日：1993-10-26

申请人： Thomas H. DiStefano ,  Gus Karavakis ,  Zlata Kovac ,  Craig Mitchell

发明人： Thomas H. DiStefano ,  Gus Karavakis ,  Zlata Kovac ,  Craig Mitchell

IPC分类号： H01L21/48 ,  H01L21/58 ,  H01L21/60 ,  H01L21/68 ,  H01L23/495 ,  H01L23/498 ,  H05K1/14

CPC分类号： H01L24/86 ,  H01L21/4821 ,  H01L21/6835 ,  H01L23/495 ,  H01L23/4985 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/81801 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  Y10T29/49117 ,  Y10T29/49121 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49149 ,  Y10T29/49171

摘要： A semiconductor chip connection component is provided with an adhesive, desirably in a solid, non-tacky condition on its bottom surface. The adhesive may be present in a pattern covering less than all of the component bottom surface, so as to provide a void-free interface when the adhesive bonds the component to the top surface of a chip. The adhesive desirably is brought to a flowable condition by heat transferred from the chip itself. The connection component may include leads having base metal strips in a trace area underlying the top surface and noble metal portions protruding beyond an edge of the top layer. A flowable, curable material encapsulates the base metal sections. Because the base metal sections desirably are free of undercuts, the same can be encapsulated in a void-free manner during formation of the component.

摘要翻译： 半导体芯片连接部件在其底表面上设置有粘合剂，期望地为固体，非粘性状态。 粘合剂可以以覆盖小于所有组分底部表面的图案存在，以便当粘合剂将组分粘合到芯片的顶表面时提供无空隙的界面。 粘合剂期望地通过从芯片本身传递的热量而变成可流动状态。 连接部件可以包括在顶表面下方的迹线区域中具有基底金属条的引线和突出超过顶层边缘的贵金属部分。 可流动的可固化材料封装基体金属部分。 因为贱金属部分理想地没有底切部分，所以在形成部件期间可以以无空隙的方式将其包封。

公开(公告)号：US4599558A

公开(公告)日：1986-07-08

申请号：US561364

申请日：1983-12-14

申请人： Anthony J. Castellano, Jr. ,  Thomas H. DiStefano ,  Robert S. Olyha, Jr.

发明人： Anthony J. Castellano, Jr. ,  Thomas H. DiStefano ,  Robert S. Olyha, Jr.

IPC分类号： G01N21/88 ,  G01N21/956 ,  G01N27/00 ,  G01R31/265 ,  G01R31/308 ,  H01L21/66 ,  G01R31/26

CPC分类号： G01R31/308 ,  G01R31/2656

摘要： An imaging system for detecting recombination center defects in a semiconductor wafer in which an oxidized wafer is pre-treated by charging the oxide in a corona discharge and then passing the charged wafer below a stationary bifurcated electrode. A focused laser beam is scanned between the arms of the bifurcated electrode and along its length as the wafer is slowly moved transversely to the direction of laser scanning. The signal from the bifurcated electrode is displayed in an imaging system, one axis of which is synchronized to the laser scanning and the other axis is synchronized to the movement of the wafer.

摘要翻译： 一种用于检测半导体晶片中的复合中心缺陷的成像系统，其中通过在电晕放电中填充氧化物，然后将带电晶片通过固定分叉电极，将经氧化的晶片预处理。 当晶片缓慢地沿着激光扫描的方向移动时，聚焦的激光束在分叉电极的臂之间并沿其长度扫描。 来自分叉电极的信号显示在成像系统中，其一个轴与激光扫描同步，另一个轴与晶片的移动同步。

公开(公告)号：US4578788A

公开(公告)日：1986-03-25

申请号：US500513

申请日：1983-06-02

申请人： Kie Y. Ahn ,  Thomas H. DiStefano ,  Victor B. Jipson

发明人： Kie Y. Ahn ,  Thomas H. DiStefano ,  Victor B. Jipson

IPC分类号： B41M5/26 ,  G11B7/013 ,  G11B7/24 ,  G11B7/241

CPC分类号： G11B7/2405 ,  G11B7/241 ,  G11B2007/24306 ,  G11B7/00452 ,  G11B7/2533 ,  G11B7/2575

摘要： An optical storage medium incorporates stacked servo and data layers with the pattern of the servo layer being prepared prior to preparation of the data layer. The servo pattern comprises an undulation in a very thin film of high optical index material on the surface of the substrate of the medium. The undulating layer containing the servo pattern is separated from the active layer of the medium by a thin dielectric spacer film. The data layer is employed for formation of vesicular, or ablative or other marks forming surface discontinuities formed by any of the usual pit forming techniques. The preformatted servo information formed in the servo layer as buried undulations in the thin film is read out in amplitude or phase contrast. The thin undulating layer is of a significantly different index of refraction from the substrate and the next intervening layer. This layer can be transparent or semi-transparent. A smoothing layer is then applied over the phase-contrast layer to reduce any undulations at the top surface on which the active layer is formed. The amount of energy absorbed by the active layer of the structure is optimized for the data recording wavelength by choice of thickness of the smoothing layer.

摘要翻译： 光学存储介质包括堆叠的伺服和数据层，其中在准备数据层之前准备伺服层的图案。 伺服图案包括在介质的基板的表面上的高光学指数材料的非常薄的薄膜上的起伏。 包含伺服图案的起伏层通过薄的电介质间隔膜与介质的有源层分离。 数据层用于形成通过任何通常的凹坑形成技术形成的形成表面不连续性的水泡或烧蚀或其它痕迹。 以幅度或相位对比度读出在伺服层中形成的预先格式化的伺服信息作为薄膜中的凹凸。 薄起伏层具有与基底和下一个中间层明显不同的折射率。 该层可以是透明或半透明的。 然后将平滑层施加在相位对比层上以减少在其上形成有源层的顶表面上的任何起伏。 通过选择平滑层的厚度，对结构的有源层吸收的能量的量被优化用于数据记录波长。