公开(公告)号：US20240340197A1

公开(公告)日：2024-10-10

申请号：US18744636

申请日：2024-06-16

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Daniel Marcovitch ,  Idan Burstein ,  Liran Liss ,  Hillel Chapman ,  Dror Goldenberg ,  Michael Kagan ,  Aviad Yehezkel ,  Peter Paneah

IPC: H04L12/46 ,  G06F13/40 ,  G06F13/42 ,  G06F15/173

CPC classification number: H04L12/4625 ,  G06F13/4027 ,  G06F13/4208 ,  G06F15/17331 ,  H04L12/4633 ,  G06F2213/0026

Abstract: A cross-network bridging apparatus includes a bus interface and bridging circuitry. The bus interface is configured for connecting to a system bus. The bridging circuitry is configured to translate between (i) system-bus transactions that are exchanged between one or more local devices that are coupled to the system bus and served by the system bus and one or more remote processors located across a network from the apparatus, and (ii) data units that convey the system-bus transactions, for transmitting and receiving as network packets over the network to and from the remote processors.

公开(公告)号：US20240305637A1

公开(公告)日：2024-09-12

申请号：US18117667

申请日：2023-03-06

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Adi Merav Horowitz ,  Rabia Loulou ,  Omri Kahalon ,  Gal Shalom ,  Aviad Yehezkel ,  Boris Pismenny ,  Liran Liss ,  Jason Gary Gunthorpe

IPC: H04L9/40

CPC classification number: H04L63/10 ,  H04L63/0428 ,  H04L63/168

Abstract: A combined request may be used to reduce a number of communications between a client and server to establish a remote connection. The combined request can include one or more add session requests along with one or more add queue pair (QP) requests. The server, receiving the combined request, may then evaluate each request in turn to determine whether a session can be established and then to add a QP to that session and provide, in a combined reply, connection information back to the client. The client may then verify the connection information and begin transmitting data. As a result, a total number of communications between the client and server can be reduced.

公开(公告)号：US20240289288A1

公开(公告)日：2024-08-29

申请号：US18655386

申请日：2024-05-06

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Daniel Marcovitch ,  Eliav Bar-Ilan ,  Ran Avraham Koren ,  Liran Liss ,  Oren Duer ,  Shahaf Shuler

IPC: G06F13/28 ,  G06F13/42

CPC classification number: G06F13/28 ,  G06F13/4221 ,  G06F2213/0024

Abstract: A network adapter includes a network interface, a bus interface, a hardware-implemented data-path and a programmable Data-Plane Accelerator (DPA). The network interface is to communicate with a network. The bus interface is to communicate with an external device over a peripheral bus. The hardware-implemented data-path includes a plurality of packet-processing engines to process data units exchanged between the network and the external device. The DPA is to expose on the peripheral bus a User-Defined Peripheral-bus Device (UDPD), to run user-programmable logic that implements the UDPD, and to process transactions issued from the external device to the UDPD by reusing one or more of the packet-processing engines of the data-path.

公开(公告)号：US12047478B2

公开(公告)日：2024-07-23

申请号：US17159189

申请日：2021-01-27

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Boris Pismenny ,  Liran Liss ,  Yossi Kuperman ,  Roee Moyal

IPC: H04L69/22 ,  H04L61/5007 ,  H04L69/16 ,  H04L69/325 ,  H04L101/663

CPC classification number: H04L69/22 ,  H04L61/5007 ,  H04L69/16 ,  H04L69/325 ,  H04L2101/663

Abstract: A system including a network interface layer, and a physical network connection configured to connect with a networking medium. The network interface layer is configured to: A) receive a plurality of user datagram protocol (UDP) message segments from the physical network connection; B) coalesce the plurality of UDP message segments into a coalesced UDP message; and C) send the coalesced UDP message to an application layer external to the system. Related apparatus and methods are also provided.

公开(公告)号：US12007921B2

公开(公告)日：2024-06-11

申请号：US17979013

申请日：2022-11-02

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Daniel Marcovitch ,  Eliav Bar-Ilan ,  Ran Avraham Koren ,  Liran Liss ,  Oren Duer ,  Shahaf Shuler

IPC: G06F13/28 ,  G06F13/42

CPC classification number: G06F13/28 ,  G06F13/4221 ,  G06F2213/0024

Abstract: A network adapter includes a network interface, a bus interface, a hardware-implemented data-path and a programmable Data-Plane Accelerator (DPA). The network interface is to communicate with a network. The bus interface is to communicate with an external device over a peripheral bus. The hardware-implemented data-path includes a plurality of packet-processing engines to process data units exchanged between the network and the external device. The DPA is to expose on the peripheral bus a User-Defined Peripheral-bus Device (UDPD), to run user-programmable logic that implements the UDPD, and to process transactions issued from the external device to the UDPD by reusing one or more of the packet-processing engines of the data-path.

公开(公告)号：US20240056411A1

公开(公告)日：2024-02-15

申请号：US17884057

申请日：2022-08-09

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Gal Shalom ,  Adi Horowitz ,  Jonatan Piasetzky ,  Omri Kahalon ,  Matty Kadosh ,  Aviad Shaul Yehezkel ,  Rabia Loulou ,  Liran Liss

IPC: H04L61/103 ,  H04L61/2503 ,  H04L61/10

CPC classification number: H04L61/103 ,  H04L61/2503 ,  H04L61/10

Abstract: System, methods, and devices for providing an address resolution service are provided. In one example, an Address Resolution Service (ARS) node is described as being in communication with one or more endpoints. The ARS node may include one or more circuits that respond to an ARS query message issued by the one or more endpoints with a response message that translates a layer three address to a layer two address.

公开(公告)号：US11902372B1

公开(公告)日：2024-02-13

申请号：US18314327

申请日：2023-05-09

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Adi Merav Horowitz ,  Rabia Loulou ,  Omri Kahalon ,  Gal Shalom ,  Aviad Yehezkel ,  Asaf Schwartz ,  Liran Liss

IPC: G06F15/167 ,  H04L67/1097 ,  H04L67/146

CPC classification number: H04L67/1097 ,  H04L67/146

Abstract: Systems and methods enable session sharing for session-based remote direct memory access (RDMA). Multiple queue pairs (QPs) can be added to a single session and/or session group where each of the QPs has a common remote. Systems and methods may query a session ID for an existing session group and then use the session ID with an add QP request to join additional QPs to an existing session. Newly added QPs may share one or more features with existing QPs of the session group, such as encryption parameters. Additionally, newly added QPs may be configured with different performance or quality of service requirements, thereby isolating performance, and permitting true scaling for high performance computing applications.

公开(公告)号：US11861211B2

公开(公告)日：2024-01-02

申请号：US17543334

申请日：2021-12-06

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Gal Shalom ,  Adi Horowitz ,  Omri Kahalon ,  Liran Liss ,  Aviad Yehezkel ,  Rabie Loulou

IPC: G06F3/06 ,  G06F9/54

CPC classification number: G06F3/0655 ,  G06F3/061 ,  G06F3/0673 ,  G06F9/544

Abstract: API in conjunction with a bridge chip and first and second hosts having first and second memories respectively. The bridge chip connects the memories. The API comprises key identifier registration functionality to register a key identifier for each of plural computer processes performed by the first host, thereby to define plural key identifiers; and/or access control functionality to provide at least computer process P1 performed by the first host with access, typically via the bridge chip, to at least local memory buffer M2 residing in the second memory, typically after the access control functionality first validates that process P1 has a key identifier which has been registered, e.g., via the key identifier registration functionality. Typically, the access control functionality also prevents at least computer process P2, performed by the first host, which has not registered a key identifier, from accessing local memory buffer M2, e.g., via the bridge chip.

公开(公告)号：US11848711B2

公开(公告)日：2023-12-19

申请号：US17675669

申请日：2022-02-18

Applicant: Mellanox Technologies, Ltd.

Inventor： Juan Jose Vegas Olmos ,  Elad Mentovich ,  Liran Liss ,  Yonathan Piasetzky

IPC: H04B10/70 ,  G06N10/40 ,  H04B10/60

CPC classification number: H04B10/70 ,  G06N10/40 ,  H04B10/60

Abstract: Embodiments are disclosed for facilitating quantum computing over classical and quantum communication channels. An example system includes a network interface card (NIC) apparatus. The NIC apparatus includes an optical receiver, an embedded processor, and a network switch. The optical receiver is configured to receive qubit data via a first communication channel associated with quantum communication. The embedded processor is configured to convert the qubit data into binary bit data. The network switch is configured to output the binary bit data via a second communication channel associated with classical network communication.

公开(公告)号：US20230315659A1

公开(公告)日：2023-10-05

申请号：US17707555

申请日：2022-03-29

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Daniel Marcovitch ,  Liran Liss ,  Rabia Loulou ,  Aviad Yehezkel

IPC: G06F13/24 ,  G06F13/42 ,  G06F13/40 ,  G06F15/173

CPC classification number: G06F13/24 ,  G06F13/4221 ,  G06F15/17331 ,  G06F13/4022 ,  G06F13/4072

Abstract: Methods, systems, and devices for message signaled interrupt (MSI-X) tunneling on a host device exposed by a bridge connection are described. A device may receive data and a first interrupt signal from a remote destination over a network protocol. The device may receive the data and/or the first interrupt signal over the bridge connection, via a tunneled communication from the remote destination. The device may generate a second interrupt signal based on the first interrupt signal and a local interrupt configuration provided by a system bus driver of the device. The device may inject the data and the second interrupt signal over the system bus. Injecting the data and injecting the second interrupt signal may include ensuring the data is made available to the system bus driver, prior to the interrupt handler receiving the second interrupt signal.