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公开(公告)号：US10475510B2
公开(公告)日：2019-11-12
申请号：US15850280
申请日：2017-12-21
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Shang-Chi Yang , Chun-Yu Liao , Ken-Hui Chen
Abstract: A memory device including an array of memory cells including bit lines, and biasing circuitry cells. A sense amplifier has a data line input connected to a data line, and a reference input. The controllable reference current source can be connected to the reference input of the sense amplifier. Control circuits on the device are configured to cause execution of a read operation, where the read operation includes a first phase in which the array is biased to induce leakage current on the selected bit line, and a second phase in which the array is biased to read a selected memory cell on the selected bit line. A circuit on the device is configured to sample the leakage current in the first phase, and to control the controllable reference current source during the second phase, as a function of the sampled leakage current.
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62.发明授权公开(公告)号：US09940048B2
公开(公告)日：2018-04-10
申请号：US14310502
申请日：2014-06-20
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Chun-Hsiung Hung , Kuen-Long Chang , Ken-Hui Chen , Su-Chueh Lo
CPC classification number: G06F3/0622 , G06F3/062 , G06F3/064 , G06F3/0652 , G06F3/0659 , G06F3/0688 , G06F12/1416
Abstract: Methods for protecting data on an integrated circuit including a memory are described. One method includes storing nonvolatile protection codes on the integrated circuit. The nonvolatile protection codes have a first value indicating a protected state or a second value indicating an unprotected state for respective sectors in a plurality of sectors of the memory. The method includes storing volatile protection codes on the integrated circuit. The volatile protection codes have a first value indicating a protected state or a second value indicating an unprotected state for respective sectors in the plurality of sectors. The method includes blocking modification in a particular sector using circuitry on the integrated circuit when the volatile protection code for the particular sector has the first value, else allowing modification in the particular sector, and setting the volatile protection codes to values of the nonvolatile protection codes in an initialization procedure.
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公开(公告)号：US20170358357A1
公开(公告)日：2017-12-14
申请号：US15390823
申请日：2016-12-27
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Chun-Hsiung Hung , Kuen-Long Chang , Ken-Hui Chen , Su-Chueh Lo , Ming-Chih Hsieh
Abstract: A memory device and an operating method thereof are provided. The memory device includes a first memory array, a first row decoder, a first column decoder, a second memory array, a second row decoder and a second column decoder. The first memory array and the second memory array are different type memories and formed in a single memory die of a wafer.
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公开(公告)号：US20170351636A1
公开(公告)日：2017-12-07
申请号：US15411731
申请日：2017-01-20
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Ken-Hui Chen , Kuen-Long Chang , Su-Chueh Lo , Chun-Yu Liao
CPC classification number: G06F13/4234 , G06F13/1631 , G06F13/1673 , G06F13/4291
Abstract: A memory device includes command logic allowing for a command protocol allowing interruption of a first command sequence, such as a page write sequence, and then to proceed directly to receive and decode a second command sequence, such as a read sequence, without latency associated, completing the first command sequence. Also, the command logic is configured to be responsive to a third command sequence after the second command sequence and its associated embedded operation have been completed, which completes the interrupted first command sequence and enables execution of an embedded operation identified by the first command sequence. A memory controller supporting such protocols is described.
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公开(公告)号：US09678829B2
公开(公告)日：2017-06-13
申请号：US15185066
申请日：2016-06-17
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Chin-Hung Chang , Chia-Feng Cheng , Yu-Chen Wang , Ken-Hui Chen , Kuen-Long Chang
CPC classification number: G06F11/1044 , G06F11/1068 , G06F11/1076 , G06F2212/403 , G11C11/5635 , G11C16/00 , G11C16/14 , G11C16/16 , G11C16/3404 , G11C29/42
Abstract: An erasing method of a memory device is provided. The memory device includes a memory controller and a memory array having a first memory region and a second memory region. The first memory region and the second memory region share the same well. The erasing method comprising steps of: erasing the first memory region; and selectively programming the second memory region according to an error correction code algorithm.
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Patent Agency Ranking
66.发明授权公开(公告)号：US09658787B2
公开(公告)日：2017-05-23
申请号：US14310450
申请日：2014-06-20
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Chun-Hsiung Hung , Kuen-Long Chang , Ken-Hui Chen , Su-Chueh Lo
CPC classification number: G06F3/0622 , G06F3/062 , G06F3/064 , G06F3/0652 , G06F3/0659 , G06F3/0688 , G06F12/1416
Abstract: Methods for protecting data on an integrated circuit including a memory are described. One method includes storing protection codes on the integrated circuit. Each protection code has a first value indicating a protected state and a second value indicating an unprotected state for a corresponding sector in a plurality of sectors of the memory. The method includes storing protection mask codes on the integrated circuit. Each mask code has a first value indicating a masked state or a second value indicating an unmasked state for a corresponding sector in the plurality of sectors. The method includes blocking modification in a particular sector of the memory using circuitry on the integrated circuit when the protection code for the particular sector has the first value and the mask code for the particular sector has the second value, else allowing modification in the particular sector.
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67.发明授权公开(公告)号：US09490624B2
公开(公告)日：2016-11-08
申请号：US14472520
申请日：2014-08-29
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Yu-Meng Chaung , Chun-Hsiung Hung , Kuen-Long Chang , Ken-Hui Chen
Abstract: A circuit for voltage detection and protection comprises a first block, a first voltage detector, a second block and a second voltage detector. The first block receives a first voltage supply. The first voltage detector detects the first voltage supply and generates a first detecting signal when detecting the first voltage supply level is out of the first operating voltage range. The second block receives a second voltage supply. The second voltage detector detects the second voltage supply and generates a second detecting signal when detecting the second voltage supply level is out of the second operating voltage range. The first block performs a protection operation on the circuit when monitoring at least one of the first and second detecting signals.
Abstract translation: 用于电压检测和保护的电路包括第一块，第一电压检测器，第二块和第二电压检测器。 第一块接收第一个电压源。 第一电压检测器检测第一电压源，并且当检测到第一电压供应电平在第一工作电压范围之外时产生第一检测信号。 第二块接收第二电压源。 第二电压检测器检测第二电压源，并且当检测到第二电压供应电平在第二工作电压范围之外时产生第二检测信号。 当监视第一和第二检测信号中的至少一个时，第一块在电路上执行保护操作。
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68.发明授权Apparatus of supplying power while maintaining its output power signal and method therefor 有权在维持其输出功率信号的同时供电的装置及其方法公开(公告)号：US09423814B2
公开(公告)日：2016-08-23
申请号：US13747528
申请日：2013-01-23
Applicant: Macronix International Co., Ltd.
Inventor： Chih-Ting Hu , Chun-Hsiung Hung , Wu-Chin Peng , Kuen-Long Chang , Ken-Hui Chen
CPC classification number: G05F3/02 , G11C5/145 , H02M3/07 , H02M2001/0032 , Y02B70/16
Abstract: A power supply apparatus and a method for supplying power are provided. The method includes: providing a first power supply for outputting a first power signal; providing a second power supply for outputting a second power signal; and selectively charging the second power supply by using the first power supply.
Abstract translation: 提供电源装置和供电方法。 该方法包括：提供用于输出第一功率信号的第一电源; 提供用于输出第二功率信号的第二电源; 以及通过使用所述第一电源选择性地对所述第二电源充电。
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公开(公告)号：US09286158B2
公开(公告)日：2016-03-15
申请号：US14173873
申请日：2014-02-06
Applicant: Macronix International Co., Ltd.
Inventor： Chien-Hsin Liu , Su-Chueh Lo , Kuen-Long Chang , Ken-Hui Chen , Chun-Hsiung Hung
CPC classification number: G06F11/1072 , G06F11/1012 , H03M13/1575 , H03M13/19
Abstract: A programming method, a reading method and an operating system for a memory are provided. The programming method includes the following steps. A data is provided. A parity generation is performed to obtain an error-correcting code (ECC). The memory is programmed to record the data and the error-correcting code. The data is transformed before performing the parity generation, such that a hamming distance between two codes corresponding to two adjacent threshold voltage states in the data to be performed the parity generation is 1.
Abstract translation: 提供了一种用于存储器的编程方法，读取方法和操作系统。 编程方法包括以下步骤。 提供数据。 执行奇偶校验生成以获得纠错码（ECC）。 存储器被编程为记录数据和纠错码。 在执行奇偶校验生成之前变换数据，使得对应于待执行奇偶产生的数据中的两个相邻阈值电压状态的两个代码之间的汉明距离为1。
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公开(公告)号：US09208842B2
公开(公告)日：2015-12-08
申请号：US14162854
申请日：2014-01-24
Applicant: Macronix International Co., Ltd.
Inventor： Chun-Hsiung Hung , Nai-Ping Kuo , Ken-Hui Chen , Kuen-Long Chang , Yu-Chen Wang , Chin-Hung Chang , Chia-Feng Cheng , Min-Hsiung Meng
CPC classification number: G11C8/18 , G11C16/3418 , G11C16/349 , G11C29/50004 , G11C29/50016 , G11C2029/0409
Abstract: A method and a system for operating a memory are provided. The memory includes a plurality of memory cells which are configured to store data. The method includes the following steps. A counting number recorded in a counter is counted by 1, if the memory is written. The memory is set as a frequently using device, if the counting number recoded in the counter reaches a predetermined value.
Abstract translation: 提供了一种用于操作存储器的方法和系统。 存储器包括被配置为存储数据的多个存储单元。 该方法包括以下步骤。 如果存储器被写入，计数器中记录的计数器被计数1。 如果在计数器中重新编码的计数号达到预定值，则将存储器设置为频繁使用的设备。
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