公开(公告)号：US06365436B1

公开(公告)日：2002-04-02

申请号：US09712631

申请日：2000-11-14

申请人： Tony Faraci ,  Thomas H. Distefano ,  John W. Smith

发明人： Tony Faraci ,  Thomas H. Distefano ,  John W. Smith

IPC分类号： H01L2144

CPC分类号： H01L24/86 ,  H01L24/45 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/7965 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/48

摘要： A plurality of separate semiconductor chips, each having a contact-bearing surface and contacts on such surface, are disposed in an array so that the contact-bearing surfaces face and define a first surface of the array. A flexible, dielectric sheet with terminals thereon overlies the first or contact bearing surface of the semiconductor chips. Elongated leads are disposed between the dielectric element and the semiconductor chips. Each lead has a first end connected to a terminal on the dielectric element, and a second end connected to a contact on a semiconductor chip in the array. All of the leads are formed simultaneously by moving the dielectric element and the array relative to one another to simultaneously displace all of the first ends of the leads relative to all of the second ends. The dielectric element is subdivided after the forming step so as to leave one region of the dielectric element connected to each chip and thereby form individual units each including one chip, or a small number of chips.

摘要翻译： 多个单独的半导体芯片（每个具有接触表面和在该表面上的接触）被布置成阵列，使得接触表面面对并限定阵列的第一表面。 具有端子的柔性介电片覆盖在半导体芯片的第一或接触支承表面上。 细长引线设置在电介质元件和半导体芯片之间。 每个引线具有连接到电介质元件上的端子的第一端，以及连接到阵列中的半导体芯片上的触点的第二端。 所有的引线通过相对于彼此移动介质元件和阵列而同时形成，以同时相对于所有第二端移位引线的所有第一端。 介电元件在形成步骤之后被细分，以便将电介质元件的一个区域连接到每个芯片，从而形成各自包括一个芯片或少量芯片的单元。

公开(公告)号：US06286205B1

公开(公告)日：2001-09-11

申请号：US09209226

申请日：1998-12-10

申请人： Anthony B. Faraci ,  James B. Zaccardi ,  Thomas H. Distefano ,  John W. Smith

发明人： Anthony B. Faraci ,  James B. Zaccardi ,  Thomas H. Distefano ,  John W. Smith

IPC分类号： H05K330

CPC分类号： H05K7/1084 ,  H01R12/714 ,  H01R13/24 ,  H05K3/326 ,  H05K3/4092 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49144

摘要： A method for making connections to a microelectronic device having bump leads thereon. A substrate is provided having a front surface and a plurality of electrically conductive posts extending upwardly from the front surface. The posts are disposed in groups, wherein the posts of each group define a gap therebetween. Contacts are provided extending generally horizontally outwardly from each post remote from the front surface of the substrate. The microelectronic device is assembled to the substrate and posts so that the bump leads penetrate into the gaps and engage the contacts which wipe against the bump leads as they are inserted.

摘要翻译： 一种用于连接到其上具有凸块引线的微电子器件的方法。 提供了具有前表面和从前表面向上延伸的多个导电柱的衬底。 柱被分组地布置，其中每组的柱在它们之间限定了间隙。 提供从远离基板的前表面的每个支柱大致水平向外延伸的触点。 微电子器件被组装到衬底上并且固定，使得凸起引线插入到间隙中并且接合触头，这些接触件在它们被插入时擦拭凸起引线。

公开(公告)号：US06232152B1

公开(公告)日：2001-05-15

申请号：US09067310

申请日：1998-04-28

申请人： Thomas H. DiStefano ,  John W. Smith ,  Craig Mitchell

发明人： Thomas H. DiStefano ,  John W. Smith ,  Craig Mitchell

IPC分类号： H01L2144

CPC分类号： H01L21/568 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/24 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49572 ,  H01L23/49816 ,  H01L24/32 ,  H01L24/40 ,  H01L24/48 ,  H01L24/50 ,  H01L24/97 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/05599 ,  H01L2224/11003 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/86 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A method of manufacturing a plurality of semiconductor chips packages and the resulting chip package assemblies. The method includes providing a circuitized substrate having terminals and leads. A spacer layer is deposited or attached to the substrate and each chip is then attached to the spacer layer. The leads interconnect contacts on the chip to the terminals on the substrate wherein at least some of the terminals lie outside the periphery of the chip. Typically, the spacer layer is comprised of a compliant or resilient material. A curable encapsulant material is deposited so as to encapsulate the leads and at least one surface of the chip. A unitary support structure is then aligned and attached to the encapsulant around the edges of the chips. The encapsulant material is then cured thereby defining a composite of chip assemblies which may be singulated into individual chip packages.

摘要翻译： 一种制造多个半导体芯片封装的方法和所得到的芯片封装组件。 该方法包括提供具有端子和引线的电路化基板。 将间隔层沉积或附着到基底上，然后将每个芯片附接到间隔层。 引线将芯片上的接触件连接到衬底上的端子，其中至少一些端子位于芯片的外围。 通常，间隔层由顺应性或弹性材料构成。 沉积可固化的密封剂材料以便封装引线和芯片的至少一个表面。 然后将整体支撑结构对准并附接到围绕芯片边缘的密封剂。 密封剂材料然后被固化，从而限定了可以被分成单个芯片封装的芯片组件的复合材料。

公开(公告)号：US6147400A

公开(公告)日：2000-11-14

申请号：US95251

申请日：1998-06-10

申请人： Tony Faraci ,  Thomas H. DiStefano ,  John W. Smith

发明人： Tony Faraci ,  Thomas H. DiStefano ,  John W. Smith

IPC分类号： H01L25/18 ,  H01L21/60 ,  H01L25/04 ,  H01L23/34

CPC分类号： H01L24/86 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/7965 ,  H01L24/45 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/351

摘要： A plurality of separate semiconductor chips, each having a contact-bearing surface and contacts on such surface, are disposed in an array so that the contact-bearing surfaces face and define a first surface of the array. A flexible, dielectric sheet with terminals thereon overlies the first or contact bearing surface of the semiconductor chips. Elongated leads are disposed between the dielectric element and the semiconductor chips. Each lead has a first end connected to a terminal on the dielectric element, and a second end connected to a contact on a semiconductor chip in the array. All of the leads are formed simultaneously by moving the dielectric element and the array relative to one another to simultaneously displace all of the first ends of the leads relative to all of the second ends. The dielectric element is subdivided after the forming step so as to leave one region of the dielectric element connected to each chip and thereby form individual units each including one chip, or a small number of chips.

公开(公告)号：US06307260B1

公开(公告)日：2001-10-23

申请号：US09395105

申请日：1999-09-14

申请人： John W. Smith ,  Joseph Fjelstad

发明人： John W. Smith ,  Joseph Fjelstad

IPC分类号： H01L2348

CPC分类号： H01L23/22 ,  H01L21/4839 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/642 ,  H01L24/13 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15174 ,  H01L2924/351 ,  H05K1/118 ,  H05K3/361 ,  H05K3/4084 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09081 ,  H05K2203/063 ,  H01L2924/00

摘要： A structure including a conductive, preferably metallic conductive layer is provided with leads on a bottom surface. The leads have fixed ends permanently attached to the structure and free ends detachable from the structure. The structure is engaged with a microelectronic element such as a semiconductor chip or wafer, the free ends of the leads are bonded to the microelectronic element, and the leads are bent by moving the structure relative to the microelectronic element. Portions of the conductive layer are removed, leaving residual portions of the conductive layer as separate electrical terminals connected to at least some of the leads. The conductive layer mechanically stabilizes the structure before bonding, and facilitates precise registration of the leads with the microelectronic element. After the conductive layer is converted to separate terminals, it does not impair free movement of the terminals relative to the microelectronic element.

摘要翻译： 包括导电优选金属导电层的结构在底表面上设置有引线。 引线具有永久地附接到结构的固定端部和从结构可拆卸的自由端。 该结构与诸如半导体芯片或晶片的微电子元件接合，引线的自由端接合到微电子元件，并且通过相对于微电子元件移动结构而使引线弯曲。 导电层的一部分被去除，导致导电层的剩余部分作为分开的电端子连接到至少一些引线。 导电层在结合之前机械稳定结构，并且有助于引线与微电子元件的精确对准。 在将导电层转换成单独的端子之后，它不会损害端子相对于微电子元件的自由移动。

公开(公告)号：US5807453A

公开(公告)日：1998-09-15

申请号：US634784

申请日：1996-04-19

申请人： John W. Smith ,  Joseph Fjelstad

发明人： John W. Smith ,  Joseph Fjelstad

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/498 ,  H05K3/40 ,  H05K3/32

CPC分类号： H05K3/4092 ,  H01L23/4985 ,  H01L24/80 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  Y10T156/1052 ,  Y10T29/49121 ,  Y10T29/49222

摘要： A substantially continuous layer of a first metal such as copper is provided with strips of a second metal such as gold by selective electroplating of the second metal, or by applying separately formed strips such as lengths of wire. A dielectric support layer is provided in contact with the first metal layer, and the first metal layer is etched to leave strips of the first metal contiguous with the strips of the second metal, thereby providing composite leads with the first and second metal strips connected in series. The process provides simple and economical methods of making microelectronic connection components with leads having a flexible, fatigue resistant lead portion formed from a precious metal. The leads may incorporate sections of round cross-sectional shape to facilitate engagement by a bonding tool during use of the component.

摘要翻译： 第一金属（例如铜）的基本上连续的层通过第二金属的选择性电镀或通过施加单独形成的条（例如电线长度）来设置有诸如金的第二金属条。 提供与第一金属层接触的电介质支撑层，并且蚀刻第一金属层以留下与第二金属的条带相邻的第一金属的条带，由此提供复合引线，其中第一和第二金属条连接在 系列。 该方法提供了简单和经济的制造微电子连接部件的方法，该引线具有由贵金属形成的柔性耐疲劳引线部分。 引线可以包括圆形横截面形状的部分，以便于在部件使用期间通过焊接工具的接合。

公开(公告)号：US06821815B2

公开(公告)日：2004-11-23

申请号：US10353737

申请日：2003-01-29

申请人： John W. Smith ,  Joseph Fjelstad

发明人： John W. Smith ,  Joseph Fjelstad

IPC分类号： H01L2144

CPC分类号： H01L23/3107 ,  H01L21/56 ,  H01L24/37 ,  H01L24/40 ,  H01L24/73 ,  H01L24/81 ,  H01L24/84 ,  H01L24/92 ,  H01L2224/371 ,  H01L2224/37147 ,  H01L2224/37599 ,  H01L2224/4024 ,  H01L2224/92122 ,  H01L2224/84 ,  H01L2924/00014

摘要： A method of encapsulating a microelectronic assembly comprises providing a microelectronic assembly having an element defining exterior surfaces and an array of terminals exposed at the exterior surfaces. The element defines an aperture through the exterior surfaces. A layer of a curable barrier material is screen printed onto a supporting element. The supporting element is assembled with the microelectronic assembly so that the layer of curable barrier material contacts the exterior surfaces and covers said one or more apertures. An encapsulant is applied to the microelectronic assembly.

摘要翻译： 封装微电子组件的方法包括提供具有限定外表面的元件和暴露在外表面处的端子阵列的微电子组件。 该元件通过外表面限定孔。 将一层可固化的阻挡材料丝网印刷到支撑元件上。 支撑元件与微电子组件组装，使得可固化阻挡材料层与外表面接触并覆盖所述一个或多个孔。 将密封剂施加到微电子组件。

公开(公告)号：US06518662B1

公开(公告)日：2003-02-11

申请号：US09713527

申请日：2000-11-15

申请人： John W. Smith ,  Joseph Fjelstad

发明人： John W. Smith ,  Joseph Fjelstad

IPC分类号： H01L2334

CPC分类号： H01L23/3107 ,  H01L21/56 ,  H01L24/37 ,  H01L24/40 ,  H01L24/73 ,  H01L24/81 ,  H01L24/84 ,  H01L24/92 ,  H01L2224/371 ,  H01L2224/37147 ,  H01L2224/37599 ,  H01L2224/4024 ,  H01L2224/92122 ,  H01L2224/84 ,  H01L2924/00014

摘要： A method of encapsulating a microelectronic assembly comprises providing a microelectronic assembly having an element defining exterior surfaces and an array of terminals exposed at the exterior surfaces. The element defines an aperture through the exterior surfaces. A layer of a curable barrier material is screen printed onto a supporting element. The supporting element is assembled with the microelectronic assembly so that the layer of curable barrier material contacts the exterior surfaces and covers said one or more apertures. An encapsulant is applied to the microelectronic assembly.

摘要翻译： 封装微电子组件的方法包括提供具有限定外表面的元件和暴露在外表面处的端子阵列的微电子组件。 该元件通过外表面限定孔。 将一层可固化的阻挡材料丝网印刷到支撑元件上。 支撑元件与微电子组件组装，使得可固化阻挡材料层与外表面接触并覆盖所述一个或多个孔。 将密封剂施加到微电子组件。

公开(公告)号：US06228686B1

公开(公告)日：2001-05-08

申请号：US09140589

申请日：1998-08-26

申请人： John W. Smith ,  Joseph Fjelstad

发明人： John W. Smith ,  Joseph Fjelstad

IPC分类号： H01L2144

CPC分类号： H01L23/3107 ,  H01L23/49572 ,  H01L24/01 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/3011 ,  H01L2924/00

摘要： A sheet such as a polymeric dielectric has elongated lead regions partially separated from the main region of the sheet by gaps in the sheet, and has conductors extending along the lead regions. The lead regions are connected to contacts on a microelectronic element, and the microelectronic element is moved away from the main region of the sheet, thereby bending the lead regions downwardly to form leads projecting from the main region of the sheet.

摘要翻译： 诸如聚合物电介质的片材具有通过片材中的间隙与片材的主要区域部分地分离的细长引线区域，并且具有沿引线区域延伸的导体。 引线区域连接到微电子元件上的触点，并且微电子元件移动离开片材的主要区域，从而将引线区域向下弯曲以形成从片材的主要区域突出的引线。

公开(公告)号：US06586955B2

公开(公告)日：2003-07-01

申请号：US09793791

申请日：2001-02-27

申请人： Joseph Fjelstad ,  John W. Smith

发明人： Joseph Fjelstad ,  John W. Smith

IPC分类号： G01R3102

CPC分类号： G01R1/07314 ,  G01R1/06744 ,  G01R3/00

摘要： A probe card for testing electronic elements includes a layer of dielectric material provided with a plurality of cavities supported on a substrate. A mass of fusible conductive material having a melting temperature below about 150° C. is disposed in each of said cavities, the dielectric material electrically insulating the masses of fusible conductive material from one another. A probe tip of conductive material having a melting temperature greater than about 150° C. is provided at one common end of each of the masses of fusible conductive material. The probe contacts are separated from an adjacent probe contact by at least one channel formed with the layer of dielectric material.