公开(公告)号：US20020146556A1

公开(公告)日：2002-10-10

申请号：US09825803

申请日：2001-04-04

Applicant: GA-TEK Inc. (dba Gould Electronics Inc.)

Inventor： Joel W. Pankow ,  Michael A. Centanni

IPC: B32B015/08

CPC classification number: H05K1/167 ,  H01C7/003 ,  H01C7/005 ,  H01C17/07 ,  H05K2201/0329 ,  H05K2201/0355 ,  H05K2203/0361 ,  H05K2203/121 ,  H05K2203/122 ,  Y10T428/265 ,  Y10T428/31699

Abstract: A resistor foil comprised of a layer of copper foil and a coating of an organic molecular semiconductor material on one side of the copper foil.

Abstract translation: 一种由铜箔层和铜箔一面上的有机分子半导体材料涂层组成的电阻箔。

公开(公告)号：US20020130760A1

公开(公告)日：2002-09-19

申请号：US10091792

申请日：2002-03-06

Inventor： Louis P. Huber ,  Ziv Shoshani

IPC: H01C001/012

CPC classification number: H01C7/003 ,  H01C1/01 ,  H01C3/12 ,  H01C7/18 ,  Y10S438/977 ,  Y10T29/49082 ,  Y10T29/49083 ,  Y10T29/49098 ,  Y10T29/49099 ,  Y10T29/49101

Abstract: A method and apparatus for a stacked power chip resistor is disclosed. The invention provides for multiple power chip resistors to be stacked, providing for encapsulant such as glass to separate each power chip resistor and a metal barrier such as nickel plating on each end of the stacked power chip resistor to provide for electrical and mechanical connection of each power chip resistor in the stack.

Abstract translation: 公开了一种叠层电源片式电阻器的方法和装置。 本发明提供了要堆叠的多个功率芯片电阻器，提供诸如玻璃的密封剂以分离每个功率芯片电阻器和在堆叠的功率芯片电阻器的每个端部上分离诸如镀镍的金属屏障，以提供每一个的电气和机械连接 堆叠中的电源芯片电阻。

公开(公告)号：US20020003466A1

公开(公告)日：2002-01-10

申请号：US09900151

申请日：2001-07-09

Applicant: ROHM CO., LTD.

Inventor： Masaki Yoneda

IPC: H01C001/012

CPC classification number: H01C7/003 ,  H01C7/18

Abstract: There are provided a pair of upper surface electrodes 21, 31 at both end sections, which are opposed to each other, of the insulating substrate 1 made of alumina. There is provided a resistor body 4 on the substrate 1 so that the upper surface electrode 21 and both the end sections can be electrically connected with each other. On the pair of upper surface electrodes 21, 31, there are provided a pair of upper surface auxiliary electrodes 24, 34 made of material, the heat-resistance with respect to solder of which is superior to that of the upper surface electrodes 21, 31, so that the exposed sections of the upper surface electrodes 21, 31 can be completely covered with the pair of upper surface auxiliary electrodes 24, 34, wherein the pair of upper surface auxiliary electrodes 24, 34 are not directly connected with the resistor body 4. On the surface of the resistor body 4, there is provided a protective film 5 (a first protective film 51 to a third protective film 53).

Abstract translation: 在由氧化铝制成的绝缘基板1的两端部彼此相对设置有一对上表面电极21,31。 在基板1上设置有电阻体4，使得上表面电极21和两端部电连接。 在一对上表面电极21,31上设置有一对由材料制成的上表面辅助电极24,34，相对于焊料的耐热性优于上表面电极21,31的耐热性 使得上表面电极21,31的暴露部分可以被一对上表面辅助电极24,34完全覆盖，其中一对上表面辅助电极24,34不直接与电阻体4连接 在电阻体4的表面设有保护膜5（第一保护膜51〜第三保护膜53）。

公开(公告)号：US20010054950A1

公开(公告)日：2001-12-27

申请号：US09921728

申请日：2001-08-03

Inventor： Steven V.R. Hellriegel

IPC: H01C001/012

CPC classification number: H01C7/003 ,  H05K1/167 ,  H05K3/429 ,  H05K2201/0355 ,  H05K2201/09263 ,  H05K2201/093 ,  H05K2203/0361

Abstract: A printed circuit board having resistors formed therein. A conductive layer composed of two different metals is provided on top of an insulating layer in a printed circuit board. The first metal layer is highly conductive and the second metal layer is highly resistive. For a major portion of the layer, both layers are connected electrically in parallel so that they provide a highly conductive path. At selected locations throughout the printed circuit board, the highly conductive metal is removed providing only the high resistivity metal to act as a resistor between selected locations in the conductive layer. Many resistors are formed at the same time, thus providing ease of fabrication and precision in resistor values across the entire printed circuit board. Following the formation of the resistor, additional insulating and conductive layers are formed to complete the printed circuit board. An electrical connector is then formed between at least one metal layer in the printed circuit board and the resistive layer. This permits easy connection between a conductive layer which is connected to an integrated circuit to provide proper termination voltage and the termination layer, including the termination resistor.

公开(公告)号：US20010006451A1

公开(公告)日：2001-07-05

申请号：US09735879

申请日：2000-12-13

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Makoto Miyazaki ,  Satoru Tanaka ,  Koji Kimura ,  Koji Hato ,  Koji Suzuki

IPC: H01G004/06 ,  B28B001/00 ,  B28B003/00 ,  C03B029/00 ,  C04B035/64

CPC classification number: C04B35/6264 ,  B32B18/00 ,  B32B37/0046 ,  B32B38/145 ,  B32B2038/042 ,  B32B2311/08 ,  B32B2311/12 ,  B32B2311/22 ,  C04B35/053 ,  C04B35/111 ,  C04B35/2658 ,  C04B35/46 ,  C04B35/468 ,  C04B35/486 ,  C04B35/491 ,  C04B35/565 ,  C04B35/584 ,  C04B35/63 ,  C04B35/632 ,  C04B35/634 ,  C04B35/63416 ,  C04B35/63424 ,  C04B35/636 ,  C04B35/6365 ,  C04B35/638 ,  C04B37/005 ,  C04B2235/3206 ,  C04B2235/3262 ,  C04B2235/3275 ,  C04B2235/3279 ,  C04B2235/36 ,  C04B2235/5436 ,  C04B2237/06 ,  C04B2237/064 ,  C04B2237/068 ,  C04B2237/08 ,  C04B2237/083 ,  C04B2237/09 ,  C04B2237/405 ,  C04B2237/407 ,  C04B2237/408 ,  C04B2237/50 ,  C04B2237/68 ,  H01C7/003 ,  H01C7/18 ,  H01F17/0013 ,  H01F41/043 ,  H01F41/046 ,  H01G4/12 ,  H01G4/30 ,  H01L21/4857

Abstract: A process for producing a monolithic ceramic electronic component, which includes: providing a ceramic slurry, a conductive paste, and a ceramic paste; forming a plurality of composite structures each comprising a ceramic green sheet produced by shaping the ceramic slurry, internal circuit element films formed by applying the conductive paste partially onto a main surface of the ceramic green sheet so as to provide step-like sections, and a ceramic green layer which compensates for spaces defined by the step-like sections, the ceramic green layer being formed by applying the ceramic paste onto the region on the main surface of the sheet on which the element films are not formed, so as to substantially compensate for the spaces; forming a green laminate by laminating the composite structures; and firing the green laminate, wherein the ceramic paste contains ceramic powder, an organic solvent, and an organic binder. A monolithic ceramic electronic component produced through the process; a ceramic paste; and a production process for the ceramic paste are also disclosed.

Abstract translation: 一种用于制造单块陶瓷电子部件的方法，其包括：提供陶瓷浆料，导电浆料和陶瓷糊料; 形成多个复合结构，每个复合结构包括通过使陶瓷浆料成形而制成的陶瓷生片，通过将导电浆部分地涂覆在陶瓷生片的主表面上形成的内部电路元件膜，以提供阶梯状部分，以及 陶瓷绿色层，其补偿由阶梯状部分限定的空间，陶瓷生坯层通过将陶瓷浆料涂覆在不形成元件膜的片材的主表面上的区域上而形成，以便基本上补偿 为空间; 通过层压复合结构形成绿色层压板; 烧成绿色层压体，其中，陶瓷糊含有陶瓷粉末，有机溶剂和有机粘合剂。 通过该方法生产的单片陶瓷电子部件; 陶瓷糊; 还公开了陶瓷糊的制造方法。

公开(公告)号：US6055151A

公开(公告)日：2000-04-25

申请号：US31745

申请日：1998-02-27

Applicant: Ellen Schwartz Tormey ,  Ashok Narayan Prabhu ,  Attiganal Narayanaswamy Sreeram ,  Michael James Liberatore

Inventor： Ellen Schwartz Tormey ,  Ashok Narayan Prabhu ,  Attiganal Narayanaswamy Sreeram ,  Michael James Liberatore

IPC: H01C7/00 ,  H01C13/02 ,  H01C17/30 ,  H01L23/64 ,  H05K1/03 ,  H05K1/09 ,  H05K1/16 ,  H05K3/46 ,  H01G4/06 ,  H01G4/20

CPC classification number: H01C7/003 ,  H01C13/02 ,  H01C17/30 ,  H01L23/64 ,  H05K1/162 ,  H05K1/167 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/19041 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/4611 ,  H05K3/4629 ,  H05K3/4688 ,  Y10T29/49128

Abstract: Embedded passive components such as capacitors are formed in multilayer ceramic circuit boards by screen printing a component precursor compound ink sandwiched between conductor ink layers onto a green tape stack and covering the component ink layer with one or two green tape layers, aligning and laminating the green tapes and firing. Capacitor inks are made from dielectrics chosen from barium titanate, titanium oxide and lead-magnesium-niobate. The green tapes are made of a mixture of a crystallizing glass, a non-crystallizing glass and an oxide filler which does not shrink in the x and y dimensions during firing mounted on a metal support. Thus the embedded components can be made to close tolerances.

Abstract translation: 诸如电容器的嵌入式无源部件通过丝网印刷夹在导电油墨层之间的组分前体复合油墨到一个生胶带堆叠上而形成在多层陶瓷电路板中，并用一个或两个生胶带层覆盖部件油墨层，对准和层压绿色 磁带和射击。 电容器油墨由选自钛酸钡，氧化钛和铌酸镁镁的电介质制成。 生胶带由结晶玻璃，非结晶玻璃和氧化物填料的混合物制成，其在烧制安装在金属载体上时在x和y尺寸上不收缩。 因此，嵌入式组件可以制成紧密公差。

公开(公告)号：US5907274A

公开(公告)日：1999-05-25

申请号：US923703

申请日：1997-09-04

Applicant: Suzushi Kimura ,  Koji Shimoyama ,  Naotugu Yoneda ,  Keiichi Nakao

Inventor： Suzushi Kimura ,  Koji Shimoyama ,  Naotugu Yoneda ,  Keiichi Nakao

IPC: H01C1/142 ,  H01C7/00 ,  H01C17/00 ,  H01C17/28 ,  H01C1/012

CPC classification number: H01C1/142 ,  H01C17/006 ,  H01C17/281 ,  H01C7/003 ,  Y10T29/49082 ,  Y10T29/49099 ,  Y10T29/49101

Abstract: The invention relates to a chip resistor which is used as a circuit part for various electric apparatuses. The object of the invention is to realize a low resistance and a low TCR, and also high accuracy and high reliability. In order to achieve the object, a chip resistor is configured so as to have: a substrate; a resistance layer which is formed on at least one face of the substrate and which is made of a copper nickel alloy; upper-face electrode layers which make surface contact with the upper faces of both the end portions of the resistance layer; and end-face electrodes which are formed so as to cover the upper-face electrode layers. Since the bonding between the resistance layer and the upper-face electrode layers is conducted by metal-to-metal bonding, particularly, impurities which may affect the properties do not exist in the interface. As a result, it is possible to realize a chip resistor which is excellent in heat resistance, and which has a low resistance and a low TCR.

Abstract translation: 本发明涉及一种片状电阻器，其用作各种电气设备的电路部分。 本发明的目的是实现低电阻和低TCR，并且还具有高精度和高可靠性。 为了实现该目的，芯片电阻器被配置为具有：基板; 电阻层，其形成在所述基板的至少一个面上，并且由铜镍合金制成; 与电阻层的两端部的上表面接触的上表面电极层; 以及形成为覆盖上表面电极层的端面电极。 由于电阻层和上表面电极层之间的结合是通过金属 - 金属键合进行的，特别是界面中不存在可能影响特性的杂质。 结果，可以实现耐热性优异并且具有低电阻和低TCR的片式电阻器。

公开(公告)号：US5750958A

公开(公告)日：1998-05-12

申请号：US305085

申请日：1994-09-13

Applicant: Norio Okuda ,  Hiroyuki Arima ,  Kyouji Uchiyama ,  Michio Ohno ,  Hiroaki Ohyama ,  Jun Fukuda ,  Makoto Niina

Inventor： Norio Okuda ,  Hiroyuki Arima ,  Kyouji Uchiyama ,  Michio Ohno ,  Hiroaki Ohyama ,  Jun Fukuda ,  Makoto Niina

IPC: F02B3/06 ,  F23Q7/00 ,  H01C7/00 ,  H01C17/065 ,  H05B3/14 ,  H05B3/48 ,  F23Q7/22 ,  F02P19/00 ,  H05B3/44

CPC classification number: H05B3/141 ,  C04B35/5626 ,  C04B35/584 ,  F23Q7/001 ,  H01C17/0652 ,  H01C7/003 ,  H05B3/48 ,  C04B2235/3217 ,  C04B2235/3224 ,  C04B2235/3418 ,  C04B2235/3873 ,  C04B2235/3891 ,  C04B2235/723 ,  C04B2235/80 ,  C04B2235/85 ,  F02B3/06

Abstract: A ceramic heater for a DC power source comprising an insulating ceramic sintered body, a heating resistor composed of at least two separate layers of heating resistor made of an inorganic conductive material, leads made of high-melting point metal wires and connected to each end of the layers, and electrodes made of an inorganic conductive material, each formed in a single layer or divided into a plurality of pieces and connected to the leads, the heating resistor, leads and electrodes being embedded in the ceramic sintered body. The present invention further includes six related inventions closely related with one another in regard to the above-mentioned ceramic heater and ceramic glow plugs embodied by using the ceramic heater.

Abstract translation: 一种用于DC电源的陶瓷加热器，包括绝缘陶瓷烧结体，由至少两个由无机导电材料制成的加热电阻器的单独层组成的加热电阻器，由高熔点金属线制成的引线，并连接到 各层和由无机导电材料制成的电极，各自形成为单层或分成多个片并连接到引线，加热电阻器，引线和电极嵌入陶瓷烧结体中。 本发明还包括关于通过使用陶瓷加热器实现的上述陶瓷加热器和陶瓷预热塞彼此密切相关的六个相关发明。

公开(公告)号：US5734314A

公开(公告)日：1998-03-31

申请号：US689531

申请日：1996-08-08

Applicant: Charles C. Y. Kuo

Inventor： Charles C. Y. Kuo

IPC: H01C7/00 ,  H01C17/065 ,  H01C1/012 ,  H01C7/10

CPC classification number: H01C7/003 ,  H01C17/06526

Abstract: A surge resistor has a thick film resistance element containing alloyed nickel-chromium mixed with alloyed copper-nickel and less than twenty percent by weight glass. The surge resistor overcomes the limitations of the prior art by offering the unexpected advantage of improved power surge handling capacity. A thick film composition used to form the surge resistor, which also includes screening agent, is fired at temperatures generally below 1,000.degree. C., yielding a highly stable and well adhered electrical resistor. In addition to improved surge capability, the composition offers lower cost and less migration than the precious metal alternatives that the composition replaces. Additional inventive surge resistors include copper-manganese and nickel-chromium in combination with less than twenty percent by weight glass.

Abstract translation: 浪涌电阻器具有厚膜电阻元件，其包含与合金铜镍和少于二十重量百分比的玻璃混合的合金镍铬。 浪涌电阻器通过提供改进的功率浪涌处理能力的意想不到的优点来克服现有技术的局限性。 用于形成浪涌电阻器的厚膜组合物，其也包括筛选剂，在通常低于1000℃的温度下焙烧，产生高度稳定和良好粘附的电阻器。 除了提高浪涌能力外，组合物还具有较低的成本和较少的组成替代品的贵金属替代品的迁移。 额外的本发明的浪涌电阻器包括铜 - 锰和镍 - 铬以及少于百分之二十的重量百分比的玻璃。

公开(公告)号：US5633035A

公开(公告)日：1997-05-27

申请号：US428835

申请日：1995-04-25

Applicant: Kazuo Baba ,  Yoshiyuki Shiratsuki ,  Kumiko Takahashi

Inventor： Kazuo Baba ,  Yoshiyuki Shiratsuki ,  Kumiko Takahashi

IPC: B41J2/335 ,  H01B1/22 ,  H01C7/00 ,  H01C17/06 ,  H01C17/075 ,  H01C17/20 ,  H01C17/30 ,  B05D5/12

CPC classification number: H01C7/006 ,  H01C17/075 ,  H01C17/20 ,  H01C7/003

Abstract: A thin-film resistor comprising a mixture of rhodium (Rh) oxide as a resistive material, and at least one element M selected from the group consisting of silicon (Si), lead (Pb), bismuth (Bi), zirconium (Zr), barium (Ba), aluminium (Al), boron (B), tin (Sn), and titanium (Ti), wherein M/Rh, or the ratio of the number of element M atoms to that of rhodium (Rh) atoms is in the range of 0.3 to 3.0. Thin-film resistor is formed from the process of preparing a solution of an organometallic material, coating the material on a substrate, drying and then firing the material at a peak temperature not less than 500.degree. C.

Abstract translation: 一种薄膜电阻器，其包含作为电阻材料的铑（Rh）氧化物的混合物，以及选自由硅（Si），铅（Pb），铋（Bi），锆（Zr） ，钡（Ba），铝（Al），硼（B），锡（Sn）和钛（Ti），其中M / Rh或元素M原子数与铑（Rh）原子数的比例 在0.3〜3.0的范围内。 由制备有机金属材料溶液的方法形成薄膜电阻体，将该材料涂覆在基板上，干燥然后在不低于500℃的峰值温度下烧制。