Fast platform hibernation and resumption of computing systems
    71.
    发明授权
    Fast platform hibernation and resumption of computing systems 有权
    快速平台休眠和恢复计算系统

    公开(公告)号:US09436251B2

    公开(公告)日:2016-09-06

    申请号:US13996480

    申请日:2011-10-01

    摘要: Fast platform hibernation and resumption for computing systems. An embodiment of an apparatus includes a volatile system memory, a nonvolatile memory, and a processor to operate according to an operating system, the processor to transition the apparatus to a first reduced power state upon receipt of a request, the transition to the first reduced power state including the processor to store context information for the computer in the volatile system memory. The apparatus further includes logic to transition the apparatus to a second reduced power state, the logic to copy the context data from the volatile system memory to the nonvolatile memory for the transition to the second reduced power state, where copying of the context data includes the logic to scan the volatile system memory to locate non-active memory elements in the volatile system memory, eliminate the non-active memory elements from the volatile system memory to generate compressed context data, and store the compressed context data in the nonvolatile memory.

    摘要翻译: 快速平台休眠和恢复计算系统。 装置的实施例包括易失性系统存储器,非易失性存储器和根据操作系统操作的处理器,所述处理器在接收到请求时将装置转换到第一降低功率状态,转换到第一减少 电源状态包括处理器,用于存储易失性系统存储器中的计算机的上下文信息。 该装置还包括将装置转换到第二降低功率状态的逻辑,将上下文数据从易失性系统存储器复制到非易失性存储器以转换到第二降低功率状态的逻辑,其中上下文数据的复制包括 扫描易失性系统存储器以定位易失性系统存储器中的非活动存储器元件的逻辑,从易失性系统存储器中消除非活动存储器元件以产生压缩上下文数据,并将压缩上下文数据存储在非易失性存储器中。

    POWER MANAGEMENT OF LOW POWER LINK STATES
    73.
    发明申请
    POWER MANAGEMENT OF LOW POWER LINK STATES 审中-公开
    低功率链路状态的电源管理

    公开(公告)号:US20140223216A1

    公开(公告)日:2014-08-07

    申请号:US14258921

    申请日:2014-04-22

    IPC分类号: G06F1/32

    摘要: A method and apparatus for intelligent power management for low power link states. Some embodiments include methods, apparatuses, and systems for a device coupled to a controller via a link; a link power management engine to alter a power state of the link based on a transaction and some knowledge of future transactions between the device and the controller; and a memory or logic to store the link power management engine. In some embodiments, the memory stores information about at least one of the following: the power state of the link, the device buffering, the controller or device state or a history of transactions. In some embodiments, the device is a peripheral of a computer system. In some embodiments, the method may include transitioning the device to various link states. Other embodiments are described.

    摘要翻译: 一种用于低功率链路状态智能电源管理的方法和装置。 一些实施例包括用于经由链路耦合到控制器的设备的方法,设备和系统; 链路功率管理引擎,用于基于事务改变链路的功率状态以及对设备和控制器之间的未来事务的一些知识; 以及用于存储链路电源管理引擎的存储器或逻辑。 在一些实施例中,存储器存储关于以下至少一个的信息:链路的功率状态,设备缓冲,控制器或设备状态或事务历史。 在一些实施例中,设备是计算机系统的外设。 在一些实施例中,该方法可以包括将设备转换到各种链路状态。 描述其他实施例。

    Power management of electronic devices utilizing transitions between link states
    75.
    发明授权
    Power management of electronic devices utilizing transitions between link states 有权
    利用链路状态之间的转换的电子设备的电源管理

    公开(公告)号:US08738950B2

    公开(公告)日:2014-05-27

    申请号:US13725880

    申请日:2012-12-21

    IPC分类号: G06F1/00 G06F1/32

    摘要: A method and apparatus for intelligent power management for low power link states. Some embodiments include methods, apparatuses, and systems for a device coupled to a controller via a link; a link power management engine to alter a power state of the link based on a transaction and some knowledge of future transactions between the device and the controller; and a memory or logic to store the link power management engine. In some embodiments, the memory stores information about at least one of the following: the power state of the link, the device buffering, the controller or device state or a history of transactions. In some embodiments, the device is a peripheral of a computer system. In some embodiments, the method may include transitioning the device to various link states. Other embodiments are described.

    摘要翻译: 一种用于低功率链路状态智能电源管理的方法和装置。 一些实施例包括用于经由链路耦合到控制器的设备的方法,设备和系统; 链路功率管理引擎,用于基于事务改变链路的功率状态以及对设备和控制器之间的未来事务的一些知识; 以及用于存储链路电源管理引擎的存储器或逻辑。 在一些实施例中,存储器存储关于以下至少一个的信息:链路的功率状态,设备缓冲,控制器或设备状态或事务历史。 在一些实施例中,设备是计算机系统的外设。 在一些实施例中,该方法可以包括将设备转换到各种链路状态。 描述其他实施例。

    STORAGE DRIVE MANAGEMENT
    78.
    发明申请
    STORAGE DRIVE MANAGEMENT 有权
    存储驱动管理

    公开(公告)号:US20120084582A1

    公开(公告)日:2012-04-05

    申请号:US12894670

    申请日:2010-09-30

    IPC分类号: G06F1/32

    摘要: With embodiments of the invention, a more robust solution is provided using a storage driver that may already be used for the platforms operating system. This is efficient because the storage driver typically already monitors storage drive access requests, and thus knows when traffic is outstanding (performance may be critical) or when it's not outstanding (and power may be saved).

    摘要翻译: 利用本发明的实施例,使用可能已经用于平台操作系统的存储驱动器来提供更强大的解决方案。 这是有效的,因为存储驱动程序通常已经监视存储驱动器访问请求,从而知道流量何时未完成(性能可能至关重要),或者当它不是很好(可能节省电力)时)。

    System and method for controlling processor low power states
    79.
    发明授权
    System and method for controlling processor low power states 有权
    用于控制处理器低功率状态的系统和方法

    公开(公告)号:US07930564B2

    公开(公告)日:2011-04-19

    申请号:US11496944

    申请日:2006-07-31

    IPC分类号: G06F1/00

    CPC分类号: G06F1/3203

    摘要: A next idle state for a processor in a system may be determined based on a previous idle period and a previous idle state. The next idle state for the processor may also be determined based on times when interrupts are generated by devices in the system.

    摘要翻译: 可以基于先前的空闲时段和先前的空闲状态来确定系统中处理器的下一个空闲状态。 处理器的下一个空闲状态也可以基于系统中的设备产生中断的时间来确定。

    Device and method for on-die temperature measurement
    80.
    发明授权
    Device and method for on-die temperature measurement 有权
    用于管芯温度测量的装置和方法

    公开(公告)号:US07878016B2

    公开(公告)日:2011-02-01

    申请号:US11025140

    申请日:2004-12-30

    IPC分类号: F25D23/12 G01K1/08 G06F1/00

    摘要: A system for measuring and managing thermal operations of a processor core on a semiconductor die using a sensor positioned in a hotspot of the processor core. A measured temperature reading is determined based upon a temperature sensed by the sensor. Interrupt signals and a software readable register indicating temperature information provide feedback about the thermal environment to the processor. Based upon the measured temperature reading, the interrupt signals direct the processor to modify operation.

    摘要翻译: 一种用于使用位于处理器核心的热点中的传感器来测量和管理半导体管芯上的处理器核心的热操作的系统。 测量的温度读数是根据传感器感测到的温度来确定的。 中断信号和指示温度信息的软件可读寄存器提供关于处理器的热环境的反馈。 基于测量的温度读数,中断信号指示处理器修改操作。