公开(公告)号：US07516054B2

公开(公告)日：2009-04-07

申请号：US10887849

申请日：2004-07-12

申请人： Koichi Tanji ,  Akira Asai

发明人： Koichi Tanji ,  Akira Asai

IPC分类号： G06G7/50

CPC分类号： G06F17/5018 ,  G06F2217/16

摘要： A method for numerical calculation related to fluids which is efficient and less liable to cause numerical diffusion and does not rely upon the functional form of an equation of state and hence can be used as a generalized numerical calculation method. A flux is divided into an advection part, a pressure-dependent part, and a dissipation part, according to physical properties thereof, to calculate a one-dimensional basic equation. A time evolution is executed on the advection part and the pressure-dependent part using an upwind difference type leap-frog difference method and a central difference type leap-frog difference method, respectively.

摘要翻译： 一种与有效且不易引起数值扩散的流体相关的数值计算方法，不依赖于状态方程的函数形式，因此可用作广义数值计算方法。 根据其物理性质，将焊剂分为平流部分，压力依赖部分和耗散部分，以计算一维基本方程。 在平流部分和压力依赖部分上使用逆风差分型跨越差分法和中心差分型跨越式差异法进行时间演化。

公开(公告)号：US07145168B2

公开(公告)日：2006-12-05

申请号：US10997127

申请日：2004-11-24

申请人： Yoshihiro Hara ,  Akira Asai ,  Gaku Sugahara ,  Haruyuki Sorada ,  Teruhito Ohnishi

发明人： Yoshihiro Hara ,  Akira Asai ,  Gaku Sugahara ,  Haruyuki Sorada ,  Teruhito Ohnishi

IPC分类号： H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC分类号： H01L29/1054 ,  H01L21/76224 ,  H01L21/823481 ,  Y10S438/933

摘要： On an Si substrate 1, a buffer layer 2, a SiGe layer 3, and an Si cap layer 4 are formed. A mask is formed on the substrate, and then the substrate is patterned. In this manner, a trench 7a is formed so as to reach the Si substrate 1 and have the side faces of the SiGe layer 3 exposed. Then, the surface of the trench 7a is subjected to heat treatment for one hour at 750° C. so that Ge contained in a surface portion of the SiGe layer 3 is evaporated. Thus, a Ge evaporated portion 8 having a lower Ge content than that of other part of the SiGe layer 3 is formed in part of the SiGe layer 3 exposed at part of the trench 7a. Thereafter, the walls of the trench 7a are oxidized.

摘要翻译： 在Si衬底1上形成缓冲层2，SiGe层3和Si覆盖层4。 在基板上形成掩模，然后对基板进行图案化。 以这种方式，形成沟槽7a以到达Si衬底1并且暴露SiGe层3的侧面。 然后，将沟槽7a的表面在750℃下进行1小时的热处理，使得包含在SiGe层3的表面部分中的Ge蒸发。 因此，在沟槽7a的一部分暴露的SiGe层3的一部分，形成Ge含量低于SiGe层3的Ge含量低的Ge蒸发部分8。 此后，沟槽7a的壁被氧化。

公开(公告)号：US07126170B2

公开(公告)日：2006-10-24

申请号：US10978513

申请日：2004-11-02

申请人： Akira Inoue ,  Takeshi Takagi ,  Akira Asai ,  Haruyuki Sorada

发明人： Akira Inoue ,  Takeshi Takagi ,  Akira Asai ,  Haruyuki Sorada

IPC分类号： H01L31/0336

CPC分类号： H01L21/28123 ,  H01L29/1054 ,  H01L29/1087 ,  H01L29/4238 ,  H01L29/66651 ,  H01L29/783

摘要： A MISFET according to this invention includes: a substrate having a semiconductor layer; an active region formed in the semiconductor layer; a gate insulator formed on the active region; a gate formed on the gate insulator; and a source region and a drain region, wherein: the active region is formed, in plan view, to have a body portion and a projecting portion projecting from a periphery of the body portion; the gate is formed, in plan view, to intersect the body portion of the active region, cover a pair of connecting portions connecting a periphery of the projecting portion to the periphery of the body portion and allow a part of the projecting portion to project from a periphery of the gate; and the source region and the drain region are formed in regions of the body portion of the active region which are situated on opposite sides of the gate in plan view, respectively.

摘要翻译： 根据本发明的MISFET包括：具有半导体层的衬底; 形成在半导体层中的有源区; 形成在有源区上的栅极绝缘体; 形成在栅极绝缘体上的栅极; 源极区域和漏极区域，其中：有源区域在平面图中形成为具有从主体部分的周边突出的主体部分和突出部分; 在平面图中，门形成为与有源区域的主体部分相交，覆盖将突出部分的周边连接到主体部分的周边的一对连接部分，并使突出部分的一部分从 门的周边; 并且源极区域和漏极区域分别形成在有源区域的主体部分的位于平面图的栅极的相对侧上的区域中。

公开(公告)号：US20060225642A1

公开(公告)日：2006-10-12

申请号：US10402239

申请日：2003-03-31

申请人： Yoshihiko Kanzawa ,  Tohru Saitoh ,  Akira Asai ,  Teruhito Ohnishi

发明人： Yoshihiko Kanzawa ,  Tohru Saitoh ,  Akira Asai ,  Teruhito Ohnishi

IPC分类号： C30B23/00 ,  C30B25/00 ,  C30B28/12 ,  C30B28/14

CPC分类号： C30B25/04 ,  C30B25/18 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/0245 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/02661 ,  H01L29/1054

摘要： A method of forming semiconductor crystal of the present invention comprises the steps of heating a Si substrate to clean a surface of the Si substrate, epitaxially growing Si crystal on the Si substrate inside a crystal growth chamber at a growth temperature lower than a substrate temperature of the Si substrate in the cleaning step and higher than a growth temperature at which SiGe crystal is epitaxially grown later, and epitaxially growing the SiGe crystal on the Si crystal.

摘要翻译： 本发明的半导体晶体的形成方法包括以下步骤：加热Si衬底以清洁Si衬底的表面，在晶体生长室内的Si衬底上外延生长Si晶体，生长温度低于衬底温度 Si衬底在高于SiGe晶体后来生长的生长温度以及在Si晶体上外延生长SiGe晶体。

公开(公告)号：US07109095B2

公开(公告)日：2006-09-19

申请号：US10396505

申请日：2003-03-26

申请人： Hidenori Notake ,  Teruhito Ohnishi ,  Akira Asai ,  Shigetaka Aoki

发明人： Hidenori Notake ,  Teruhito Ohnishi ,  Akira Asai ,  Shigetaka Aoki

IPC分类号： H01L21/20

CPC分类号： H01L21/0209 ,  H01L21/02052 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/32134 ,  H01L29/66242

摘要： Immediately after a Si/SiGe film containing a contaminant is formed over all surfaces of a substrate by epitaxial growth, a portion of the Si/SiGe film formed to the back surface side of the substrate is removed by wet etching. In addition, the Si/SiGe film is subjected to processing with heating in a container, after which a dummy run is carried out in the container. These processings prevent secondary wafer contamination through a stage, a robot arm or a vacuum wand for handling a wafer and the contamination of the container also used in the fabrication process of a semiconductor device free from any group IV element but Si.

公开(公告)号：US07084484B2

公开(公告)日：2006-08-01

申请号：US10910573

申请日：2004-08-04

申请人： Akira Asai ,  Takeshi Takagi

发明人： Akira Asai ,  Takeshi Takagi

IPC分类号： H01L27/082

CPC分类号： H01L29/66242 ,  H01L21/8222 ,  H01L27/0823 ,  H01L27/0826 ,  H01L29/7378

摘要： A semiconductor integrated circuit including a plurality of bipolar transistors that are produced by forming, in a plurality of transistor-producing regions, a first conductive type emitter layer on the front surface side of a second conductive type base layer that is formed on the surface side of a first conductive collector layer and contains germanium, the first conductive type emitter layer being formed from a semiconductor material having a band gap larger than the base layer. The concentrations of impurities contained in the emitter layers vary among the plurality of transistor-producing regions, and the germanium concentrations differ in the base-emitter junction interfaces of at least two of the transistor-producing regions, such that the ON-state voltages required for turning the plurality of bipolar transistors into an ON state differ from each other. This semiconductor integrated circuit makes it possible to reduce power consumption while maintaining the excellent performance of a bipolar transistor.

摘要翻译： 一种半导体集成电路，包括多个双极晶体管，其通过在多个晶体管产生区域中形成在表面侧形成的第二导电型基极层的前表面侧的第一导电型发射极层 的第一导电集电极层并且包含锗，所述第一导电型发射极层由具有大于所述基极层的带隙的半导体材料形成。 包含在发射极层中的杂质的浓度在多个晶体管产生区域之间变化，并且锗浓度在至少两个晶体管产生区域的基极 - 发射极结界面中不同，使得需要ON状态电压 用于将多个双极晶体管转换成导通状态彼此不同。 该半导体集成电路使得可以在保持双极晶体管的优异性能的同时降低功耗。

公开(公告)号：US06987065B2

公开(公告)日：2006-01-17

申请号：US10891038

申请日：2004-07-15

申请人： Haruyuki Sorada ,  Takeshi Takagi ,  Akira Asai ,  Akira Inoue

发明人： Haruyuki Sorada ,  Takeshi Takagi ,  Akira Asai ,  Akira Inoue

IPC分类号： H01L21/311

CPC分类号： H01L29/78696 ,  H01L21/76264 ,  H01L21/76281 ,  H01L29/1054 ,  H01L29/66742 ,  H01L29/78687 ,  Y10S438/933 ,  Y10S438/938

摘要： The present invention provides a semiconductor device comprising: a semiconductor layer (3); a gate electrode (11) formed on the semiconductor layer (3) via a gate insulation film (10); and a first insulation film (13) formed at one or more of sidewalls of the semiconductor layer (3), the gate insulation film (10) and the gate electrode (11); wherein the first insulation film (13) overlies a part of the gate insulation film (10) surface. According to the semiconductor device, leakage current at the isolation edge can be suppressed and thus reliability can be improved.

摘要翻译： 本发明提供一种半导体器件，包括：半导体层（3）; 经由栅极绝缘膜（10）形成在所述半导体层（3）上的栅电极（11）; 以及形成在所述半导体层（3），所述栅极绝缘膜（10）和所述栅电极（11）的侧壁的一个或多个的第一绝缘膜（13）。 其中所述第一绝缘膜（13）覆盖所述栅极绝缘膜（10）表面的一部分。 根据半导体装置，可以抑制隔离边缘处的漏电流，从而可以提高可靠性。

公开(公告)号：US20050209898A1

公开(公告)日：2005-09-22

申请号：US11075593

申请日：2005-03-09

申请人： Akira Asai ,  Shigeki Matsutani ,  Katsuhiko Shinjo ,  Masanori Kuroda ,  Daichi Tsutsumi

发明人： Akira Asai ,  Shigeki Matsutani ,  Katsuhiko Shinjo ,  Masanori Kuroda ,  Daichi Tsutsumi

IPC分类号： G06F17/50 ,  G06F7/60 ,  G06F15/18 ,  G06F17/10 ,  G06F17/11 ,  G06F19/00 ,  G06Q10/04 ,  G06F17/60

CPC分类号： G06F17/11

摘要： The solution of a constrained optimization problem is easily solved by linearly approximating a point of interest to a first hypersurface given as a constraint and finding the extreme value of the objective function by moving a point r along a curved line having second-order osculation with the geodetic line of a hypersurface S(r)=c and passing through the point r.

摘要翻译： 约束优化问题的解可以通过线性近似给定为约束的第一超曲面的兴趣点来容易地解决，并且通过沿着具有二阶交调的曲线沿着具有二阶交变的曲线移动点r来找到目标函数的极值 超表面S（r）= c并通过点r的大地测量线。

公开(公告)号：US06939772B2

公开(公告)日：2005-09-06

申请号：US10882220

申请日：2004-07-02

申请人： Akira Asai ,  Teruhito Ohnishi ,  Takeshi Takagi

发明人： Akira Asai ,  Teruhito Ohnishi ,  Takeshi Takagi

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L29/10 ,  H01L29/165 ,  H01L29/36 ,  H01L29/737 ,  H07L21/8249 ,  H07L21/331

CPC分类号： H01L29/66242 ,  H01L29/1004 ,  H01L29/36 ,  H01L29/7378 ,  Y10S438/936

摘要： A SiGe spacer layer 151, a graded SiGe base layer 152 including boron, and an Si-cap layer 153 are sequentially grown through epitaxial growth over a collector layer 102 on an Si substrate. A second deposited oxide film 112 having a base opening portion 118 and a P+ polysilicon layer 115 that will be made into an emitter connecting electrode filling the base opening portion are formed on the Si-cap layer 153, and an emitter diffusion layer 153a is formed by diffusing phosphorus into the Si-cap layer 153. When the Si-cap layer 153 is grown, by allowing the Si-cap layer 153 to include boron only at the upper part thereof by in-situ doping, the width of a depletion layer 154 is narrowed and a recombination current is reduced, thereby making it possible to improve the linearity of the current characteristics.

摘要翻译： 通过在Si衬底上的集电极层102上的外延生长，顺序地生长SiGe间隔层151，包括硼的梯度SiGe基极层152和Si覆盖层153。 在Si覆盖层153上形成有第二沉积氧化物膜112，其具有基底开口部分118和将形成填充基部开口部分的发射极连接电极的P +多晶硅层115，发射极扩散层153a 通过将磷扩散到Si覆盖层153中而形成。当Si覆盖层153生长时，通过使Si覆盖层153仅通过原位掺杂在其上部包含硼而形成， 层154变窄，复合电流降低，从而可以提高电流特性的线性。

公开(公告)号：US20050073556A1

公开(公告)日：2005-04-07

申请号：US10620421

申请日：2003-07-17

申请人： Toshiaki Sasaki ,  Keiichi Murai ,  Yasuyuki Tamura ,  Sadayuki Sugama ,  Akira Asai ,  Tsutomu Kawai ,  Masayoshi Tachihara

发明人： Toshiaki Sasaki ,  Keiichi Murai ,  Yasuyuki Tamura ,  Sadayuki Sugama ,  Akira Asai ,  Tsutomu Kawai ,  Masayoshi Tachihara

IPC分类号： A61M15/00 ,  A61M15/02 ,  B05B1/24 ,  B41J2/14 ,  B41J2/05

CPC分类号： B41J2/1404 ,  A61M15/0065 ,  A61M15/02 ,  A61M15/025 ,  B41J2/14016 ,  B41J2/1412 ,  B41J2/1433 ,  B41J2002/14387 ,  B41J2002/14475

摘要： A liquid ejection head includes a liquid path; an ejection outlet forming member which constitutes a part of a wall of the liquid and which forms an ejection outlet for ejecting a droplet of liquid; a heat generating element, provided at a position opposing to the ejection outlet of the wall of the liquid flow path, for generating a bubble in the liquid by application of heat to the liquid; a restrictor portion, provided at a recessed portion of the ejection outlet, wherein the recessed portion is recessed from a plane in which the ejection outlet is formed, wherein the liquid forms a meniscus and is retained in the ejection outlet such that the restrictor portion is within the liquid, wherein an area So of an opening of the restrictor portion and a surface Sh of the heat generating element satisfy So≦Sh. According to this invention, a central portion of the meniscus opposed to the fine opening at the ejection outlet bulges, and the liquid is ejected in this state. Namely, very small amount of the liquid can be ejected, since not all of the liquid in the recess portion in the ejection outlet is ejected.

摘要翻译： 液体喷射头包括液体通道; 喷射出口形成构件，其构成液体壁的一部分并且形成用于喷射液滴的喷射出口; 发热元件，设置在与液体流路的壁的喷射出口相对的位置处，用于通过向液体施加热量而在液体中产生气泡; 设置在所述喷射出口的凹陷部分处的所述限制器部分，其中所述凹部从形成所述喷射出口的平面凹陷，其中所述液体形成弯液面并保持在所述喷射出口中，使得所述限制器部分 在液体内，限制器部分的开口的面积So和发热元件的表面Sh满足So <= Sh。 根据本发明，与喷射出口处的微细开口相对的弯月面的中心部分凸出，并且在该状态下喷射液体。 也就是说，由于喷出口的凹部内的液体并不全部喷出，因此能够喷射非常少量的液体。