公开(公告)号：US20110316141A1

公开(公告)日：2011-12-29

申请号：US12822601

申请日：2010-06-24

申请人： Yoshitaka Sasaki ,  Hiroyuki Ito ,  Hiroshi Ikejima ,  Atsushi Iijima

发明人： Yoshitaka Sasaki ,  Hiroyuki Ito ,  Hiroshi Ikejima ,  Atsushi Iijima

IPC分类号： H01L23/485 ,  H01L21/60 ,  H01L21/822

CPC分类号： H01L21/6835 ,  H01L21/563 ,  H01L21/76898 ,  H01L23/522 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/95 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2223/54406 ,  H01L2223/54433 ,  H01L2223/54453 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02317 ,  H01L2224/02321 ,  H01L2224/02371 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05008 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/1146 ,  H01L2224/13144 ,  H01L2224/16148 ,  H01L2224/24011 ,  H01L2224/24146 ,  H01L2224/245 ,  H01L2224/2746 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/32148 ,  H01L2224/81121 ,  H01L2224/8113 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/82005 ,  H01L2224/821 ,  H01L2224/82101 ,  H01L2224/82106 ,  H01L2224/83005 ,  H01L2224/83121 ,  H01L2224/8313 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83815 ,  H01L2224/8385 ,  H01L2224/85 ,  H01L2224/9202 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/95001 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2221/68304

摘要： A layered chip package includes a main body, and wiring disposed on a side surface of the main body. The main body includes: a main part including a plurality of layer portions stacked; a plurality of first terminals disposed on the top surface of the main part and connected to the wiring; and a plurality of second terminals disposed on the bottom surface of the main part and connected to the wiring. The plurality of layer portions include a first-type layer portion and a second-type layer portion. The first-type layer portion includes a conforming semiconductor chip, and a plurality of first-type electrodes that are connected to the semiconductor chip and the wiring. The second-type layer portion includes a defective semiconductor chip, and a plurality of second-type electrodes that are connected to the wiring and not to the semiconductor chip.

摘要翻译： 分层芯片封装包括主体和布置在主体的侧表面上的布线。 主体包括：主要部分，其包括堆叠的多个层部分; 多个第一端子，其设置在所述主体部的上表面并与所述布线连接; 以及多个第二端子，其设置在所述主体部的底面并与所述布线连接。 多个层部分包括第一类型层部分和第二类型部分。 第一型层部分包括符合半导体芯片和连接到半导体芯片和布线的多个第一类型电极。 第二型层部分包括有缺陷的半导体芯片，以及多个第二类型电极，其连接到布线而不连接到半导体芯片。

公开(公告)号：US07978432B2

公开(公告)日：2011-07-12

申请号：US12232664

申请日：2008-09-22

申请人： Yoshitaka Sasaki ,  Hironori Araki ,  Hiroyuki Ito

发明人： Yoshitaka Sasaki ,  Hironori Araki ,  Hiroyuki Ito

IPC分类号： G11B5/147

CPC分类号： G11B5/3163 ,  G11B5/1278 ,  G11B5/3116 ,  Y10T29/49046 ,  Y10T29/49048

摘要： A thin-film magnetic head structure has a configuration adapted to manufacture a thin-film magnetic head configured such that a main magnetic pole layer including a magnetic pole tip on a side of a medium-opposing surface opposing a recording medium, a write shield layer opposing the magnetic pole tip so as to form a recording gap layer on the medium-opposing surface side, and a thin-film coil wound about the write shield layer or main magnetic pole layer are laminated. The magnetic pole tip of the main magnetic pole layer includes an even width portion having a substantially even width along an extending direction.

摘要翻译： 薄膜磁头结构具有适于制造薄膜磁头的结构，该薄膜磁头被构造成使得包括在相对于记录介质的介质相对表面侧的磁极尖端的主磁极层，写入屏蔽层 与磁极尖端相对以在介质相对表面侧上形成记录间隙层，并且缠绕在写入屏蔽层或主磁极层上的薄膜线圈被层压。 主磁极层的磁极尖端包括沿着延伸方向具有大致均匀宽度的均匀宽度部分。

公开(公告)号：US20110096435A1

公开(公告)日：2011-04-28

申请号：US12588686

申请日：2009-10-23

申请人： Yoshitaka Sasaki ,  Hiroyuki Ito ,  Shigeki Tanemura ,  Hironori Araki ,  Atsushi Iijima

发明人： Yoshitaka Sasaki ,  Hiroyuki Ito ,  Shigeki Tanemura ,  Hironori Araki ,  Atsushi Iijima

IPC分类号： G11B5/127

CPC分类号： G11B5/314 ,  G11B5/1278 ,  G11B2005/001 ,  G11B2005/0021

摘要： A heat-assisted magnetic recording head includes a slider, an edge-emitting laser diode fixed to the slider, and an external mirror fixed to the laser diode. The laser diode has an emitting end face that includes an emission part for emitting laser light; a mounting surface that lies at an end in a direction perpendicular to the plane of an active layer and faces the slider; and a rear surface opposite to the mounting surface. The external mirror includes: a first to-be-fixed part disposed along the emitting end face; a second to-be-fixed part disposed along the rear surface; and a coupling part that couples the first and second to-be-fixed parts to each other. The first to-be-fixed part has a reflecting surface that reflects the laser light emitted from the emission part toward the waveguide.

摘要翻译： 热辅助磁记录头包括滑块，固定到滑块的边缘发射激光二极管和固定到激光二极管的外反射镜。 激光二极管具有发射端面，其包括用于发射激光的发射部分; 安装表面位于垂直于有源层的平面的方向上的端部并且面向滑块; 以及与安装表面相对的后表面。 外部反射镜包括：沿着发射端面设置的第一待固定部分; 沿着后表面设置的第二待固定部分; 以及将第一和第二固定部件彼此连接的联接部。 第一待固定部分具有将从发射部分发射的激光朝向波导反射的反射表面。

公开(公告)号：US20110095203A1

公开(公告)日：2011-04-28

申请号：US12909618

申请日：2010-10-21

申请人： Takahiro Suzuki ,  Yoshitaka Sasaki

发明人： Takahiro Suzuki ,  Yoshitaka Sasaki

IPC分类号： G01J1/58

CPC分类号： G01N21/253 ,  G01J3/462 ,  G01J3/524 ,  G01J2003/1282 ,  G01N21/643

摘要： A color processing apparatus according to the present invention is a color processing apparatus that calculates spectral reflectance including a fluorescent component in a sample under a target illuminant. The color processing apparatus includes first means for inputting, for each of a plurality of waveform types, spectral radiance including an excitation wavelength region and the amount of fluorescence in the sample corresponding to the spectral radiance; second means for determining, from spectral radiance of the target illuminant including the excitation wavelength region and the input spectral radiance and amount of fluorescence, the amount of fluorescence in the sample under the target illuminant; third means for inputting spectral reflectance excluding the fluorescent component in the sample; and fourth means for determining, by using the determined amount of fluorescence in the sample under the target illuminant and the input spectral reflectance excluding the fluorescent component in the sample, spectral reflectance including the fluorescent component in the sample under the target illuminant.

摘要翻译： 根据本发明的颜色处理装置是一种颜色处理装置，其计算包含目标光源下的样品中的荧光成分的光谱反射率。 彩色处理装置包括：第一装置，用于对于多个波形类型中的每一个输入包括激发波长区域的光谱辐射和对应于光谱辐射度的样品中的荧光量; 第二装置，用于从包括激发波长区域的目标光源和输入光谱辐射度和荧光量的光谱辐射度确定目标光源下的样品中的荧光量; 用于输入除了样品中的荧光成分的光谱反射率的第三装置; 以及第四装置，用于通过使用目标光源下的样品中确定的荧光量和不包括样品中的荧光成分的输入光谱反射率来确定包括目标光源下的样品中的荧光成分的光谱反射率。

公开(公告)号：US07927920B2

公开(公告)日：2011-04-19

申请号：US11706367

申请日：2007-02-15

申请人： Yoshitaka Sasaki ,  Tatsushi Shimizu

发明人： Yoshitaka Sasaki ,  Tatsushi Shimizu

IPC分类号： H01L21/44

CPC分类号： H01L23/49805 ,  H01L23/49548 ,  H01L23/49575 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/00

摘要： In a method of manufacturing an electronic component package, first, there is fabricated a wafer incorporating a plurality of sets of external connecting terminals corresponding to a plurality of electronic component packages, and a retainer for retaining the plurality of sets of external connecting terminals, the wafer including a plurality of pre-base portions that will be separated from one another later to be bases of the electronic component packages. Next, at least one electronic component chip is bonded to each of the pre-base portions of the wafer. Next, electrodes of the electronic component chips are connected to the external connecting terminals. Next, the electronic component chips are sealed. Next, the wafer is cut so that the pre-base portions are separated from one another and the plurality of bases are thereby formed.

摘要翻译： 在制造电子部件封装的方法中，首先，制造具有多个对应于多个电子部件封装的多组外部连接端子的晶片和用于保持多组外部连接端子的保持器， 晶片包括将彼此分离的多个预基部，稍后将成为电子部件封装的基部。 接下来，至少一个电子元件芯片被结合到晶片的每个预基部分。 接下来，将电子部件芯片的电极连接到外部连接端子。 接下来，电子部件芯片被密封。 接下来，切割晶片，使得前基部彼此分离，从而形成多个基部。

公开(公告)号：US07906838B2

公开(公告)日：2011-03-15

申请号：US11878282

申请日：2007-07-23

申请人： Yoshitaka Sasaki ,  Tatsushi Shimizu

发明人： Yoshitaka Sasaki ,  Tatsushi Shimizu

IPC分类号： H01L23/02 ,  H01L21/00

CPC分类号： H01L25/50 ,  H01L23/147 ,  H01L23/498 ,  H01L23/49805 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/24137 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2224/82 ,  H01L2924/00

摘要： An electronic component package includes: a base having a top surface and a side surface; and a plurality of layer portions stacked on the top surface of the base, each of the layer portions including at least one electronic component chip. The base includes a plurality of external connecting terminals, and a retainer for retaining the plurality of external connecting terminals. Each of the external connecting terminals has an end face located at the side surface of the base. At least one of a plurality of electronic component chips that the plurality of layer portions include is electrically connected to at least one of the external connecting terminals.

摘要翻译： 电子部件封装包括：具有顶表面和侧表面的基座; 以及堆叠在基座的顶表面上的多个层部分，每个层部分包括至少一个电子部件芯片。 基座包括多个外部连接端子和用于保持多个外部连接端子的保持器。 每个外部连接端子具有位于基座侧表面的端面。 多个层部分包括的多个电子部件芯片中的至少一个电连接到外部连接端子中的至少一个。

公开(公告)号：US07868442B2

公开(公告)日：2011-01-11

申请号：US12216143

申请日：2008-06-30

申请人： Yoshitaka Sasaki ,  Hiroyuki Ito ,  Tatsuya Harada ,  Nobuyuki Okuzawa ,  Satoru Sueki

发明人： Yoshitaka Sasaki ,  Hiroyuki Ito ,  Tatsuya Harada ,  Nobuyuki Okuzawa ,  Satoru Sueki

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/544 ,  H01L21/6835 ,  H01L24/24 ,  H01L24/48 ,  H01L24/49 ,  H01L24/82 ,  H01L24/92 ,  H01L24/95 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2224/24145 ,  H01L2224/48463 ,  H01L2224/4943 ,  H01L2225/06551 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A layered chip package includes a plurality of layer portions stacked, each layer portion including a semiconductor chip having a first surface with a device formed thereon and a second surface opposite thereto. The plurality of layer portions include at least a pair of layer portions disposed such that the first surfaces of the respective semiconductor chips face toward each other. A manufacturing method for the layered chip package includes the steps of: fabricating a layered substructure by stacking a plurality of substructures each including a plurality of layer portions corresponding to the plurality of layer portions of the layered chip package; and fabricating a plurality of layered chip packages by using the layered substructure. The step of fabricating the layered substructure includes: fabricating a first and a second pre-polishing substructure each having a first surface and a second surface; bonding the pre-polishing substructures to each other such that their respective first surfaces face toward each other; and forming a first and a second substructure by polishing the second surfaces.

摘要翻译： 分层芯片封装包括堆叠的多个层部分，每个层部分包括具有形成在其上的器件的第一表面和与其相对的第二表面的半导体芯片。 多个层部分包括至少一对层部分，这些层部分设置成使得各个半导体芯片的第一表面朝向彼此。 层叠芯片封装的制造方法包括以下步骤：通过堆叠多个子结构来制造层状子结构，所述多个子结构包括对应于层状芯片封装的多个层部分的多个层部分; 以及通过使用层状子结构制造多个分层芯片封装。 制造层状子结构的步骤包括：制造每个具有第一表面和第二表面的第一和第二预抛光子结构; 将预抛光子结构彼此粘合，使得它们各自的第一表面彼此面对; 以及通过抛光所述第二表面来形成第一和第二子结构。

公开(公告)号：US20100200977A1

公开(公告)日：2010-08-12

申请号：US12320884

申请日：2009-02-06

申请人： Yoshitaka Sasaki ,  Hiroyuki Ito ,  Tatsuya Harada ,  Nobuyuki Okuzawa ,  Satoru Sueki ,  Hiroshi Ikejima

发明人： Yoshitaka Sasaki ,  Hiroyuki Ito ,  Tatsuya Harada ,  Nobuyuki Okuzawa ,  Satoru Sueki ,  Hiroshi Ikejima

IPC分类号： H01L23/48 ,  H01L21/98

CPC分类号： H01L25/0657 ,  H01L24/24 ,  H01L24/25 ,  H01L24/48 ,  H01L24/49 ,  H01L24/82 ,  H01L24/94 ,  H01L24/96 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2223/54426 ,  H01L2224/05554 ,  H01L2224/18 ,  H01L2224/32145 ,  H01L2224/48 ,  H01L2224/48463 ,  H01L2224/49175 ,  H01L2224/4943 ,  H01L2224/73267 ,  H01L2224/94 ,  H01L2225/06551 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10161 ,  H01L2924/10253 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/03

摘要： A layered chip package has a main body including a plurality of pairs of layer portions, and wiring disposed on a side surface of the main body. Each layer portion includes a semiconductor chip. The plurality of pairs of layer portions include at least one specific pair of layer portions consisting of a first-type layer portion and a second-type layer portion. The first-type layer portion includes a plurality of electrodes each connected to the semiconductor chip and each having an end face located at the side surface of the main body on which the wiring is disposed, whereas the second-type layer portion does not include such electrodes. A layered substructure formed of a stack of two substructures each of which includes a plurality of preliminary layer portions aligned is used to fabricate a stack of a predetermined two or greater number of pairs of layer portions, and the main body is fabricated by stacking an additional first-type layer portion together with the stack, the number of the additional first-type layer portion being equal to the number of the specific pair(s) of layer portions included in the stack.

摘要翻译： 分层芯片封装具有主体，该主体包括多对层部分，布线设置在主体的侧表面上。 每个层部分包括半导体芯片。 多个层部分包括由第一类型层部分和第二类型的部分组成的至少一个特定的一对层部分。 第一型层部分包括多个电极，每个电极各自连接到半导体芯片，并且每个电极具有位于布置在其上的主体的侧表面的端面，而第二类型层部分不包括 电极。 由堆叠的两个子结构形成的分层子结构，每个子结构包括多个对齐的预备层部分，用于制造预定的两个或更多数量的层部分的堆叠，并且主体通过堆叠附加的 第一型层部分与堆叠一起，附加的第一类型层部分的数量等于堆叠中包括的层部分的特定对的数量。

公开(公告)号：US20100192343A1

公开(公告)日：2010-08-05

申请号：US12363140

申请日：2009-01-30

申请人： Yoshitaka Sasaki ,  Atsushi Iijima ,  Hiroshi Ikejima

发明人： Yoshitaka Sasaki ,  Atsushi Iijima ,  Hiroshi Ikejima

IPC分类号： H01G4/12

CPC分类号： H01G4/30 ,  H01G4/012 ,  H01G4/232 ,  Y10T29/43 ,  Y10T29/435

摘要： In a method of manufacturing ceramic capacitor according to the present invention, a pair of interdigitated internal electrodes are arranged perpendicularly to the surface of the substrate, subsequent to which the respective end faces of this pair of internal electrodes are exposed, and a pair of external electrodes are formed at these exposed end faces. In this method of manufacturing ceramic capacitor, formation of the external electrodes on the end faces of the respective internal electrodes, with these internal electrodes being interdigitately integrally-formed and the end faces thereof being exposed, it possible to reliably and easily form the external electrodes.

摘要翻译： 在根据本发明的陶瓷电容器的制造方法中，一对叉指的内部电极垂直于衬底的表面布置，随后暴露出这对内部电极的各个端面，并且一对外部 在这些暴露的端面处形成电极。 在这种制造陶瓷电容器的方法中，在各个内部电极的端面上形成外部电极，这些内部电极被互相整体形成并且其端面被暴露，可以可靠且容易地形成外部电极 。

公开(公告)号：US20100182003A1

公开(公告)日：2010-07-22

申请号：US12725935

申请日：2010-03-17

申请人： Yoshitaka Sasaki ,  Koji Shimazawa ,  Tatsushi Shimizu

发明人： Yoshitaka Sasaki ,  Koji Shimazawa ,  Tatsushi Shimizu

IPC分类号： G01R33/02 ,  H01F7/06

CPC分类号： G01R33/18 ,  Y10T29/4902

摘要： A magnetic film sensor comprises a magnetic film for generating a magnetostriction, and a magnetostrictive structure for generating a magnetostriction in the magnetic film. The magnetostrictive structure is constructed so as to generate a magnetostriction by curving the magnetic film, for example. The magnetostrictive structure is obtained, for example, by providing a depressed insulating layer having a surface formed with a depression and forming the magnetic film across the depression.

摘要翻译： 磁性膜传感器包括用于产生磁致伸缩的磁性膜和用于在磁性膜中产生磁致伸缩的磁致伸缩结构。 磁致伸缩结构被构造成例如通过弯曲磁性膜而产生磁致伸缩。 磁致伸缩结构例如通过提供具有形成有凹陷的表面的凹陷绝缘层并且形成跨越凹部的磁性膜而获得。