公开(公告)号：US5576517A

公开(公告)日：1996-11-19

申请号：US411176

申请日：1995-03-27

申请人： Robert J. Wojnarowski ,  Herbert S. Cole ,  Theresa A. Sitnik-Nieters ,  Wolfgang Daum

发明人： Robert J. Wojnarowski ,  Herbert S. Cole ,  Theresa A. Sitnik-Nieters ,  Wolfgang Daum

IPC分类号： B32B7/02 ,  B32B18/00 ,  H01L21/48 ,  H01L21/60 ,  H01L23/498 ,  H01L23/538 ,  H05K1/02 ,  H05K1/03 ,  H05K3/00 ,  H05K3/38 ,  H05K1/18

CPC分类号： H05K1/0313 ,  H01L21/481 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H05K1/024 ,  H05K1/0373 ,  H05K3/0032 ,  H01L2224/2402 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/3011 ,  H05K2201/0116 ,  H05K2201/015 ,  H05K2201/0158 ,  H05K2203/083 ,  H05K2203/122 ,  H05K3/386 ,  Y10S521/918 ,  Y10T29/49124 ,  Y10T29/49155

摘要： An electronic structure includes a circuit chip having chip pads and supported by a substrate, and a low dielectric constant porous polymer layer having pores and situated over the substrate and circuit chip. The porous polymer layer has at least one via therein aligned with at least one of the chip pads, and a pattern of electrical conductors extends over a portion of the porous polymer layer and into the at least one via. The pattern of electrical conductors does not significantly protrude into the pores of the porous polymer layer.

摘要翻译： 电子结构包括具有芯片焊盘并由衬底支撑的电路芯片，以及具有孔并位于衬底和电路芯片上的低介电常数多孔聚合物层。 多孔聚合物层具有与至少一个芯片焊盘对准的至少一个通孔，并且电导体图案在多孔聚合物层的一部分上延伸到至少一个通孔中。 电导体的图案不会显着地突出到多孔聚合物层的孔中。

公开(公告)号：US5452182A

公开(公告)日：1995-09-19

申请号：US865786

申请日：1992-04-07

申请人： Charles W. Eichelberger ,  William P. Kornrumpf ,  Robert J. Wojnarowski

发明人： Charles W. Eichelberger ,  William P. Kornrumpf ,  Robert J. Wojnarowski

IPC分类号： H01L23/52 ,  H01L21/00 ,  H01L21/68 ,  H01L23/538 ,  H01L25/04 ,  H01L25/065 ,  H01L25/18 ,  H05K1/02 ,  H05K1/05 ,  H05K1/14 ,  H05K1/18 ,  H05K3/00 ,  H05K1/11

CPC分类号： H05K1/189 ,  H01L21/67144 ,  H01L21/6835 ,  H01L23/5387 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0655 ,  H01L2221/68313 ,  H01L2224/24227 ,  H01L2224/7665 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15787 ,  H05K1/05 ,  H05K2201/051 ,  H05K2201/09745 ,  H05K2201/2009 ,  H05K2203/0264 ,  H05K3/0058

摘要： A flexible high density interconnect structure is provided by extending the high density interconnect structure beyond the solid substrate containing the chips interconnected thereby. During fabrication, the flexible portion of the high density interconnect structure is supported by a temporary interconnect support to facilitate fabrication of the structure in accordance with existing fabrication techniques. Subsequently, that temporary support structure may be removed or may remain in place if it sufficiently flexible to impart the desired degree of flexibility to that portion of the high density interconnect structure. Methods of fabrication are also disclosed.

摘要翻译： 通过将高密度互连结构延伸超过含有由此相互连接的芯片的固体基板而提供灵活的高密度互连结构。 在制造期间，高密度互连结构的柔性部分由临时互连支撑支撑，以便于根据现有制造技术制造结构。 随后，如果临时支撑结构足够柔软以赋予该高密度互连结构部分所需的柔性程度，那么该临时支撑结构可被移除或保持在适当位置。 还公开了制造方法。

公开(公告)号：US5434751A

公开(公告)日：1995-07-18

申请号：US225876

申请日：1994-04-11

申请人： Herbert S. Cole, Jr. ,  Theresa A. Sitnik-Nieters ,  Robert J. Wojnarowski ,  John H. Lupinski

发明人： Herbert S. Cole, Jr. ,  Theresa A. Sitnik-Nieters ,  Robert J. Wojnarowski ,  John H. Lupinski

IPC分类号： H01L21/48 ,  H01L23/538 ,  H05K1/00 ,  H05K1/11

CPC分类号： H01L24/82 ,  H01L21/485 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L2224/04105 ,  H01L2224/2402 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L24/73 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15787 ,  H05K1/0286 ,  H05K3/4676 ,  Y10T29/49155

摘要： A multichip module (incorporating a high density interconnect structure) has: a first portion containing a substrate with semiconductor chips therein, with each chip having contact pads; a second portion comprising a (HDI) structure interconnecting the chip pads; and a solvent-soluble release layer bonding the two portions together and allowing for easy removal of the HDI structure from the substrate of the module by immersion in an appropriate solvent for the release layer.

摘要翻译： 多芯片模块（包括高密度互连结构）具有：包含其中具有半导体芯片的衬底的第一部分，每个芯片具有接触焊盘; 第二部分包括互连芯片焊盘的（HDI）结构; 以及将两部分结合在一起的溶剂可溶性剥离层，并且通过浸渍在用于剥离层的合适溶剂中，可以容易地从模块的基材上除去HDI结构。

公开(公告)号：US5391516A

公开(公告)日：1995-02-21

申请号：US774427

申请日：1991-10-10

申请人： Robert J. Wojnarowski ,  Bernard Gorowitz

发明人： Robert J. Wojnarowski ,  Bernard Gorowitz

IPC分类号： H01L21/768 ,  H01L21/268 ,  H01L21/311 ,  H01L21/441

CPC分类号： H01L21/76877 ,  H01L24/05 ,  H01L2924/12042 ,  H01L2924/14

摘要： Semiconductor device contact pads are enhanced by forming a metal plate over at least a portion of the contact pad. "Enhancement" includes repair such as by bridging a reinforcing pad area over probe damage, general reinforcement or enlargement of a contact pad, and placement of a protective buffer pad over a contact pad. These methods are applicable to any semiconductor device with contact pads on a surface thereof, such as entire wafers, individual dice, and multi-chip High Density Interconnect (HDI) modules. The pad enhancement plate is formed by applying a planarizing dielectric layer over the entire device (if not already formed in the initial stages of HDI processing), and an enhancement access via is then formed to expose a portion of the contact pad to be enhanced. The entire device is metallized, and metal not over the exposed portion of the contact pad is subsequently removed. Localized heating of the metal plate can be achieved by a laser to effectuate a selective pseudo-weld or produce sintering for a low resistance ohmic contact.

摘要翻译： 通过在接触垫的至少一部分上形成金属板来增强半导体器件接触焊盘。 “增强”包括修复，例如通过桥接加强垫区域超过探测器损伤，通常加强或扩大接触垫，以及将保护性缓冲垫放置在接触垫上。 这些方法适用于具有其表面上的接触焊盘的任何半导体器件，例如整个晶片，单个晶片和多芯片高密度互连（HDI）模块。 通过在整个装置（如果在HDI处理的初始阶段尚未形成）中施加平坦化介电层来形成焊盘增强板，然后形成增强接入通路，以使接触焊盘的一部分暴露出增强。 整个装置被金属化，并且随后去除接触垫的暴露部分之上的金属。 可以通过激光来实现金属板的局部加热，以实现选择性伪焊接或产生用于低电阻欧姆接触的烧结。

公开(公告)号：US5381445A

公开(公告)日：1995-01-10

申请号：US55473

申请日：1993-05-03

申请人： John E. Hershey ,  Menahem Lowy ,  Lionel M. Levinson ,  Amer A. Hassan ,  Richard L. Frey ,  Kenneth B. Welles, II ,  Michael Gdula ,  Robert J. Wojnarowski

发明人： John E. Hershey ,  Menahem Lowy ,  Lionel M. Levinson ,  Amer A. Hassan ,  Richard L. Frey ,  Kenneth B. Welles, II ,  Michael Gdula ,  Robert J. Wojnarowski

IPC分类号： F42B12/36 ,  G01S5/00 ,  G01S5/06 ,  H04L27/30

CPC分类号： G01S5/0009 ,  F42B12/36 ,  F42B12/365 ,  G01S5/06

摘要： A munitions cartridge transmitter capable of emitting an electromagnetic signal after discharge from a cartridge propelling device comprises a signal generator, an electromagnetic signal transmitter coupled to the generator, an antenna coupled to the transmitter, and a hollow cartridge for housing the generator, the transmitter, and the antenna. The transmitter is energized after discharge of the cartridge propelling device by a power source contained in the cartridge.

摘要翻译： 一种能够在从暗盒推进装置排放之后发出电磁信号的弹药盒式发射器包括信号发生器，耦合到发生器的电磁信号发射器，耦合到发射器的天线以及用于容纳发生器的中空滤芯， 和天线。 在通过盒中包含的电源将墨盒驱动装置排出之后，变送器通电。

公开(公告)号：US5331203A

公开(公告)日：1994-07-19

申请号：US141460

申请日：1993-10-25

申请人： Robert J. Wojnarowski ,  Charles W. Eichelberger ,  William P. Kornrumpf

发明人： Robert J. Wojnarowski ,  Charles W. Eichelberger ,  William P. Kornrumpf

IPC分类号： H01L23/538 ,  H01L23/02 ,  H01L23/12

CPC分类号： H01L24/82 ,  H01L23/5389 ,  H01L24/24 ,  H01L2224/2402 ,  H01L2224/24227 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/12033 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15787 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2924/3011

摘要： A high density interconnect structure is rendered suitable for the packaging of overlay sensitive chips by providing a cavity in the high density interconnect structure which spaces the sensitive surface of such chips from the overlying high density interconnect structure in a manner which prevents undesired interactions between the dielectric of the high density interconnect structure and the chip.

摘要翻译： 通过在高密度互连结构中提供空腔使得高密度互连结构适合于覆盖敏感芯片的封装，其将这种芯片的敏感表面与上覆的高密度互连结构隔离，以防止电介质之间的不期望的相互作用 的高密度互连结构和芯片。

公开(公告)号：US5258647A

公开(公告)日：1993-11-02

申请号：US936712

申请日：1992-08-26

申请人： Robert J. Wojnarowski ,  Charles W. Eichelberger

发明人： Robert J. Wojnarowski ,  Charles W. Eichelberger

IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L29/78

CPC分类号： H01L23/562 ,  H01L23/4985 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/75 ,  H01L24/82 ,  H01L2224/2402 ,  H01L2224/24225 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/75315 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/16195 ,  H01L2924/19041

摘要： A high acceleration object includes an electronic system which is operable at accelerations in excess of 20,000 g. Connections between integrated circuit chips and other portions of the electronic system are provided by metallization patterns disposed on polymer dielectric layers which are self-supporting across gaps between components. A high density interconnect structure is disposed within the cavity of a hermetically sealed package.

摘要翻译： 高加速度对象包括可在超过20,000g的加速度下操作的电子系统。 集成电路芯片和电子系统的其它部分之间的连接由设置在聚合物电介质层上的金属化图案提供，其跨组件之间的间隙自支撑。 高密度互连结构设置在密封封装的空腔内。

公开(公告)号：US5241456A

公开(公告)日：1993-08-31

申请号：US548462

申请日：1990-07-02

申请人： Walter M. Marcinkiewicz ,  Charles W. Eichelberger ,  Robert J. Wojnarowski

发明人： Walter M. Marcinkiewicz ,  Charles W. Eichelberger ,  Robert J. Wojnarowski

IPC分类号： H01L23/52 ,  H01L23/538 ,  H01L25/00

CPC分类号： H01L25/105 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0652 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/24225 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15787 ,  H01L2924/1627

摘要： An improved high density interconnect structure may include electronic components mounted on both sides of its substrate or a substrate which is only as thick as the semiconductor chips which reduces the overall structure thickness to the thickness of the semiconductor chips plus the combined thickness of the high density interconnect structure's dielectric and conductive layers. In the two-sided structures, feedthroughs, which are preferably hermetic, provide connections between opposite sides of the substrate. Substrates of either of these types may be stacked to form a three-dimensional structure. Means for connecting between adjacent substrates are preferably incorporated within the boundaries of the stack rather than on the outside surface thereof.

公开(公告)号：US5214655A

公开(公告)日：1993-05-25

申请号：US784094

申请日：1991-10-28

申请人： Charles W. Eichelberger ,  Kenneth B. Welles, II ,  Robert J. Wojnarowski

发明人： Charles W. Eichelberger ,  Kenneth B. Welles, II ,  Robert J. Wojnarowski

IPC分类号： G01R31/3185 ,  H01L23/538

CPC分类号： H01L23/5382 ,  G01R31/318505 ,  H01L2924/0002 ,  H01L2924/3011

摘要： A packaged electronics system, having respective portions each with respective input and output ports, and having interconnection busses between certain of these ports, is tested as follows. Each input port has a set of first transmission gates associated therewith for selectively disconnecting it during testing from the end of each interconnection bus connected bit during normal operation. Each input port has a second set of transmission gates associated therewith for selectively applying test vectors thereto during testing as provided in parallel form from a serially loaded shift register. Each output port connects to the input connections of a respective set of tristate drivers for selectively applying its output signals at relatively low source impedance to at least one interconnection bus connected from the output connections of that set of tristate drivers. A shift register converts the signals appearing in parallel at least one end of each interconnection bus to a concatenation of test results in serial form.

摘要翻译： 具有相应部分的封装电子系统各自具有相应的输入和输出端口，并且在这些端口中的某些端口之间具有互连总线，如下进行测试。 每个输入端口具有与其相关联的一组第一传输门，用于在正常操作期间从每个互连总线连接的位的端部进行测试时选择性地断开它。 每个输入端口具有与之相关联的第二组传输门，用于在测试期间选择性地将测试向量应用于串行装载的移位寄存器的并行形式。 每个输出端口连接到相应组的三态驱动器的输入连接，用于选择性地将其输出信号以相对低的源阻抗施加到从该组三态驱动器的输出连接连接的至少一个互连总线。 移位寄存器将并联出现的每个互连总线的至少一端的信号以串行形式连接到测试结果。

公开(公告)号：US5200810A

公开(公告)日：1993-04-06

申请号：US504749

申请日：1990-04-05

申请人： Robert J. Wojnarowski ,  Charles W. Eichelberger

发明人： Robert J. Wojnarowski ,  Charles W. Eichelberger

IPC分类号： H01L23/52 ,  H01L23/538 ,  H01L25/04 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H01L27/00 ,  H05K1/02 ,  H05K1/14 ,  H05K1/18

CPC分类号： H01L23/5389 ,  H01L2224/05554 ,  H01L2224/16225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H05K1/181 ,  H05K1/182 ,  Y10S257/93

摘要： The functionality, versatility and connection and packing density of a high density interconnect structure is enhanced by mounting one or more components on top of the high density interconnect structure for connection to conductors of the high density interconnect structure and the chips embedded within the high density interconnect structure. Both active and passive components may be mounted in this manner, as may components which would be adversely affected by high density interconnect structure fabrication temperatures or by the presence of the high density interconnect structure dielectric.