公开(公告)号：US20050021648A1

公开(公告)日：2005-01-27

申请号：US10896171

申请日：2004-07-22

申请人： Shino Ogasawara ,  Takashi Miyamoto

发明人： Shino Ogasawara ,  Takashi Miyamoto

IPC分类号： G06F13/00 ,  G06F15/16 ,  H04L12/58 ,  H04N1/00 ,  H04N1/387

CPC分类号： H04N1/00307 ,  H04L51/00 ,  H04N1/00209 ,  H04N1/00212 ,  H04N1/00244 ,  H04N1/32128 ,  H04N2201/3205 ,  H04N2201/3278

摘要： E-mail transmitted from a sender terminal together with an attached image file is received by a mail server. The latter inserts a tag in the header of the image file that has been attached to the e-mail. The tag includes the name and telephone number, etc., of the sender, which have been stored in a database that archives personal information. The image file in which the sender name, etc., has been inserted is attached to the e-mail in place of the image file that was attached to the received e-mail, and this e-mail is then transmitted to the terminal of a receiving party.

摘要翻译： 从发送方终端发送的电子邮件连同附加的图像文件由邮件服务器接收。 后者在附加到电子邮件的图像文件的标题中插入一个标签。 该标签包括已经存储在存档个人信息的数据库中的发送者的姓名和电话号码等。 将其中插入了发送者名称等的图像文件附加到电子邮件，而不是附加到接收到的电子邮件的图像文件，然后将该电子邮件发送到 接收方

公开(公告)号：US06801266B1

公开(公告)日：2004-10-05

申请号：US09614767

申请日：2000-07-12

申请人： Takatoshi Tsujimura ,  Takashi Miyamoto ,  Osamu Tokuhiro ,  Mitsuo Morooka

发明人： Takatoshi Tsujimura ,  Takashi Miyamoto ,  Osamu Tokuhiro ,  Mitsuo Morooka

IPC分类号： G02F1136

CPC分类号： G02F1/136209 ,  H01L27/124 ,  H01L29/78633

摘要： The present invention reduces the number of necessary steps in a thin-film-transistor manufacturing process and prevents an abnormal potential from being generated due to a leakage current from another signal line. A thin film transistor comprises a gate electrode 30 disposed on a predetermined substrate and formed in a predetermined pattern, a semiconductor layer 27 formed correspondingly to patterning of the gate electrode 30, a pixel electrode 25 interposed by the semiconductor layer, and a signal electrode 26 interposed by the semiconductor layer and disposed at a predetermined interval from the pixel electrode 25, in which the signal electrode 26 is disposed at such a position where the signal electrode prevents crosstalk leakage current flowing from adjacent signal lines 32b and 32c to the pixel electrode 25 via the semiconductor layer.

摘要翻译： 本发明减少薄膜晶体管制造工艺中必要的步骤数量，并且防止由于来自另一信号线的泄漏电流而产生异常电位。 薄膜晶体管包括设置在预定衬底上并以预定图案形成的栅电极30，对应于栅电极30的图形形成的半导体层27，由半导体层插入的像素电极25和信号电极26 由半导体层插入并且以像素电极25预定间隔设置，其中信号电极26设置在信号电极防止从相邻信号线32b和32c流到像素电极25的串扰泄漏电流的位置 通过半导体层。

公开(公告)号：US06753550B2

公开(公告)日：2004-06-22

申请号：US10331699

申请日：2002-12-30

申请人： Takatoshi Tsujimura ,  Osamu Tokuhiro ,  Mitsuo Morooka ,  Takashi Miyamoto

发明人： Takatoshi Tsujimura ,  Osamu Tokuhiro ,  Mitsuo Morooka ,  Takashi Miyamoto

IPC分类号： H01L2904

CPC分类号： H01L29/78696 ,  H01L29/66765 ,  H01L29/78669

摘要： The present invention improves a productivity in growing an a-Si film in a thin film transistor and to obtain an excellent thin film transistor characteristic. More specifically, disclosed is a thin film transistor in which an amorphous silicon film 2, a gate insulating film 3 and a gate electrode are sequentially stacked on an insulating substrate 1. The amorphous silicon film 2 includes a low defect-density amorphous silicon layer 5 formed at a low deposition rate and a high deposition rate amorphous silicon layer 6 formed at a deposition rate higher than that of the low defect-density amorphous silicon layer 5. The low defect-density amorphous silicon layer 5 in the amorphous silicon film 2 is grown closer to the insulating substrate 1, and the high deposition rate amorphous silicon layer 6 is grown closer to the gate insulating film 3.

摘要翻译： 本发明提高了在薄膜晶体管中生长a-Si膜的生产率，并获得优异的薄膜晶体管特性。 更具体地，公开了一种薄膜晶体管，其中非晶硅膜2，栅极绝缘膜3和栅电极依次层叠在绝缘基板1上。非晶硅膜2包括低缺陷密度非晶硅层5 以低沉积速率形成，并以高于低缺陷密度非晶硅层5的沉积速率形成沉积速率非晶硅层6.非晶硅膜2中的低缺陷密度非晶硅层5是 生长在更靠近绝缘基板1的地方，并且高沉积速率非晶硅层6生长得更靠近栅极绝缘膜3。

公开(公告)号：US06295074B1

公开(公告)日：2001-09-25

申请号：US09142923

申请日：1998-09-18

申请人： Kazushige Yamagishi ,  Jun Sato ,  Takashi Miyamoto

发明人： Kazushige Yamagishi ,  Jun Sato ,  Takashi Miyamoto

IPC分类号： G06F1576

CPC分类号： G06T1/20 ,  G09G5/363

摘要： The present invention can be introduced to an architecture such as a personal computer or an amusement equipment for realizing a high-speed graphic processing. In the case where a frame buffer, a command memory and an image processor are integrated in one chip in order to improve the drawing performance of an image processing device, each of the frame buffer and the command memory is constructed by a plurality of identical memory modules and the same row address is allotted to each memory module, thereby increasing the memory address depth. Thereby, it is possible to realize an incorporated frame buffer and an incorporated command memory each of which has a large capacity when seen from the image processor.

摘要翻译： 本发明可以被引入到用于实现高速图形处理的诸如个人计算机或娱乐设备的体系结构中。 在为了提高图像处理装置的绘图性能而将帧缓冲器，命令存储器和图像处理器集成在一个芯片中的情况下，帧缓冲器和命令存储器中的每一个由多个相同的存储器 模块和相同的行地址被分配给每个存储器模块，从而增加存储器地址深度。 由此，可以实现从图像处理器看时具有大容量的并入帧缓冲器和内置指令存储器。

公开(公告)号：US06229543B1

公开(公告)日：2001-05-08

申请号：US07511778

申请日：1990-04-20

申请人： Hiromichi Yamada ,  Tadashi Fukushima ,  Shigeru Matsuo ,  Takashi Miyamoto ,  Tooru Komagawa ,  Syoji Yoshida

发明人： Hiromichi Yamada ,  Tadashi Fukushima ,  Shigeru Matsuo ,  Takashi Miyamoto ,  Tooru Komagawa ,  Syoji Yoshida

IPC分类号： G06T100

CPC分类号： G06F9/3004 ,  G06F9/30087 ,  G06F9/3879 ,  G06F15/7832 ,  G06T1/20

摘要： A microprocessor for processing a large quantity of graphics data. The microprocessor independent of a CPU has two ports, and performs an instruction fetch and a data access or a memory access simultaneously to two memories mounted on separate buses. A graphics processing apparatus provided by the microprocessor transfers the graphics data between a system memory and a frame memory at high speeds.

摘要翻译： 用于处理大量图形数据的微处理器。 独立于CPU的微处理器具有两个端口，并且同时对安装在单独总线上的两个存储器执行指令获取和数据访问或存储器访问。 由微处理器提供的图形处理装置以高速度在系统存储器和帧存储器之间传送图形数据。

公开(公告)号：US5978305A

公开(公告)日：1999-11-02

申请号：US165194

申请日：1998-10-02

申请人： Toshio Sasaki ,  Yuji Tanaka ,  Kazumasa Yanagisawa ,  Hitoshi Tanaka ,  Jun Sato ,  Takashi Miyamoto ,  Mariko Ohtsuka ,  Satoru Nakanishi ,  Kazushige Ayukawa ,  Takao Watanabe

发明人： Toshio Sasaki ,  Yuji Tanaka ,  Kazumasa Yanagisawa ,  Hitoshi Tanaka ,  Jun Sato ,  Takashi Miyamoto ,  Mariko Ohtsuka ,  Satoru Nakanishi ,  Kazushige Ayukawa ,  Takao Watanabe

IPC分类号： G11C11/401 ,  G11C8/00 ,  G11C8/12 ,  G11C11/407 ,  G11C7/00

CPC分类号： G11C8/12

摘要： A RAM mounted so as to mix with logic circuits has a plurality of memory mats and one control circuit provided for the plurality of memory mats. Arithmetic circuits for respectively performing +1 or -1 arithmetic operations are respectively provided so as to correspond to the respective memory mats and are electrically connected in cascade form. An input terminal of the initial-stage arithmetic circuit is supplied with address-setting fixed address signals. Input signals supplied to the next and subsequent arithmetic circuits or signals outputted therefrom are defined as own-assigned address signals (those assigned to the corresponding memory mats). A comparator provided in association with each arithmetic circuit referred to above makes comparisons for coincidence between the address signals and address signals input upon memory access. The corresponding memory mat is selected based on the resultant coincidence signal.

公开(公告)号：US5789088A

公开(公告)日：1998-08-04

申请号：US427874

申请日：1995-04-26

申请人： Junichi Nakai ,  Kazuo Yoshikawa ,  Eisuke Kusumoto ,  Hiromi Matsumura ,  Takashi Miyamoto

发明人： Junichi Nakai ,  Kazuo Yoshikawa ,  Eisuke Kusumoto ,  Hiromi Matsumura ,  Takashi Miyamoto

IPC分类号： G11B5/64 ,  G11B5/73

CPC分类号： G11B5/7325 ,  G11B5/656 ,  Y10S428/90 ,  Y10T428/12465 ,  Y10T428/12854 ,  Y10T428/12861 ,  Y10T428/31678

摘要： Disclosed is magnetic recording media having a high coercivity sufficient to cope with the recent high density recording, low noise property and excellent squareness, and a target for forming a magnetic film useful for realizing the magnetic recording media. The magnetic film is made of a Co based alloy containing: Cr in an amount of 8-18 atomic %; one kind or more of elements selected from a group consisting of V, Mo and W in an amount of 3-10 atomic %, or one kind or more of the elements and Ta in an amount of 3-10 atomic %; Pt in an amount of 0.5 to 20 atomic % or Ni in an amount of 5-30 atomic %, as needed; and the balance being Co and inevitable impurities, wherein the total content of Cr and one kind or more of the elements selected from a group consisting of V, Mo and W, or of Cr and one kind or more of the elements and Ta is specified to be 24 atomic % or less. A target for forming the magnetic film is formed by melting, casting and hot-rolling the Co alloy having the above composition, and it has a maximum permeability of 100 or less.

摘要翻译： 公开了具有足以应付近来的高密度记录，低噪声特性和优异的矩形度的高矫顽力的磁记录介质，以及用于形成用于实现磁记录介质的磁膜的目标。 磁性膜由含有8〜18原子％的Cr的Co系合金构成。 选自含量为3-10原子％的V，Mo和W的元素中的一种或多种元素，或者一种或多种元素，Ta为3-10原子％的量; 根据需要的量为0.5〜20原子％的Pt或5-30原子％的Ni; 其余为Co和不可避免的杂质，其中规定Cr和选自由V，Mo和W组成的组中的一种或多种元素，或Cr和一种或多种元素和Ta的元素的总含量 为24原子％以下。 通过熔融，铸造和热轧具有上述组成的Co合金来形成磁性膜的目标，并且其最大磁导率为100以下。

公开(公告)号：USRE35628E

公开(公告)日：1997-10-14

申请号：US287420

申请日：1994-08-09

申请人： Hiroshi Ohkubo ,  Takashi Miyamoto

发明人： Hiroshi Ohkubo ,  Takashi Miyamoto

IPC分类号： G11B15/30 ,  G11B15/26 ,  G11B15/675

CPC分类号： G11B15/26 ,  G11B15/67521

摘要： A tape driver for use in a tape recorder or similar devices which use a data cartridge provided with a drive roller. The tape driver including a motor unit laterally disposed relative to the data cartridge and an idler located between the motor unit and the drive roller on the data cartridge such that the motor unit rotates the drive roller through the idler. Alternatively, a pulley rotated by the laterally located motor unit is used to directly rotate the drive roller.

摘要翻译： 一种用于磁带录音机或类似设备的磁带机，其使用设置有驱动辊的数据盒。 磁带驱动器包括相对于数据盒侧向设置的电动机单元和位于数据盒上的电动机单元和驱动辊之间的惰轮，使得电动机单元使驱动辊旋转通过惰轮。 或者，由侧向定位的马达单元旋转的皮带轮用于直接旋转驱动辊。

公开(公告)号：USRE35496E

公开(公告)日：1997-04-29

申请号：US525174

申请日：1995-09-08

申请人： Ken Yamamura ,  Naoto Ueda ,  Kazunari Michii ,  Hitoshi Fujimoto ,  Kiyoaki Tsumura ,  Hitoshi Sasaki ,  Takashi Miyamoto

发明人： Ken Yamamura ,  Naoto Ueda ,  Kazunari Michii ,  Hitoshi Fujimoto ,  Kiyoaki Tsumura ,  Hitoshi Sasaki ,  Takashi Miyamoto

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L23/495 ,  H01L23/02 ,  H01L23/08 ,  H01L43/00

CPC分类号： H01L24/85 ,  H01L23/49503 ,  H01L23/4951 ,  H01L23/49537 ,  H01L23/49551 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/4899 ,  H01L2224/49171 ,  H01L2224/78301 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L24/45 ,  H01L24/78 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/30105 ,  Y10T29/49146 ,  Y10T29/49158 ,  Y10T29/49169 ,  Y10T29/49171

摘要： A semiconductor device of the present invention accommodates a large semiconductor chip in a downsized package without impairing its reliability. The semiconductor chip is bonded on a relatively small die pad. Common inner leads and a plurality of inner leads are disposed opposite and spaced from the semiconductor chip by a gap ranging from 0.1 mm to 0.4 mm and the gap between the semiconductor chip and the common inner leads and the plurality of inner leads is filled with a resin which forms pan of a resin package.

摘要翻译： 本发明的半导体器件在小尺寸封装中容纳大型半导体芯片，而不损害其可靠性。 半导体芯片被接合在相对较小的管芯焊盘上。 通常的内部引线和多个内部引线与半导体芯片相对设置并间隔0.1mm至0.4mm的间隙，并且半导体芯片与公共内部引线之间的间隙以及多个内部引线填充有 形成树脂包装盘的树脂。

公开(公告)号：US5442231A

公开(公告)日：1995-08-15

申请号：US953705

申请日：1992-09-30

申请人： Takashi Miyamoto ,  Hitoshi Fujimoto

发明人： Takashi Miyamoto ,  Hitoshi Fujimoto

IPC分类号： H01L21/60 ,  H01L23/495 ,  H01L23/48 ,  H01L29/44 ,  H01L29/52 ,  H01L29/60

CPC分类号： H01L23/49531 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/14

摘要： A semiconductor device capable of accommodating a larger semiconductor chip in its package than a comparable conventional device and providing flexibility in the design of the semiconductor chip. An insulating tape includes an opening which receives a plurality of electrode pads disposed on the central part of the top surface of the semiconductor chip. The insulating tape is disposed between the semiconductor chip and inner leads of a lead frame. Circuit pattern traces are present on top of the insulating tape. The inner end of each circuit pattern trace is connected to a corresponding electrode pad with a fine metallic wire, and the outer end of each circuit pattern trace is connected to the corresponding inner lead.

摘要翻译： 一种半导体器件，其能够容纳比其它传统器件在其封装中更大的半导体芯片，并且在半导体芯片的设计中提供灵活性。 绝缘带包括开口，其接收设置在半导体芯片的顶表面的中心部分上的多个电极焊盘。 绝缘带设置在引线框架的半导体芯片和内引线之间。 电路图形迹线存在于绝缘胶带的顶部。 每个电路图形迹线的内端用细金属线连接到相应的电极焊盘上，并且每个电路图案迹线的外端连接到相应的内引线。