公开(公告)号：US20170084756A1

公开(公告)日：2017-03-23

申请号：US15202994

申请日：2016-07-06

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Kangguo Cheng ,  Xin Miao ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/786 ,  H01L29/66 ,  H01L21/265 ,  H01L21/02 ,  H01L29/06 ,  H01L29/423

CPC分类号： H01L29/0673 ,  B82Y10/00 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02252 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/26566 ,  H01L21/823807 ,  H01L21/84 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78654 ,  H01L29/78684 ,  H01L29/78696

摘要： A method of making a nanowire device includes disposing a first nanowire stack over a substrate, the first nanowire stack including alternating layers of a first and second semiconducting material, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; disposing a second nanowire stack over the substrate, the second nanowire stack including alternating layers of the first and second semiconducting materials, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; forming a first gate spacer along a sidewall of a first gate region on the first nanowire stack and a second gate spacer along a sidewall of a second gate region on the second nanowire stack; oxidizing a portion of the first nanowire stack within the first gate spacer; and removing the first semiconducting material from the first nanowire stack and the second nanowire stack.

公开(公告)号：US20170084537A1

公开(公告)日：2017-03-23

申请号：US14862894

申请日：2015-09-23

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Takashi Ando ,  Hiroaki Niimi ,  Tenko Yamashita

IPC分类号： H01L23/535 ,  H01L21/768 ,  H01L21/02 ,  H01L27/092 ,  H01L21/8238

CPC分类号： H01L23/535 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/02192 ,  H01L21/285 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76846 ,  H01L21/76877 ,  H01L21/823871 ,  H01L23/485 ,  H01L27/092 ,  H01L29/517 ,  H01L29/66545

摘要： A method of making a semiconductor device includes forming a first source/drain trench and a second source/drain trench over a first and second source/drain region, respectively; forming a first silicon dioxide layer in the first source/drain trench and a second silicon dioxide layer in the second source/drain trench; forming a first source/drain contact over the first source/drain region, the first source/drain contact including a first tri-layer contact disposed between the first silicon dioxide layer and a first conductive material; and forming a second source/drain contact over the second source/drain region, the second source/drain contact including a second tri-layer contact disposed between the second silicon dioxide layer and a second conductive material; wherein the first tri-layer contact includes a first metal oxide layer in contact with the first silicon dioxide layer, and the second tri-layer contact includes a second metal oxide layer in contact with the second silicon dioxide layer.

公开(公告)号：US20170077259A1

公开(公告)日：2017-03-16

申请号：US15363563

申请日：2016-11-29

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES INC.

发明人： Hyun-Jin Cho ,  Tenko Yamashita ,  Hui Zang

IPC分类号： H01L29/51 ,  H01L29/423 ,  H01L27/12

CPC分类号： H01L29/512 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/28088 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823842 ,  H01L21/823864 ,  H01L21/845 ,  H01L27/0922 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/42364 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

摘要： A method of forming a gate structure for a semiconductor device that includes forming first spacers on the sidewalls of replacement gate structures that are present on a fin structure, wherein an upper surface of the first spacers is offset from an upper surface of the replacement gate structure, and forming at least second spacers on the first spacers and the exposed surfaces of the replacement gate structure. The method may further include substituting the replacement gate structure with a functional gate structure having a first width portion in a first space between adjacent first spacers, and a second width portion having a second width in a second space between adjacent second spacers, wherein the second width is greater than the first width.

摘要翻译： 一种形成用于半导体器件的栅极结构的方法，包括在存在于鳍状结构上的置换栅极结构的侧壁上形成第一间隔物，其中第一间隔物的上表面偏离替换栅极结构的上表面 并且在所述第一间隔物和所述替换栅极结构的所述暴露表面上形成至少第二间隔物。 该方法还可以包括用相邻的第一间隔件之间的第一空间中具有第一宽度部分的功能栅极结构代替替换栅极结构，以及在相邻的第二间隔物之间​​的第二空间中具有第二宽度的第二宽度部分，其中第二 宽度大于第一宽度。

公开(公告)号：US20170077099A1

公开(公告)日：2017-03-16

申请号：US15342396

申请日：2016-11-03

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES INC.

发明人： Hyun-Jin Cho ,  Tenko Yamashita ,  Hui Zang

IPC分类号： H01L27/092 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/512 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/28088 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823842 ,  H01L21/823864 ,  H01L21/845 ,  H01L27/0922 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/42364 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

摘要： A method of forming a gate structure for a semiconductor device that includes forming first spacers on the sidewalls of replacement gate structures that are present on a fin structure, wherein an upper surface of the first spacers is offset from an upper surface of the replacement gate structure, and forming at least second spacers on the first spacers and the exposed surfaces of the replacement gate structure. The method may further include substituting the replacement gate structure with a functional gate structure having a first width portion in a first space between adjacent first spacers, and a second width portion having a second width in a second space between adjacent second spacers, wherein the second width is greater than the first width.

公开(公告)号：US09589833B1

公开(公告)日：2017-03-07

申请号：US14850093

申请日：2015-09-10

申请人： International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

发明人： Kangguo Cheng ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/423 ,  H01L21/768 ,  H01L29/06 ,  H01L23/535 ,  H01L29/78 ,  H01L29/66

CPC分类号： H01L29/4991 ,  H01L21/76805 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76895 ,  H01L21/76897 ,  H01L29/66568

摘要： Techniques for preventing leakage of contact material into air-gap spacers during contact formation. For example, a method comprises forming a contact trench on a semiconductor structure over an air-gap spacer and depositing a liner in the contact trench. The liner deposition material fills a portion of the air-gap spacer pinching off the contact trench to the air-gap spacer.

摘要翻译： 在接触形成期间防止接触材料泄漏到气隙间隔物中的技术。 例如，一种方法包括在气隙间隔物上的半导体结构上形成接触沟槽，并在接触沟槽中沉积衬垫。 衬垫沉积材料填充气隙间隔件的一部分，将接触沟槽夹紧到气隙间隔件。

公开(公告)号：US20170062590A1

公开(公告)日：2017-03-02

申请号：US15073065

申请日：2016-03-17

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Kangguo Cheng ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L21/308 ,  H01L21/306

CPC分类号： H01L21/3086 ,  H01L21/02164 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/31 ,  H01L21/324 ,  H01L29/66795

摘要： A method of making a semiconductor device includes patterning a fin in a substrate; performing a first etching process to remove a portion of the fin to cut the fin into a first cut fin and a second cut fin, the first cut fin having a first fin end and a second fin end and the second cut fin having a first fin end and a second fin end; forming an oxide layer along an endwall of the first fin end and an endwall of the second fin end of the first cut fin, and an endwall of the first fin end and an endwall of the second fin end of the second cut fin; disposing a liner onto the oxide layer disposed onto the endwall of the first fin end of the first cut fin to form a bilayer liner; and performing a second etching process to remove a portion of the second cut fin.

摘要翻译： 制造半导体器件的方法包括：在衬底中图形化翅片; 执行第一蚀刻工艺以去除所述翅片的一部分以将所述翅片切割成第一切割翅片和第二切割翅片，所述第一切割翅片具有第一翅片端部和第二翅片端部，所述第二切割翅片具有第一翅片 端和第二鳍末端; 沿着第一翅片端部的端壁和第一切割翅片的第二翅片端部的端壁以及第一翅片端部的端壁和第二切割翅片的第二翅片端部的端壁形成氧化物层; 将衬垫设置在设置在第一切割翅片的第一翅片端部的端壁上的氧化物层上以形成双层衬垫; 以及执行第二蚀刻工艺以去除所述第二切割翅片的一部分。

公开(公告)号：US20170062233A1

公开(公告)日：2017-03-02

申请号：US14841951

申请日：2015-09-01

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Kangguo Cheng ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L21/31 ,  H01L29/06 ,  H01L21/3065 ,  H01L29/16 ,  H01L21/306 ,  H01L21/324

CPC分类号： H01L21/3086 ,  H01L21/02164 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/31 ,  H01L21/324 ,  H01L29/66795

摘要： A method of making a semiconductor device includes patterning a fin in a substrate; performing a first etching process to remove a portion of the fin to cut the fin into a first cut fin and a second cut fin, the first cut fin having a first fin end and a second fin end and the second cut fin having a first fin end and a second fin end; forming an oxide layer along an endwall of the first fin end and an endwall of the second fin end of the first cut fin, and an endwall of the first fin end and an endwall of the second fin end of the second cut fin; disposing a liner onto the oxide layer disposed onto the endwall of the first fin end of the first cut fin to form a bilayer liner; and performing a second etching process to remove a portion of the second cut fin.

公开(公告)号：US20170040325A1

公开(公告)日：2017-02-09

申请号：US15168725

申请日：2016-05-31

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Rama Kambhampati ,  Junli Wang ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L27/092 ,  H01L29/66 ,  H01L29/161 ,  H01L21/8238 ,  H01L29/10 ,  H01L29/16

CPC分类号： H01L27/0924 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823864 ,  H01L29/1054 ,  H01L29/16 ,  H01L29/161 ,  H01L29/66545 ,  H01L29/7848

摘要： A method for forming field effect transistors comprises forming a first dummy gate stack over a first fin, forming a second dummy gate stack over a second fin, depositing a first layer of spacer material on the first dummy gate stack, the first fin, the second dummy gate stack, and the second fin, patterning a first masking layer on the first dummy gate stack and the first fin, etching to remove portions of the first layer of spacer material and form a spacer adjacent to the second dummy gate stack, removing the first masking layer, epitaxially growing a silicon material on the second fin, depositing a layer of oxide material on the first layer of spacer material, the first epitaxial material and the second dummy gate stack, and depositing a second layer of spacer material on the layer of oxide material.

摘要翻译： 一种用于形成场效应晶体管的方法包括在第一鳍上形成第一虚拟栅极堆叠，在第二鳍片上形成第二虚拟栅极叠层，在第一伪栅极叠层上沉积第一层间隔物材料， 虚拟栅极堆叠和第二鳍片，在第一伪栅极堆叠和第一鳍片上构图第一掩模层，蚀刻以去除第一层间隔物材料的部分并形成邻近第二伪栅极叠层的间隔区， 第一掩模层，在所述第二鳍上外延生长硅材料，在所述第一隔离层材料层上沉积氧化物层，所述第一外延材料和所述第二伪栅极堆叠，以及在所述层上沉积第二隔离层材料层 的氧化物质。

公开(公告)号：US09564358B1

公开(公告)日：2017-02-07

申请号：US14849269

申请日：2015-09-09

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES INC.

发明人： Xiuyu Cai ,  Kangguo Cheng ,  Ali Khakifirooz ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L21/768 ,  H01L29/78 ,  H01L29/66 ,  H01L29/08

CPC分类号： H01L27/0886 ,  H01L21/76224 ,  H01L21/76831 ,  H01L21/76897 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823475 ,  H01L21/823481 ,  H01L23/3171 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/41783 ,  H01L29/66795 ,  H01L29/7851

摘要： A method of forming a semiconductor device includes forming a trench in a passivating layer between neighboring fins. A barrier is formed in the trench. Conductive contacts are formed in the passivating layer to provide electrical connectivity to the fins. The conductive contacts are in direct contact with sidewalls of the barrier. A semiconductor device includes a passivating layer over a pair of fins. A barrier extends through the passivating layer and between the pair of fins and that electrically isolates the fins. Electrical contacts are formed through the passivating layer to the fins. The electrical contacts directly contact sidewalls of the barrier.

摘要翻译： 形成半导体器件的方法包括在相邻散热片之间的钝化层中形成沟槽。 在沟槽中形成屏障。 导电触点形成在钝化层中以提供与鳍片的电连接。 导电触头与屏障的侧壁直接接触。 半导体器件包括在一对鳍上的钝化层。 阻挡层延伸穿过钝化层并在一对翅片之间并且电隔离散热片。 电触头通过钝化层形成到散热片。 电触点直接接触屏障的侧壁。

公开(公告)号：US20170018463A1

公开(公告)日：2017-01-19

申请号：US14800970

申请日：2015-07-16

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc. ,  The Research Foundation for The State University of New York

发明人： Huiming Bu ,  Hui-feng Li ,  Vijay Narayanan ,  Hiroaki Niimi ,  Tenko Yamashita

IPC分类号： H01L21/8238 ,  H01L23/535 ,  H01L27/092

CPC分类号： H01L21/76832 ,  H01L21/285 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/823821 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L23/535 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/0895 ,  H01L29/66795 ,  H01L29/7851

摘要： A transistor device includes a substrate; a source region and a drain region formed over the substrate; and a source/drain contact formed in contact with at least one of the source region and the drain region, the source/drain contact including a conductive metal and a bilayer disposed between the conductive metal and the at least one of the source and drain region, the bilayer including a metal oxide layer in contact with the conductive metal, and a silicon dioxide layer in contact with the at least one of the source and drain region.

摘要翻译： 晶体管器件包括衬底; 形成在所述基板上的源极区域和漏极区域; 以及与所述源极区域和所述漏极区域中的至少一个接触形成的源极/漏极接触部，所述源极/漏极接触部包括导电金属和设置在所述导电金属与所述源极和漏极区域中的至少一个之间的双层 包括与导电金属接触的金属氧化物层的双层以及与源区和漏区中的至少一个接触的二氧化硅层。