摘要:
1-α-halo-2,2-difluoro-2-deoxy-D-ribofuranose derivative of formula (I) having the 3-hydroxy group protected with a biphenylcarbonyl group is a solid which can be easily purified by a simple procedure such as recrystallization, and therefore, it can be advantageously used as an intermediate in the preparation of gemcitabine in a large scale. Further, the 1-α-halo-2,2-difluoro-2-deoxy-D-ribofuranose derivative of formula (I) can be prepared with high stereoselectivity using the compound of formula (V) as an intermediate.
摘要:
A method of fabricating a printed circuit board having embedded components is disclosed. The method of fabricating a printed circuit board having embedded components according to an embodiment of the present invention comprises stacking a first conductive layer and a second conductive layer on a substrate in order, forming a hole in the second conductive layer and filling with dielectric material, stacking a third conductive layer on the second conductive layer and removing portions to form an upper electrode located on the dielectric material and a pad electrically connected with the first conductive layer, and stacking an insulation layer on the third conductive layer and forming a via hole and an outer layer circuit electrically connected with the upper electrode and the pad, so that it is easy to process the dielectric material to have a uniform thickness, and the capacitor and the resistor can be implemented simultaneously.
摘要:
Disclosed are an organic light emitting display and a deposition method for depositing an electrode or a passivation layer by means of a box cathode sputtering method or a facing target sputtering method by mixing Ar with an inert gas heavier than Ar gas. The present embodiments provide an organic light emitting display including a substrate; a thin film transistor formed on the substrate; a first electrode formed on the thin film transistor; an organic layer formed on the first electrode; and a second electrode layer sputter-deposited on the organic layer by mixing Ar gas with an inert gas heavier than said Ar using a box cathode sputtering method or a facing target sputtering method.
摘要:
Disclosed herein is nanoemulsion prepared by emulsifying main metabolites of ginseng saponin obtained by conversion of glucose, i.e. compound K (20-O-β-D-glucopyranosyl-20(S)-protopanaxadiol), ginsenoside F1 (20-O-β-D-glucopyranosyl-20(S)-protopanaxatriol) and compound Y (20-O-[α-L-arabinopyranosyl(1→6)-β-D-glucopyranosyl]-20(S)-protopanaxadiol); and admixture-thereof, in fine emulsion or liposome with dermotropic emulsifier by nano-emulsification; and having enhanced skin penetration, so to be effective in promoting proliferation of fibroblast and biosynthesis of collagen.
摘要:
The present invention relates to novel phytase enzyme, a gene coding the enzyme, and a Citrobacter sp. producing the enzyme. Particularly, the present invention relates to the phytase enzyme produced from Citrobacter sp. having (a) molecular weight of 47 kDa, (b) optimal pH of 3.5-4.5, (c) optimal temperature of 45-55° C., (d) as substrates phytate, p-nitrophenyl phosphate, tetrasodium pyrophosphate, ATP or ADP, (e) Michaelis constant of 0.3-0.5 mM utilizing phytate as substrate, and (f) high resistance to protease such as pepsin, trypsin, papain, elastase or pancreatin. The present invention also relates to the gene coding the phytase enzyme and the Citrobacter braakii producing the enzyme. The phytase enzyme and the Citrobacter braakii producing the enzyme of the present invention can be used in manufacturing a feed of monogastrics as feed additive and in recovering a specific decomposition product of phytate at low price.
摘要:
A printed circuit board (PCB) having a three-dimensional spiral inductor, which includes a plurality of insulating layers and conductor layers. The PCB comprises a plurality of coil conductor patterns made of conductive material and shaped into strips, which is provided on the plurality of conductor layers, respectively, such that the plurality of coil conductor patterns are parallel to each other and positioned on the same plane perpendicular to the conductor layers, and in which each of the plurality of coil conductor patterns is longer than an adjacent inner coil conductor pattern.
摘要:
A memory test circuit and a test system are provided. The memory test circuit comprises a memory which outputs stored data through n-bit data output pins, and a built-in self test (BIST) unit. The BIST unit writes test data in the memory, and by comparing the test data output from the memory with expected data, determines a failure cell address in the memory. The BIST unit generates k preliminary failure signals having failure information indicating whether the test data correspond with the expected data, and outputs the k preliminary failure signals for m cycles of a clock signal, by outputting k/m preliminary failure signals each cycle as first through k/m failure signals. When a test operation is performed, the memory divides the n-bit data output pins into eight groups to make the groups correspond to respective areas in the memory, and when a repair operation is performed, repair is performed in each area of the memory corresponding to the eight groups of the data output pins. In the memory test circuit and test system, the BIST unit testing a memory and generating a failure signal is disposed in a memory apparatus and a failure analysis circuit analyzing a failure signal output by the BIST unit is disposed in the test apparatus. Thus, the burden of designing a memory for test operation can be reduced. In addition, by outputting failure signals after dividing the signals, the overhead of pins of the test apparatus can be reduced.
摘要:
A method of fabricating a cavity capacitor embedded in a printed circuit board including two conductive layers to be used as a power layer and a ground layer, respectively, and a first dielectric layer, placed between the two conductive layers, the method including: removing an upper conductive layer and the first dielectric layer excluding a lower conductive layer of the two conductive layers to allow a cavity to be formed between the two conductive layers, the lower conductive layer being supposed to be used as any one of electrodes of the cavity capacitor; stacking a dielectric material on the cavity to allow a second dielectric layer having a lower stepped portion than the first dielectric layer to be formed in the cavity; and stacking a conductive material on an upper part of the second dielectric layer and side parts of the cavity to allow the upper conductive layer to be used as the other electrode of the cavity capacitor.