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1.发明申请公开(公告)号：US20110197409A1
公开(公告)日：2011-08-18
申请号：US13064847
申请日：2011-04-20
Applicant: Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
Inventor： Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
IPC: H01G7/00
CPC classification number: H05K1/162 , H05K3/0035 , H05K3/4069 , H05K3/4602 , H05K2201/0187 , H05K2201/0394 , H05K2201/09509 , H05K2201/09563 , Y10T29/435 , Y10T29/49117 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
Abstract: A method of fabricating a cavity capacitor embedded in a printed circuit board including two conductive layers to be used as a power layer and a ground layer, respectively, and a first dielectric layer, placed between the two conductive layers, the method including: removing an upper conductive layer and the first dielectric layer excluding a lower conductive layer of the two conductive layers to allow a cavity to be formed between the two conductive layers, the lower conductive layer being supposed to be used as any one of electrodes of the cavity capacitor; stacking a dielectric material on the cavity to allow a second dielectric layer having a lower stepped portion than the first dielectric layer to be formed in the cavity; and stacking a conductive material on an upper part of the second dielectric layer and side parts of the cavity to allow the upper conductive layer to be used as the other electrode of the cavity capacitor.
Abstract translation: 一种嵌入在印刷电路板中的空腔电容器的方法，包括分别用作功率层和接地层的两个导电层和放置在两个导电层之间的第一介电层，所述方法包括： 上导电层和除了两个导电层的下导电层之外的第一电介质层，以允许在两个导电层之间形成腔，下导电层假定用作空腔电容器的任一电极; 在所述空腔上堆叠电介质材料以允许在所述空腔中形成具有比所述第一电介质层更低的台阶部分的第二电介质层; 并且在第二电介质层的上部和空腔的侧部上堆叠导电材料，以允许上部导电层用作空腔电容器的另一个电极。
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2.发明申请Printed circuit board including landless via and method of manufacturing the same 审中-公开包括无地面通孔及其制造方法的印刷电路板公开(公告)号：US20090294164A1
公开(公告)日：2009-12-03
申请号：US12219079
申请日：2008-07-15
Applicant: Han Kim , Je Gwang Yoo , Chang Sup Ryu , Chang Gun Oh
Inventor： Han Kim , Je Gwang Yoo , Chang Sup Ryu , Chang Gun Oh
CPC classification number: H05K1/116 , H05K3/0035 , H05K3/0038 , H05K3/025 , H05K3/108 , H05K3/427 , H05K2201/0394 , H05K2201/09545 , Y10T29/49165
Abstract: Disclosed herein is a printed circuit board including a landless via and a method of manufacturing the printed circuit board. The printed circuit board includes a landless via having no upper land. The via includes a circuit pattern having a line width smaller than the minimum diameter of the via. The via does not have an upper land on an end surface thereof having the minimum diameter, and thus a circuit pattern connected to the via is finely formed, resulting in the high-density circuit pattern. Thus, a compact printed circuit board having a reduced number of layers is realized.
Abstract translation: 本发明公开了一种印刷电路板，其包括无轨道通孔和制造印刷电路板的方法。 印刷电路板包括没有上部焊盘的无地通孔。 通孔包括具有小于通孔的最小直径的线宽的电路图案。 通孔在其端面上没有具有最小直径的上部焊盘，因此与通孔连接的电路图案被精细地形成，导致高密度电路图案。 因此，实现了层数减少的紧凑型印刷电路板。
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3.发明申请Cavity capacitor fabrication method and printed circuit board having embedded cavity capacitor 审中-公开腔电容器制造方法和具有嵌入式腔体电容器的印刷电路板公开(公告)号：US20090084591A1
公开(公告)日：2009-04-02
申请号：US12007369
申请日：2008-01-09
Applicant: Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
Inventor： Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
CPC classification number: H05K1/162 , H05K3/0035 , H05K3/4069 , H05K3/4602 , H05K2201/0187 , H05K2201/0394 , H05K2201/09509 , H05K2201/09563 , Y10T29/435 , Y10T29/49117 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
Abstract: A cavity capacitor fabrication method and a printed circuit board having an embedded cavity capacitor are disclosed. In accordance with an embodiment of the present invention, the printed circuit board having the embedded cavity capacitor includes two conductive layers to be used as a power layer and a ground layer, respectively; and a first dielectric layer, placed between the two conductive layers, wherein the cavity capacitor is placed between the two conductive layers, the cavity capacitor being formed to allow a second dielectric layer to have a lower stepped portion than the first dielectric layer, and the second dielectric layer using the two conductive layers as a first electrode and a second electrode, respectively, and placed between the first electrode and the second electrode.
Abstract translation: 公开了一种空腔电容器制造方法和具有嵌入式空腔电容器的印刷电路板。 根据本发明的实施例，具有嵌入式空腔电容器的印刷电路板分别包括用作功率层和接地层的两个导电层; 以及放置在所述两个导电层之间的第一电介质层，其中所述空腔电容器被放置在所述两个导电层之间，所述空腔电容器被形成为允许第二电介质层具有比所述第一电介质层更低的台阶部分， 第二电介质层，分别使用两个导电层作为第一电极和第二电极，并且放置在第一电极和第二电极之间。
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公开(公告)号：US07983055B2
公开(公告)日：2011-07-19
申请号：US12010436
申请日：2008-01-24
Applicant: Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
Inventor： Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
IPC: H05K1/18 , H01L27/108
CPC classification number: H05K1/162 , H05K1/0218 , H05K1/0236 , H05K3/4069 , H05K2201/09509 , H05K2201/09618 , H05K2201/09663 , H05K2201/09972
Abstract: A printed circuit board having an embedded cavity capacitor is disclosed. According to an embodiment of the present invention, the printed circuit board having the embedded cavity capacitor, the printed circuit board can include two conductive layers to be used as a power layer and a ground layer, respectively; and a first dielectric layer, placed between the two conductive layers, wherein at least one cavity capacitor is arranged in a noise-transferable path between a noise source and a noise prevented destination which are placed on the printed circuit board, the cavity capacitor being formed to allow a second dielectric layer to have a lower stepped region than the first dielectric layer, the second dielectric layer using the two conductive layers as a first electrode and a second electrode, respectively, and placed between the first electrode and the second electrode.
Abstract translation: 公开了一种具有嵌入式腔体电容器的印刷电路板。 根据本发明的实施例，具有嵌入式空腔电容器的印刷电路板，印刷电路板可以分别包括用作功率层和接地层的两个导电层; 以及放置在所述两个导电层之间的第一电介质层，其中至少一个空腔电容器被布置在放置在所述印刷电路板上的噪声源和被噪声阻止的目的地之间的可噪声转移路径中，形成所述空腔电容器 以允许第二电介质层具有比第一电介质层更低的台阶区域，第二电介质层分别使用两个导电层作为第一电极和第二电极，并且放置在第一电极和第二电极之间。
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5.发明申请公开(公告)号：US20100212951A1
公开(公告)日：2010-08-26
申请号：US12654766
申请日：2009-12-31
Applicant: Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
Inventor： Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
IPC: H05K9/00
CPC classification number: H05K9/0071 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2924/00014 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H05K1/0236 , H05K9/002 , H05K9/0064 , H05K2201/09309 , H05K2201/09627 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
Abstract: An EMI noise reduction board using an electromagnetic bandgap structure is disclosed. In the EMI noise reduction board according to an embodiment of the present invention, an electromagnetic bandgap structure having band stop frequency properties can be inserted into an inner portion of the board so as to shield an EMI noise, in which the portion corresponds to an edge of the board and in which the EMI noise is conducted from the inside to the edge of the board and radiates to the outside of the board.
Abstract translation: 公开了一种使用电磁带隙结构的EMI降噪板。 在根据本发明实施例的EMI噪声抑制板中，具有带阻频率特性的电磁带隙结构可以插入到板的内部，以屏蔽EMI噪声，其中该部分对应于边缘 并且其EMI噪声从板的内部传导到边缘并辐射到板的外部。
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Patent Agency Ranking
公开(公告)号：US08310840B2
公开(公告)日：2012-11-13
申请号：US12222057
申请日：2008-07-31
Applicant: Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
Inventor： Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
IPC: H05K7/00
CPC classification number: H05K9/0039 , H01P1/2005 , H05K1/0236 , H05K2201/09309 , H05K2201/09627 , H05K2201/09663
Abstract: Disclosed are an electromagnetic bandgap structure and a printed circuit board including the same. In accordance with an embodiment of the present invention, the printed circuit board can include a dielectric layer, a plurality of conductive plates, and a stitching via, which is configured to electrically connect the conductive plates to each other. The stitching via can pass through the dielectric layer, and a part of the stitching via can be placed in a planar surface that is different from a planar surface in which the conductive plates are placed. With the present invention, the electromagnetic bandgap structure can prevent a signal of a predetermined frequency band from being transferred.
Abstract translation: 公开了一种电磁带隙结构和包括该电阻带隙结构的印刷电路板。 根据本发明的实施例，印刷电路板可以包括介电层，多个导电板和缝合通孔，其被配置为将导电板彼此电连接。 缝合通孔可以穿过介电层，并且缝合通孔的一部分可以放置在与放置导电板的平坦表面不同的平面表面中。 利用本发明，电磁带隙结构可以防止预定频带的信号被传送。
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公开(公告)号：US08169790B2
公开(公告)日：2012-05-01
申请号：US12010561
申请日：2008-01-25
Applicant: Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
Inventor： Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
IPC: H05K7/00
CPC classification number: H01P1/2005 , H01L2224/16225 , H01Q15/006 , H05K1/0236 , H05K2201/09309 , H05K2201/09627 , H05K2201/09681
Abstract: An electromagnetic bandgap structure and a printed circuit board having the electromagnetic bandgap that intercepts the transfer of a signal ranging a frequency band are disclosed. The electromagnetic bandgap structure includes a metal layer; a dielectric layer, stacked on the metal layer; at least two metal plates, stacked on the same planar surface of the dielectric layer; and a stitching via, connecting the adjacent metal plates. The stitching via passes through the dielectric layer, and a part of the stitching via is placed on the same planar surface of the metal layer. With the present invention, the electromagnetic bandgap can decrease the noise of a particular frequency by having a compact size and a low bandgap frequency.
Abstract translation: 公开了一种具有电磁带隙的电磁带隙结构和印刷电路板，该电磁带隙拦截了频带范围内的信号的传送。 电磁带隙结构包括金属层; 介电层，堆叠在金属层上; 至少两个金属板，堆叠在介电层的相同平面上; 和缝合通孔，连接相邻的金属板。 缝合通孔穿过电介质层，并且缝合通孔的一部分被放置在金属层的同一平面上。 利用本发明，电磁带隙可以通过具有紧凑的尺寸和低的带隙频率来降低特定频率的噪声。
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8.发明授权公开(公告)号：US08966746B2
公开(公告)日：2015-03-03
申请号：US13064847
申请日：2011-04-20
Applicant: Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
Inventor： Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
CPC classification number: H05K1/162 , H05K3/0035 , H05K3/4069 , H05K3/4602 , H05K2201/0187 , H05K2201/0394 , H05K2201/09509 , H05K2201/09563 , Y10T29/435 , Y10T29/49117 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
Abstract: A method of fabricating a cavity capacitor embedded in a printed circuit board including two conductive layers to be used as a power layer and a ground layer, respectively, and a first dielectric layer, placed between the two conductive layers, the method including: removing an upper conductive layer and the first dielectric layer excluding a lower conductive layer of the two conductive layers to allow a cavity to be formed between the two conductive layers, the lower conductive layer being supposed to be used as any one of electrodes of the cavity capacitor; stacking a dielectric material on the cavity to allow a second dielectric layer having a lower stepped portion than the first dielectric layer to be formed in the cavity; and stacking a conductive material on an upper part of the second dielectric layer and side parts of the cavity to allow the upper conductive layer to be used as the other electrode of the cavity capacitor.
Abstract translation: 一种嵌入在印刷电路板中的空腔电容器的方法，包括分别用作功率层和接地层的两个导电层和放置在两个导电层之间的第一介电层，所述方法包括： 上导电层和除了两个导电层的下导电层之外的第一电介质层，以允许在两个导电层之间形成腔，下导电层假定用作空腔电容器的任一电极; 在所述空腔上堆叠电介质材料以允许在所述空腔中形成具有比所述第一电介质层更低的台阶部分的第二电介质层; 并且在第二电介质层的上部和空腔的侧部上堆叠导电材料，以允许上部导电层用作空腔电容器的另一个电极。
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9.发明授权公开(公告)号：US08232478B2
公开(公告)日：2012-07-31
申请号：US12654766
申请日：2009-12-31
Applicant: Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
Inventor： Han Kim , Je-Gwang Yoo , Chang-Sup Ryu
IPC: H05K9/00
CPC classification number: H05K9/0071 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2924/00014 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H05K1/0236 , H05K9/002 , H05K9/0064 , H05K2201/09309 , H05K2201/09627 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
Abstract: An EMI noise reduction board using an electromagnetic bandgap structure is disclosed. In the EMI noise reduction board according to an embodiment of the present invention, an electromagnetic bandgap structure having band stop frequency properties can be inserted into an inner portion of the board so as to shield an EMI noise, in which the portion corresponds to an edge of the board and in which the EMI noise is conducted from the inside to the edge of the board and radiates to the outside of the board.
Abstract translation: 公开了一种使用电磁带隙结构的EMI降噪板。 在根据本发明实施例的EMI噪声抑制板中，具有带阻频率特性的电磁带隙结构可以插入到板的内部，以屏蔽EMI噪声，其中该部分对应于边缘 并且其EMI噪声从板的内部传导到边缘并辐射到板的外部。
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10.发明申请公开(公告)号：US20120066902A1
公开(公告)日：2012-03-22
申请号：US13301063
申请日：2011-11-21
Applicant: Han Kim , Je Gwang Yoo , Chang Sup Ryu , Chang Gun Oh
Inventor： Han Kim , Je Gwang Yoo , Chang Sup Ryu , Chang Gun Oh
IPC: H05K3/10
CPC classification number: H05K1/116 , H05K3/0035 , H05K3/0038 , H05K3/025 , H05K3/108 , H05K3/427 , H05K2201/0394 , H05K2201/09545 , Y10T29/49165
Abstract: A method of manufacturing a printed circuit board, including: preparing a double-sided substrate which comprises an insulating layer, a first copper layer formed on one side of the insulating layer and a second copper layer formed on the other side of the insulating layer; forming a via-hole through the second copper layer and the insulating layer; forming a plating layer on an inner wall of the via-hole; and forming, on the double-sided substrate, a via, a first circuit layer including a circuit pattern that is formed on a surface of the via having a minimum diameter and has a line width smaller than the minimum diameter of the via, and a second circuit layer including a lower land.
Abstract translation: 一种制造印刷电路板的方法，包括：制备双面基板，其包括绝缘层，形成在所述绝缘层的一侧上的第一铜层和形成在所述绝缘层的另一侧上的第二铜层; 通过所述第二铜层和所述绝缘层形成通孔; 在所述通孔的内壁上形成镀层; 并且在双面基板上形成通孔，包括形成在具有最小直径并且具有小于通孔的最小直径的线宽度的通孔的表面上的电路图案的第一电路层，以及 第二电路层包括较低的焊盘。
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