公开(公告)号：US09202925B2

公开(公告)日：2015-12-01

申请号：US14278234

申请日：2014-05-15

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Hideomi Suzawa ,  Yutaka Okazaki ,  Hidekazu Miyairi

IPC: H01L29/10 ,  H01L29/786 ,  H01L21/822 ,  H01L27/06 ,  H01L29/423

CPC classification number: H01L29/78606 ,  H01L21/8221 ,  H01L27/0688 ,  H01L29/42384 ,  H01L29/78603 ,  H01L29/7869 ,  H01L29/78696

Abstract: A structure is employed in which a first protective insulating layer; an oxide semiconductor layer over the first protective insulating layer; a source electrode and a drain electrode that are electrically connected to the oxide semiconductor layer; a gate insulating layer that is over the source electrode and the drain electrode and overlaps with the oxide semiconductor layer; a gate electrode that overlaps with the oxide semiconductor layer with the gate insulating layer provided therebetween; and a second protective insulating layer that covers the source electrode, the drain electrode, and the gate electrode are included. Furthermore, the first protective insulating layer and the second protective insulating layer each include an aluminum oxide film that includes an oxygen-excess region, and are in contact with each other in a region where the source electrode, the drain electrode, and the gate electrode are not provided.

Abstract translation: 采用其中第一保护绝缘层的结构; 在所述第一保护绝缘层上的氧化物半导体层; 与氧化物半导体层电连接的源电极和漏电极; 栅极绝缘层，位于源电极和漏电极之上并与氧化物半导体层重叠; 与所述氧化物半导体层重叠的栅电极，其间设置有所述栅极绝缘层; 并且包括覆盖源电极，漏电极和栅电极的第二保护绝缘层。 此外，第一保护绝缘层和第二保护绝缘层各自包括氧化物膜，该氧化铝膜包括氧过剩区域，并且在源电极，漏电极和栅电极的区域中彼此接触 没有提供

公开(公告)号：US09190527B2

公开(公告)日：2015-11-17

申请号：US14174412

申请日：2014-02-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Sachiaki Tezuka ,  Hideomi Suzawa ,  Akihisa Shimomura ,  Tetsuhiro Tanaka

IPC: H01L29/49 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/02318 ,  H01L29/66969

Abstract: A highly reliable semiconductor device including an oxide semiconductor is provided. Oxygen is supplied from a base insulating layer provided below an oxide semiconductor layer to a channel formation region, whereby oxygen vacancies which might be generated in the channel formation region are filled. Further, a protective insulating layer containing a small amount of hydrogen and functioning as a barrier layer having a low permeability to oxygen is formed over the gate electrode layer so as to cover side surfaces of an oxide layer and a gate insulating layer that are provided over the oxide semiconductor layer, whereby release of oxygen from the gate insulating layer and/or the oxide layer is prevented and generation of oxygen vacancies in a channel formation region is prevented.

Abstract translation: 提供了包括氧化物半导体的高度可靠的半导体器件。 氧气从设置在氧化物半导体层下方的基底绝缘层供给到沟道形成区域，由此填充可能在沟道形成区域中产生的氧空位。 此外，在栅电极层上形成包含少量氢并用作具有低氧渗透性的阻挡层的保护绝缘层，以覆盖设置在氧化物层和栅绝缘层上的侧表面 氧化物半导体层，从而防止了从栅极绝缘层和/或氧化物层的氧的释放，并且防止了沟道形成区域中的氧空位的产生。

公开(公告)号：US09166021B2

公开(公告)日：2015-10-20

申请号：US14047639

申请日：2013-10-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Sachiaki Tezuka ,  Tetsuhiro Tanaka ,  Toshihiko Takeuchi ,  Hideomi Suzawa ,  Suguru Hondo

IPC: H01L21/00 ,  H01L21/16 ,  H01L29/66 ,  H01L21/28 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/49 ,  H01L21/8238 ,  H01L29/786

CPC classification number: H01L29/7869 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/823462 ,  H01L21/823857 ,  H01L29/1054 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78

Abstract: Stable electrical characteristics and high reliability are provided for a miniaturized semiconductor device including an oxide semiconductor, and the semiconductor device is manufactured. The semiconductor device includes a base insulating layer; an oxide stack which is over the base insulating layer and includes an oxide semiconductor layer; a source electrode layer and a drain electrode layer over the oxide stack; a gate insulating layer over the oxide stack, the source electrode layer, and the drain electrode layer; a gate electrode layer over the gate insulating layer; and an interlayer insulating layer over the gate electrode layer. In the semiconductor device, the defect density in the oxide semiconductor layer is reduced.

Abstract translation: 为包括氧化物半导体的小型半导体器件提供稳定的电特性和高可靠性，并且制造半导体器件。 半导体器件包括基极绝缘层; 氧化物堆叠，其在所述基底绝缘层上方并且包括氧化物半导体层; 氧化层上的源电极层和漏电极层; 氧化层上的栅极绝缘层，源电极层和漏电极层; 栅绝缘层上的栅电极层; 以及在栅电极层上的层间绝缘层。 在半导体器件中，氧化物半导体层中的缺陷密度降低。

公开(公告)号：US09153436B2

公开(公告)日：2015-10-06

申请号：US14054162

申请日：2013-10-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hideomi Suzawa ,  Shinya Sasagawa ,  Tetsuhiro Tanaka

IPC: H01L21/00 ,  H01L21/02 ,  H01L29/04 ,  H01L29/26 ,  H01L29/78 ,  C23C14/08 ,  C23C14/34 ,  H01L29/45 ,  H01L29/49 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L21/02565 ,  C23C14/086 ,  C23C14/3414 ,  H01L21/02488 ,  H01L21/02554 ,  H01L21/02592 ,  H01L21/02609 ,  H01L21/02617 ,  H01L21/02631 ,  H01L21/441 ,  H01L21/47576 ,  H01L21/47635 ,  H01L29/045 ,  H01L29/26 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78 ,  H01L29/7869

Abstract: In a semiconductor device in which a channel formation region is included in an oxide semiconductor layer, an oxide insulating film below and in contact with the oxide semiconductor layer and a gate insulating film over and in contact with the oxide semiconductor layer are used to supply oxygen of the gate insulating film, which is introduced by an ion implantation method, to the oxide semiconductor layer.

Abstract translation: 在氧化物半导体层中包括沟道形成区域的半导体器件中，使用氧化物半导体层下方并与氧化物半导体层接触的氧化物绝缘膜和与氧化物半导体层接触并与氧化物半导体层接触的栅极绝缘膜供给氧 通过离子注入法引入的栅极绝缘膜到氧化物半导体层。

公开(公告)号：US09142596B2

公开(公告)日：2015-09-22

申请号：US14143382

申请日：2013-12-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hideomi Suzawa ,  Ichiro Uehara

IPC: H05B33/00 ,  H01L27/32 ,  H01L27/12

Abstract: In an EL element having an anode, an insulating film (bump) formed on the anode, and an EL film and a cathode formed on the insulating film, each of a bottom end portion and a top end portion of the insulating film is formed so as to have a curved surface. The taper angle of a central portion of the insulating film is set within the range from 35° to 70°, thereby preventing the gradient of the film forming surface on which the EL film and the cathode are to be formed from being abruptly changed. On the thus-formed film forming surface, the EL film and the cathode can be formed so as to be uniform in thickness, so that occurrence of discontinuity in each of EL film and the cathode is prevented.

公开(公告)号：US20150255612A1

公开(公告)日：2015-09-10

申请号：US14639427

申请日：2015-03-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hideomi Suzawa ,  Masami Jintyou

IPC: H01L29/786 ,  H01L27/32 ,  H01L27/12 ,  H01L29/49 ,  H01L29/24 ,  H01L29/36 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78696

Abstract: A self-aligned transistor including an oxide semiconductor film, which has excellent and stable electrical characteristics, is provided. A semiconductor device is provided with a transistor that includes an oxide semiconductor film, a gate electrode overlapping with part of the oxide semiconductor film, and a gate insulating film between the oxide semiconductor film and the gate electrode. The oxide semiconductor film includes a first region and second regions between which the first region is positioned. The second regions include an impurity element. A side of the gate insulating film has a depressed region. Part of the gate electrode overlaps with parts of the second regions in the oxide semiconductor film.

Abstract translation: 提供了具有优异且稳定的电气特性的包含氧化物半导体膜的自对准晶体管。 半导体器件具有晶体管，该晶体管包括氧化物半导体膜，与氧化物半导体膜的一部分重叠的栅电极以及氧化物半导体膜与栅电极之间的栅极绝缘膜。 氧化物半导体膜包括第一区域和第一区域，第一区域和第二区域之间位于第一区域之间。 第二区域包括杂质元素。 栅极绝缘膜的一侧具有凹陷区域。 栅电极的一部分与氧化物半导体膜中的第二区域的一部分重叠。

公开(公告)号：US09064967B2

公开(公告)日：2015-06-23

申请号：US14472602

申请日：2014-08-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideomi Suzawa ,  Motomu Kurata ,  Mayumi Mikami

IPC: H01L29/788 ,  H01L21/336 ,  H01L29/786 ,  H01L27/12 ,  H01L29/417 ,  H01L27/108 ,  H01L29/12 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/108 ,  H01L27/1225 ,  H01L29/12 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/78696 ,  H01L2029/42388

Abstract: The semiconductor element includes an oxide semiconductor layer on an insulating surface; a source electrode layer and a drain electrode layer over the oxide semiconductor layer; a gate insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer. The source electrode layer and the drain electrode layer have sidewalls which are in contact with a top surface of the oxide semiconductor layer.

Abstract translation: 半导体元件在绝缘表面上包括氧化物半导体层; 氧化物半导体层上的源电极层和漏电极层; 氧化物半导体层上的栅极绝缘层，源极电极层和漏极电极层; 以及栅极绝缘层上的栅极电极层。 源电极层和漏电极层具有与氧化物半导体层的顶表面接触的侧壁。

公开(公告)号：US20150108472A1

公开(公告)日：2015-04-23

申请号：US14518259

申请日：2014-10-20

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hideomi Suzawa ,  Tetsuhiro Tanaka ,  Yuhei Sato ,  Sachiaki Tezuka ,  Shunpei Yamazaki

IPC: H01L29/786 ,  H01L29/51

CPC classification number: H01L29/78648 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/41733 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696 ,  H01L2029/42388

Abstract: A transistor having high field-effect mobility is provided. A transistor having stable electrical characteristics is provided. A transistor having small current in an off state (in a non-conductive state) is provided. A semiconductor device including such a transistor is provided. A first electrode is formed over a substrate, a first insulating layer is formed adjacent to a side surface of the first electrode, and a second insulating layer is formed to cover the first insulating layer and be in contact with at least part of a surface of the first electrode. The surface of the first electrode is formed of a conductive material that does not easily transmit an impurity element. The second insulating layer is formed of an insulating material that does not easily transmit an impurity element. An oxide semiconductor layer is formed over the first electrode with a third insulating layer provided therebetween.

Abstract translation: 提供具有高场效应迁移率的晶体管。 提供具有稳定电特性的晶体管。 提供了处于断开状态（非导通状态）的小电流的晶体管。 提供了包括这种晶体管的半导体器件。 第一电极形成在衬底上，第一绝缘层与第一电极的侧表面相邻地形成，并且形成第二绝缘层以覆盖第一绝缘层并与第一绝缘层的至少一部分表面接触 第一个电极。 第一电极的表面由不容易透过杂质元素的导电材料形成。 第二绝缘层由不容易透过杂质元素的绝缘材料形成。 在第一电极上形成氧化物半导体层，其间设置有第三绝缘层。

公开(公告)号：US08957424B2

公开(公告)日：2015-02-17

申请号：US14223366

申请日：2014-03-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Koji Ono ,  Hideomi Suzawa ,  Tatsuya Arao

IPC: H01L27/14 ,  H01L33/08 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/786 ,  H01L33/62

CPC classification number: H01L27/1222 ,  G02F1/13624 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/127 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L33/08 ,  H01L33/62 ,  H01L2029/7863 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Disclosed is an electroluminescence device having a substrate, a thin film transistor over the substrate, an insulating film over the thin film transistor, an electroluminescence element over the insulating film, a passivation film over the electroluminescence element, and a counter substrate over the passivation film. The electroluminescence element is configured to emit light through the counter substrate, and a space between the substrate and the counter substrate is filled with a filler. The electroluminescence device is featured by the tapered side surface of a gate electrode of the thin film transistor.

Abstract translation: 公开了一种电致发光器件，其具有衬底，衬底上的薄膜晶体管，薄膜晶体管上的绝缘膜，绝缘膜上的电致发光元件，电致发光元件上的钝化膜以及钝化膜上的对置衬底 。 电致发光元件被配置为通过对置基板发光，并且用填充物填充基板和对向基板之间的空间。 电致发光元件的特征在于薄膜晶体管的栅电极的锥形侧面。

公开(公告)号：US20140361289A1

公开(公告)日：2014-12-11

申请号：US14287749

申请日：2014-05-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideomi Suzawa

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/66969 ,  H01L29/78618

Abstract: Objects are to obtain a minute transistor by reducing the channel length L of a transistor used in a semiconductor integrated circuit such as an LSI, a CPU, or a memory, increase the operation speed of the circuit, and reduce power consumption. Oxide layers having compositions different from the composition of an oxide semiconductor layer including a channel formation region are provided below and over the oxide semiconductor layer, and in the oxide semiconductor layer including the channel formation region, low-resistance regions are provided to interpose the channel formation region therebetween in the lateral direction. The low-resistance regions are formed in a region other than the channel formation region so as to be in contact with a metal film or a metal oxide film by diffusion of a metal element (e.g., aluminum) contained in the metal or metal oxide films into the parts of the oxide semiconductor layer.

Abstract translation: 目的是通过减小用于诸如LSI，CPU或存储器的半导体集成电路中使用的晶体管的沟道长度L来获得微小的晶体管，从而提高电路的操作速度，并降低功耗。 在氧化物半导体层的下方和上方设置具有与包含沟道形成区域的氧化物半导体层的组成不同的组成的氧化物层，在包含沟道形成区域的氧化物半导体层中，设置低电阻区域以插入沟道 形成区域。 低电阻区域形成在通道形成区域以外的区域中，以通过金属或金属氧化物膜中所含的金属元素（例如铝）的扩散而与金属膜或金属氧化物膜接触 进入氧化物半导体层的部分。