公开(公告)号：US20030207558A1

公开(公告)日：2003-11-06

申请号：US10139976

申请日：2002-05-06

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tien-I Bao ,  Syun-Ming Jang

IPC分类号： H01L021/4763 ,  H01L021/44

CPC分类号： H01L21/76843 ,  H01L21/76847 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76877 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for forming a copper containing semiconductor feature to prevent thermally induced defects in including: (a) providing an anisotropically etched opening formed in a dielectric insulating layer; (b) conformally depositing a barrier layer over the anisotropically etched opening; (c) conformally depositing a copper portion to fill a portion of the anisotropically etched opening with copper; and, (d) repeating steps b and c at least once to completely fill the anisotropically etched opening to form a copper filled semiconductor feature.

摘要翻译： 一种用于形成含铜半导体特征以防止热诱导缺陷的方法，包括：（a）提供形成在介电绝缘层中的各向异性蚀刻的开口; （b）在各向异性蚀刻的开口上保形地沉积阻挡层; （c）保形地沉积铜部分以用铜填充各向异性蚀刻的开口的一部分; 和（d）重复步骤b和c至少一次以完全填充各向异性蚀刻的开口以形成铜填充的半导体特征。

公开(公告)号：US06624075B1

公开(公告)日：2003-09-23

申请号：US10288862

申请日：2002-11-05

申请人： Sergey Lopatin ,  Alexander H. Nickel

发明人： Sergey Lopatin ,  Alexander H. Nickel

IPC分类号： H01L214763

CPC分类号： H01L21/76843 ,  H01L21/2885 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76873 ,  H01L21/76886 ,  H01L23/5226 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of reducing electromigration in copper interconnect lines by restricting Cu-diffusion pathways along a Cu surface via doping the Cu surface with Zn from an interim copper-zinc alloy (Cu—Zn) thin film electroplated on the copper (Cu) surface from a stable chemical solution, and controlling the Zn-doping thereof, which also improves interconnect reliability and corrosion resistance, and a semiconductor device thereby formed. The method involves using interim reduced-oxygen Cu—Zn alloy thin films for forming an encapsulated dual-inlaid interconnect structure. The films are formed by electroplating a Cu surface via by electroplating, the Cu surface in a unique chemical solution containing salts of Zn and Cu, their complexing agents, a pH adjuster, and surfactants; and annealing the interim electroplated Cu—Zn alloy thin films and a Cu-fill; and planarizing the interconnect structure.

摘要翻译： 一种通过在铜（Cu）表面上电镀铜离子铜（Cu）的中间铜 - 锌合金（Cu-Zn）薄膜上，通过用Zn掺杂Cu表面来限制沿Cu表面的Cu扩散路径来减少铜互连线中的电迁移的方法 稳定的化学溶液，并且控制其Zn掺杂，这也提高了互连可靠性和耐腐蚀性，以及由此形成的半导体器件。 该方法包括使用临时还原氧Cu-Zn合金薄膜来形成封装的双镶嵌互连结构。 通过电镀电镀Cu表面，通过电镀Cu晶体，以独特的含有Zn和Cu盐的化学溶液，它们的络合剂，pH调节剂和表面活性剂形成Cu表面; 并对中间电镀Cu-Zn合金薄膜和Cu填充进行退火; 并平坦化互连结构。

公开(公告)号：US06610151B1

公开(公告)日：2003-08-26

申请号：US09563733

申请日：2000-05-03

申请人： Uri Cohen

发明人： Uri Cohen

IPC分类号： C23C1600

CPC分类号： H01L21/76843 ,  H01L21/76873 ,  H01L2221/1089

摘要： An apparatus for depositing seed layers from a group of Cu, Ag or an alloy thereof on a substrate having narrow openings surrounded by a filed; the apparatus comprising a controller, said controller including instructions to deposit a conformal seed layer having a thickness of 50-500 Å oil the filed and to deposit a non-conformal seed layer having a thickness of 100-3000 Å on the filed and to stop depositing the seed layers prior to filling the narrow openings, such that the rermaining narrow openings are filled by electroplating. In accordance with the invention, substantially conformal and non-conformal seed layers me deposited in an apparatus where the conformal and non-conformal seed layer deposition steps can be carried out without breaking vacuum, or without exposing the wafer to the atmosphere between the deposition steps. In another embodiment of the invention, the apparatus comprises a chamber in which both conformal and non-conformal seed layers are deposited utilizing two or more distinct steps, wherein the deposition variables (or conditions) during the first step are suitable for the deposition of a substantially conformal (or a non-conformal) seed layer, and the deposition conditions during the second step are suitable for the deposition of a substantially non-conformal (or a conformal) seed layer.

摘要翻译： 一种用于从一组Cu，Ag或其合金中沉积种子层的装置，其具有由一个场所围绕的狭窄的开口; 所述装置包括控制器，所述控制器包括用于沉积具有50-500埃厚度的保形种子层的指令，并且将具有厚度为100-3000的非保形晶种层沉积在所述场上并停止 在填充窄开口之前沉积种子层，使得通过电镀来填充窄的开口。 根据本发明，我将基本上保形的和非保形的种子层沉积在装置中，其中可以在不破坏真空的情况下进行保形和非保形种子层沉积步骤，或者不在沉积步骤之间将晶片暴露于大气中 。 在本发明的另一个实施方案中，该装置包括一个室，其中使用两个或多个不同步骤沉积保形和非保形种子层，其中在第一步骤期间的沉积变量（或条件）适于沉积 基本上保形（或非保形）种子层，并且第二步骤期间的沉积条件适合沉积基本上不共形（或保形）种子层。

公开(公告)号：US20030143837A1

公开(公告)日：2003-07-31

申请号：US10059851

申请日：2002-01-28

申请人： APPLIED MATERIALS, INC.

发明人： Srinivas Gandikota ,  Chris R. McGuirk ,  Deenesh Padhi ,  Muhammad Atif Malik ,  Sivakami Ramanathan ,  Girish A. Dixit ,  Robin Cheung

IPC分类号： H01L021/44 ,  H01L021/4763

CPC分类号： H01L21/76843 ,  C23C18/165 ,  C23C18/1651 ,  C23C18/1653 ,  C23C18/1671 ,  C23C18/1696 ,  C23C18/1879 ,  C23C18/38 ,  C25D5/10 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76871 ,  H01L21/76874 ,  H01L21/76877 ,  H01L2221/1089

摘要： An apparatus and a method of depositing a catalytic layer comprising at least one metal selected from the group consisting of noble metals, semi-noble metals, alloys thereof, and combinations thereof in sub-micron features formed on a substrate. Examples of noble metals include palladium and platinum. Examples of semi-noble metals include cobalt, nickel, and tungsten. The catalytic layer may be deposited by electroless deposition, electroplating, or chemical vapor deposition. In one embodiment, the catalytic layer may be deposited in the feature to act as a barrier layer to a subsequently deposited conductive material. In another embodiment, the catalytic layer may be deposited over a barrier layer. In yet another embodiment, the catalytic layer may be deposited over a seed layer deposited over the barrier layer to act as a nullpatchnull of any discontinuities in the seed layer. Once the catalytic layer has been deposited, a conductive material, such as copper, may be deposited over the catalytic layer. In one embodiment, the conductive material is deposited over the catalytic layer by electroless deposition. In another embodiment, the conductive material is deposited over the catalytic layer by electroless deposition followed by electroplating or followed by chemical vapor deposition. In still another embodiment, the conductive material is deposited over the catalytic layer by electroplating or by chemical vapor deposition.

摘要翻译： 一种沉积包含至少一种选自贵金属，半贵金属，其合金及其组合的金属的催化剂层的装置和方法，其形成在基板上形成的亚微米特征。 贵金属的实例包括钯和铂。 半贵金属的实例包括钴，镍和钨。 可通过无电沉积，电镀或化学气相沉积来沉积催化层。 在一个实施方案中，催化层可以沉积在特征中以用作随后沉积的导电材料的阻挡层。 在另一个实施方案中，催化剂层可以沉积在阻挡层上。 在另一个实施方案中，催化层可以沉积在沉积在阻挡层上的种子层上，以充当种子层中任何不连续性的“贴片”。 一旦沉积了催化层，可以在催化剂层上沉积诸如铜的导电材料。 在一个实施例中，导电材料通过无电沉积沉积在催化剂层上。 在另一个实施方案中，导电材料通过无电沉积然后电镀或随后进行化学气相沉积沉积在催化剂层上。 在另一个实施例中，导电材料通过电镀或化学气相沉积沉积在催化层上。

公开(公告)号：US20030141194A1

公开(公告)日：2003-07-31

申请号：US10357422

申请日：2003-02-03

发明人： LinLin Chen

IPC分类号： C25D005/02 ,  C25D005/10

CPC分类号： H01L21/76843 ,  H01L21/2885 ,  H01L21/76868 ,  H01L21/76873 ,  H01L2221/1089 ,  H05K3/423

摘要： A process for applying a metallization interconnect structure to a semiconductor workpiece having a barrier layer deposited on a surface thereof is set forth. The process includes the forming of an ultra-thin metal seed layer on the barrier layer. The ultra-thin seed layer having a thickness of less than or equal to about 500 Angstroms. The ultra-thin seed layer is then enhanced by depositing additional metal thereon to provide an enhanced seed layer. The enhanced seed layer has a thickness at all points on sidewalls of substantially all recessed features distributed within the workpiece that is equal to or greater than about 10% of the nominal seed layer thickness over an exteriorly disposed surface of the workpiece

摘要翻译： 阐述了将金属化互连结构应用于具有沉积在其表面上的阻挡层的半导体工件的方法。 该方法包括在阻挡层上形成超薄金属种子层。 超薄种子层具有小于或等于约500埃的厚度。 然后通过在其上沉积附加金属以提供增强的种子层来增强超薄籽晶层。 增强的种子层在分布在工件内的基本上所有凹陷特征的侧壁上的所有点处具有等于或大于工件的外部设置表面上的标称种子层厚度的约10％的厚度

公开(公告)号：US20030129828A1

公开(公告)日：2003-07-10

申请号：US10328629

申请日：2002-12-23

发明人： Uri Cohen

IPC分类号： H01L021/4763

CPC分类号： H01L21/76843 ,  H01L21/76873 ,  H01L2221/1089 ,  H04N21/2347 ,  H04N21/4405 ,  H04N21/4408 ,  H04N21/4788 ,  H04N21/64707

摘要： One embodiment of the present invention is a method for making metallic interconnects, which method is utilized at a stage of processing a substrate having a patterned insulating layer which includes at least one opening and a field surrounding the at least one opening, the field and the at least one opening being ready for depositing of one or more seed layers, which method includes steps of: (a) depositing a substantially conformal seed layer over the field and inside surfaces of the at least one opening; (b) depositing a substantially non-conformal seed layer over the substantially conformal seed layer, said substantially non-conformal seed layer being thicker than said substantially conformal seed layer over the field, wherein the substantially conformal and the substantially non-conformal seed layers do not seal the at least one opening; and (c) electroplating a metallic layer over the substantially non-conformal seed layer, wherein the electroplated metallic layer comprises a material selected from a group consisting of Cu, Ag, or alloys comprising one or more of these metals.

摘要翻译： 本发明的一个实施例是一种用于制造金属互连的方法，该方法用于处理具有图案化绝缘层的基底的阶段，该图案化绝缘层包括至少一个开口和围绕该至少一个开口的场， 至少一个开口准备用于沉积一个或多个种子层，该方法包括以下步骤：（a）在至少一个开口的场和内表面上沉积基本上保形的种子层; （b）在所述基本上保形的种子层上沉积基本上非保形的种子层，所述基本上不共形的种子层比所述场上的所述基本上保形的籽晶层厚，其中基本上保形的和基本上不共形的种子层 不密封至少一个开口; 和（c）在基本上不共形的种子层上电镀金属层，其中电镀金属层包括选自Cu，Ag或包含这些金属中的一种或多种的合金的材料。

公开(公告)号：US20030124846A1

公开(公告)日：2003-07-03

申请号：US10326496

申请日：2002-12-20

发明人： Tony P. Chiang ,  Yu D. Cong ,  Peijun Ding ,  Jianming Fu ,  Howard H. Tang ,  Anish Tolia

IPC分类号： H01L021/445 ,  C25D005/02 ,  H01L021/288 ,  C23C014/32 ,  H01L021/44

CPC分类号： H01L21/76843 ,  C23C14/046 ,  C23C14/345 ,  C23C14/3457 ,  C23C14/35 ,  C23C14/358 ,  C23C14/564 ,  H01J37/321 ,  H01J37/3402 ,  H01J37/3408 ,  H01J37/3441 ,  H01J2237/3327 ,  H01L21/2855 ,  H01L21/76862 ,  H01L21/76865 ,  H01L21/76868 ,  H01L21/76871 ,  H01L21/76873 ,  H01L21/76876 ,  H01L21/76877 ,  H01L2221/1089

摘要： A DC magnetron sputter reactor for sputtering copper, its method of use, and shields and other parts promoting self-ionized plasma (SIP) sputtering, preferably at pressures below 5 milliTorr, preferably below 1 milliTorr. Also, a method of coating copper into a narrow and deep via or trench using SIP for a first copper layer. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. The SIP copper layer can act as a seed and nucleation layer for hole filling with conventional sputtering (PVD) or with electrochemical plating (ECP). For very high aspect-ratio holes, a copper seed layer is deposited by chemical vapor deposition (CVD) over the SIP copper nucleation layer, and PVD or ECP completes the hole filling. The copper seed layer may be deposited by a combination of SIP and high-density plasma sputtering. For very narrow holes, the CVD copper layer may fill the hole.

摘要翻译： 用于溅射铜的直流磁控溅射反应器，其使用方法，以及屏蔽和促进自离子等离子体（SIP）溅射的其它部件，优选在低于5毫托的压力，优选低于1毫托的压力下。 另外，使用SIP将第一铜层涂覆在窄的和深的通孔或沟槽中的方法。 SIP由在溅射期间施加到靶的不均匀磁强度和高功率的磁极的小磁控管促进。 SIP铜层可以作为用常规溅射（PVD）或电化学电镀（ECP）进行孔填充的晶种和成核层。 对于非常高的纵横比孔，通过化学气相沉积（CVD）在SIP铜成核层上沉积铜籽晶层，并且PVD或ECP完成孔填充。 可以通过SIP和高密度等离子体溅射的组合来沉积铜籽晶层。 对于非常窄的孔，CVD铜层可以填充孔。

公开(公告)号：US06579794B1

公开(公告)日：2003-06-17

申请号：US09357126

申请日：1999-07-20

申请人： Seong-tae Oh ,  Kyung-tae Kim ,  Hong-Joo Baek ,  Hun-ki Kim

发明人： Seong-tae Oh ,  Kyung-tae Kim ,  Hong-Joo Baek ,  Hun-ki Kim

IPC分类号： H01L2170

CPC分类号： H01L21/76843 ,  H01L21/28556 ,  H01L21/28568 ,  H01L21/76856 ,  H01L21/76876 ,  H01L2221/1089

摘要： A tungsten layer formation method for a semiconductor device reduces resistivity of the tungsten layer without requiring modification of the conventional manufacturing system. The method includes treating the surface of a barrier metal layer formed over a semiconductor substrate in a pressure environment of over 40 Torr using SiH4 gas; forming a tungsten seed layer on the treated barrier metal layer using WF6 and SiH4 gases, a mixing ratio {WF6}/{SiH4} of the gases being less than or equal to one; and forming a tungsten layer on the treated barrier metal layer using WF6 gas, the treated barrier metal layer having the tungsten seed layer formed thereon.

公开(公告)号：US06565729B2

公开(公告)日：2003-05-20

申请号：US09732513

申请日：2000-12-07

申请人： Linlin Chen ,  Gregory J. Wilson ,  Paul R. McHugh ,  Robert A. Weaver ,  Thomas L. Ritzdorf

发明人： Linlin Chen ,  Gregory J. Wilson ,  Paul R. McHugh ,  Robert A. Weaver ,  Thomas L. Ritzdorf

IPC分类号： C25D2112

CPC分类号： H01L21/76868 ,  C25D3/38 ,  C25D5/08 ,  C25D5/10 ,  C25D5/50 ,  C25D7/123 ,  C25D17/02 ,  C25D17/10 ,  C25D17/12 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76873 ,  H01L21/76877 ,  H01L2221/1089 ,  Y10S204/07 ,  Y10T428/12493

摘要： A process for metallization of a workpiece, such as a semiconductor workpiece. In an embodiment, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent conformal copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.

摘要翻译： 用于对诸如半导体工件的工件进行金属化的工艺。 在一个实施方案中，使用碱性电解铜浴将铜电镀到种子层上，将铜直接电镀到阻挡层材料上，或者使用沉积方法增强已经沉积在阻挡层上的超薄铜籽晶层 作为PVD。 所得到的铜层提供了一种优异的保形铜涂层，其填充工件中的沟槽，通孔和其它微结构。 当用于种子层增强时，所得到的铜种子层提供了优异的共形铜涂层，其允许使用电化学沉积技术使微结构填充具有良好均匀性的铜层。 此外，以所公开的方式电镀的铜层表现出低的薄层电阻，并且在低温下容易退火。

公开(公告)号：US06551872B1

公开(公告)日：2003-04-22

申请号：US09642140

申请日：2000-08-18

申请人： James A. Cunningham

发明人： James A. Cunningham

IPC分类号： H01L218238

CPC分类号： H01L21/76843 ,  H01L21/76849 ,  H01L21/76858 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76886 ,  H01L23/5226 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for making an integrated circuit device includes forming at least one interconnect structure adjacent a substrate by forming at least one barrier layer, forming a doped copper seed layer on the at least one barrier layer, and forming a copper layer on the doped copper seed layer. The method may further include annealing the integrated circuit device after forming the copper layer to diffuse the dopant from the doped copper seed layer into grain boundaries of the copper layer. The doped copper seed layer may include at least one of calcium, cadmium, zinc, neodymium, tellurium, and ytterbium as a dopant to provide the enhanced electromigration resistance. Forming the copper layer may comprise plating the copper layer. In addition, forming the copper layer may comprise forming the copper layer to include at least one of calcium, cadmium, zinc, neodymium, tellurium, and ytterbium as a dopant. In some embodiments, the dopant in the seed layer may be sufficient so that no additional dopant is needed in the copper layer.

摘要翻译： 一种用于制造集成电路器件的方法包括通过形成至少一个阻挡层来形成邻近衬底的至少一个互连结构，在所述至少一个势垒层上形成掺杂铜籽晶层，以及在所述掺杂铜晶种上形成铜层 层。 该方法还可以包括在形成铜层之后对集成电路器件进行退火，以将掺杂剂从掺杂铜籽晶层扩散到铜层的晶界。 掺杂的铜籽晶层可以包括钙，镉，锌，钕，碲和镱中的至少一种作为掺杂剂，以提供增强的电迁移电阻。 形成铜层可以包括电镀铜层。 此外，形成铜层可以包括形成铜层以包括钙，镉，锌，钕，碲和镱中的至少一种作为掺杂剂。 在一些实施例中，种子层中的掺杂剂可能是足够的，使得在铜层中不需要另外的掺杂剂。