APPARATUS AND METHOD FOR PREPARING PARTICULATES
    1.
    发明申请
    APPARATUS AND METHOD FOR PREPARING PARTICULATES 有权
    装置和制备颗粒物的方法

    公开(公告)号:US20090246366A1

    公开(公告)日:2009-10-01

    申请号:US12395958

    申请日:2009-03-02

    IPC分类号: B01J8/38 B05C13/02

    摘要: Disclosed herein is an apparatus for preparing composite particulates, including a rotary body having a bottom surface and a side wall and operative to contain particulates to which an adhering material is to be made to adhere; a centrifugal machine for rotating the rotary body so as to apply centrifugal forces to the particulates in the rotary body; and an inclination varying device operative to vary the inclination of the rotary body to an arbitrary inclination angle in the range from an angle at which the bottom surface of the rotary body forms a horizontal surface perpendicular to the direction of gravity to an angle at which the bottom surface forms a vertical surface parallel to the direction of gravity, and operative to support the rotary body at the arbitrary inclination angle.

    摘要翻译: 本文公开了一种制备复合颗粒的装置,包括具有底表面和侧壁的旋转体,并且可操作地容纳要使粘附材料粘附的微粒; 离心机,用于使旋转体旋转,从而向旋转体内的微粒施加离心力; 以及倾斜变化装置,其可操作以将旋转体的倾斜度在从旋转体的底面形成与重力方向垂直的水平面的角度到任意倾斜角的范围内变化到 底面形成平行于重力方向的垂直表面,并以可任意倾斜的角度支撑旋转体。

    Method for manufacturing a semiconductor device utilizing self-aligned
oxide-nitride masking
    3.
    发明授权
    Method for manufacturing a semiconductor device utilizing self-aligned oxide-nitride masking 失效
    利用自对准氧化物氮化物掩模制造半导体器件的方法

    公开(公告)号:US4591398A

    公开(公告)日:1986-05-27

    申请号:US700707

    申请日:1985-01-25

    摘要: The present invention is to provide a method for manufacturing a semiconductor device of high efficiency and high integration density. The method for manufacturing a semiconductor device comprises the steps of forming semiconductive layers (30), (31) and (31') having on the surface thereof a concave portion, forming a nitride layer (35) within the concave portions forming with the nitride layer (35) as a mask an oxide layer (39) on the surface of the semiconductive layer (30), removing said nitride layer (35) and introducing an impurity into the semiconductive layers (31) and (31') with the oxide layer (39) as a mask. In accordance therewith, the elements can be made finer and hence the method of this invention is suitable for manufacturing an IC device high in efficiency and high in integration density.

    摘要翻译: PCT No.PCT / JP84 / 00271 Sec。 371日期1985年1月25日第 102(e)日期1985年1月25日PCT申请日1984年5月25日PCT公布。 公开号WO84 / 04853 日期为1984年12月6日。本发明提供一种高效率,高集成度的半导体器件的制造方法。 半导体器件的制造方法包括以下步骤:在其表面上形成有凹部的半导体层(30),(31)和(31'),在形成氮化物的凹部内形成氮化物层(35) 层(35)作为掩模,在半导体层(30)的表面上形成氧化物层(39),去除所述氮化物层(35),并用氧化物将杂质引入半导体层(31)和(31') 层(39)作为掩模。 因此,可以使元件更细,因此本发明的方法适用于制造高效率和高集成度的IC器件。

    Method for manufacturing a semiconductor device
    4.
    发明授权
    Method for manufacturing a semiconductor device 失效
    半导体器件的制造方法

    公开(公告)号:US4584055A

    公开(公告)日:1986-04-22

    申请号:US717173

    申请日:1985-03-19

    摘要: Utilizing the fact that an isotropic etching rate of a semiconductor layer such as a polycrystalline or amorphous silicon layer depends on a doped amount of an impurity doped into the semiconductor layer, the impurity is doped into a semiconductor layer (26) formed on a substrate (4) so as to have a concentration distribution in its thickness direction. Then, in a region of the semiconductor layer (26) to be selectively removed, an anisotropic etching is carried out such that a portion of high impurity concentration is removed and a portion thereof in the thickness direction is remained. Thereafter, the remained portion is subjected to an isotropic etching to thereby suppress the side etching.

    摘要翻译: PCT No.PCT / JP84 / 00367 Sec。 371日期:1985年3月19日 102(e)1985年3月19日PCT文件1984年7月19日PCT公布。 出版物WO85 / 00695 日期:1985年2月14日。利用诸如多晶或非晶硅层的半导体层的各向同性蚀刻速率取决于掺杂到半导体层中的杂质的掺杂量,将杂质掺杂到半导体层 26)形成在基板(4)上,以便在其厚度方向上具有浓度分布。 然后,在要选择性去除的半导体层(26)的区域中,进行各向异性蚀刻,使得去除高杂质浓度的一部分,并且残留其厚度方向的一部分。 此后,对残留部分进行各向同性蚀刻,从而抑制侧面蚀刻。

    Apparatus and method for preparing composite particulates using vapor deposition
    5.
    发明授权
    Apparatus and method for preparing composite particulates using vapor deposition 有权
    使用气相沉积制备复合颗粒的装置和方法

    公开(公告)号:US08268080B2

    公开(公告)日:2012-09-18

    申请号:US12395958

    申请日:2009-03-02

    摘要: Disclosed herein is an apparatus for preparing composite particulates, including a rotary body having a bottom surface and a side wall and operative to contain particulates to which an adhering material is to be made to adhere; a centrifugal machine for rotating the rotary body so as to apply centrifugal forces to the particulates in the rotary body; and an inclination varying device operative to vary the inclination of the rotary body to an arbitrary inclination angle in the range from an angle at which the bottom surface of the rotary body forms a horizontal surface perpendicular to the direction of gravity to an angle at which the bottom surface forms a vertical surface parallel to the direction of gravity, and operative to support the rotary body at the arbitrary inclination angle.

    摘要翻译: 本文公开了一种制备复合颗粒的装置,包括具有底表面和侧壁的旋转体,并且可操作地容纳要使粘附材料粘附的微粒; 离心机,用于使旋转体旋转,从而向旋转体内的微粒施加离心力; 以及倾斜变化装置,其可操作以将旋转体的倾斜度在从旋转体的底面形成与重力方向垂直的水平面的角度到任意倾斜角的范围内变化到 底面形成平行于重力方向的垂直表面,并以可任意倾斜的角度支撑旋转体。

    APPARATUS AND METHOD FOR PREPARING COMPOSITE PARTICULATES
    6.
    发明申请
    APPARATUS AND METHOD FOR PREPARING COMPOSITE PARTICULATES 有权
    制备复合颗粒的装置和方法

    公开(公告)号:US20100112203A1

    公开(公告)日:2010-05-06

    申请号:US12683575

    申请日:2010-01-07

    IPC分类号: B01J8/38

    摘要: A method of preparing composite materials by (a) containing particulates to which an adhering material is to be made to adhere, in a rotary body having a bottom surface and a side wall; (b) rotating the rotary body so as to apply centrifugal forces to the particulates in the rotary body; and (c) varying the inclination of the rotary body to an arbitrary inclination angle in the range from an angle at which the bottom surface of the rotary body forms a horizontal surface perpendicular to the direction of gravity to an angle at which the bottom surface forms a vertical surface parallel to the direction of gravity, and supporting the rotary body at the arbitrary inclination angle

    摘要翻译: 一种制备复合材料的方法,该方法包括:(a)在具有底表面和侧壁的旋转体中含有要粘附有粘附材料的颗粒; (b)使旋转体旋转以对旋转体中的微粒施加离心力; 和(c)将旋转体的倾斜度从在旋转体的底面形成与重力方向垂直的水平面的角度相对于底面形成的角度的范围内将任意的倾斜角度变化 平行于重力方向的垂直表面,并以任意的倾斜角支撑旋转体

    Apparatus and method for preparing composite particulates
    7.
    发明授权
    Apparatus and method for preparing composite particulates 有权
    制备复合颗粒的装置和方法

    公开(公告)号:US08545934B2

    公开(公告)日:2013-10-01

    申请号:US12683575

    申请日:2010-01-07

    IPC分类号: B05C13/00 B05D7/00

    摘要: A method of preparing composite materials by (a) containing particulates to which an adhering material is to be made to adhere, in a rotary body having a bottom surface and a side wall; (b) rotating the rotary body so as to apply centrifugal forces to the particulates in the rotary body; and (c) varying the inclination of the rotary body to an arbitrary inclination angle in the range from an angle at which the bottom surface of the rotary body forms a horizontal surface perpendicular to the direction of gravity to an angle at which the bottom surface forms a vertical surface parallel to the direction of gravity, and supporting the rotary body at the arbitrary inclination angle.

    摘要翻译: 一种制备复合材料的方法,该方法包括:(a)在具有底表面和侧壁的旋转体中含有要粘附有粘附材料的颗粒; (b)使旋转体旋转以对旋转体中的微粒施加离心力; 和(c)将旋转体的倾斜度从在旋转体的底面形成与重力方向垂直的水平面的角度相对于底面形成的角度的范围内将任意的倾斜角度变化 平行于重力方向的垂直表面,并以任意的倾斜角支撑旋转体。

    Semiconductor device made with a trenching process
    8.
    发明授权
    Semiconductor device made with a trenching process 失效
    半导体器件采用开沟工艺制成

    公开(公告)号:US4980748A

    公开(公告)日:1990-12-25

    申请号:US361554

    申请日:1989-06-05

    摘要: In a semiconductor device having trench-shaped element isolating regions formed in a semiconductor body and also a conductive layer extending on each element isolating region and connected to an impurity diffusion region of the semiconductor body, there is formed an insulator layer region between an extension of the conductive layer and the element isolating region, and the insulator layer region is buried in the surface portion of the semiconductor body. In such construction, the insulation space between the conductive layer and the semiconductor body can be increased while the distance between the element isolating region and the impurity diffusion region can be shortened to consequently diminish the parasitic capacitance between the conductive layer and the semiconductor body, hence attaining a faster operation in the semiconductor device. When the present invention is applied to a bipolar transistor integrated circuit, a superfast operation is ensured due to the reduction of the base-to-collector capacitance.

    Semiconductor device having at least one PN junction and channel stopper
surrounder by a protecture conducting layer
    9.
    发明授权
    Semiconductor device having at least one PN junction and channel stopper surrounder by a protecture conducting layer 失效
    半导体器件通过保护导电层具有至少一个PN结和通道阻挡器环绕器

    公开(公告)号:US4024564A

    公开(公告)日:1977-05-17

    申请号:US604093

    申请日:1975-08-13

    摘要: A semiconductor device is disclosed which has a first semiconductor layer of one conductivity type and low impurity concentration, a second semiconductor region of the opposite conductivity type forming a PN junction with the first semiconductor layer, a third semiconductor region of the first mentioned conductivity type formed in the first semiconductor layer which surrounds the PN junction and forms an LH junction with the first semiconductor layer, a passivating layer covering at least the PN and LH junctions, and a conductive layer extending on the passivating layer covering at least the inner periphery of the third region and connected to the first semiconductor layer through an electric barrier layer.

    摘要翻译: 公开了一种半导体器件,其具有一种导电类型和低杂质浓度的第一半导体层,相反导电类型的第二半导体区域形成与第一半导体层的PN结,形成第一种导电类型的第三半导体区域 在围绕PN结的第一半导体层中,与第一半导体层形成LH结,至少覆盖PN和LH结的钝化层,以及在钝化层上延伸的导电层,至少覆盖第一半导体层的内周边 第三区域,并且通过电阻隔层连接到第一半导体层。

    Bipolar transistor with reduced parasitic capacitance
    10.
    发明授权
    Bipolar transistor with reduced parasitic capacitance 失效
    降低寄生电容的双极晶体管

    公开(公告)号:US4984053A

    公开(公告)日:1991-01-08

    申请号:US175263

    申请日:1988-03-30

    申请人: Akio Kayanuma

    发明人: Akio Kayanuma

    CPC分类号: H01L29/7322

    摘要: A bipolar integrated circuit having a polysilicon contact (26) to a heavily doped graft base region 24g which is spaced from oxide isolation walls 22 by a distance sufficiently small that in operation, the surface portion 37 of the collector region 23 is fully depleted from the graft base region 24g to the oxide isolation 22, so that base-collector capacitance is reduced due to the graft base being smaller than the oxide isolated island and by the absence of capacitance between the sides of the graft base region and the collector, while capacitance between the polysilicon contact 26 and the collector is also decreased by the depleted surface portion 37 of the collector.