公开(公告)号：US07084063B2

公开(公告)日：2006-08-01

申请号：US10742932

申请日：2003-12-23

申请人： Junji Noguchi ,  Shoji Asaka ,  Nobuhiro Konishi ,  Naohumi Ohashi ,  Hiroyuki Maruyama

发明人： Junji Noguchi ,  Shoji Asaka ,  Nobuhiro Konishi ,  Naohumi Ohashi ,  Hiroyuki Maruyama

IPC分类号： H01L21/302

CPC分类号： H01L21/76843 ,  H01L21/02074 ,  H01L21/321 ,  H01L21/3212 ,  H01L21/32136 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76832 ,  H01L21/76838 ,  H01L21/76849 ,  H01L21/76862 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： The copper interconnect formed by the use of a damascene technique is improved in dielectric breakdown strength (reliability). During post-CMP cleaning, alkali cleaning, a deoxidizing process due to hydrogen annealing or the like, and acid cleaning are carried out in this order. After the post-CMP cleaning and before forming an insulation film for a cap film, hydrogen plasma and ammonia plasma processes are carried out on the semiconductor substrate. In this way, a copper-based buried interconnect is formed in an interlayer insulation film structured of an insulation material having a low dielectric constant.

摘要翻译： 通过使用镶嵌技术形成的铜互连在介电击穿强度（可靠性）方面得到改善。 在后CMP清洗中，碱洗，由于氢退火等引起的脱氧处理以及酸清洗依次进行。 在CMP后清洗之后，在形成用于盖膜的绝缘膜之前，在半导体衬底上进行氢等离子体和氨等离子体处理。 以这种方式，在由具有低介电常数的绝缘材料构成的层间绝缘膜中形成铜基掩埋互连。

公开(公告)号：US06723631B2

公开(公告)日：2004-04-20

申请号：US09965220

申请日：2001-09-28

申请人： Junji Noguchi ,  Shoji Asaka ,  Nobuhiro Konishi ,  Naohumi Ohashi ,  Hiroyuki Maruyama

发明人： Junji Noguchi ,  Shoji Asaka ,  Nobuhiro Konishi ,  Naohumi Ohashi ,  Hiroyuki Maruyama

IPC分类号： H01L214763

CPC分类号： H01L21/76843 ,  H01L21/02074 ,  H01L21/321 ,  H01L21/3212 ,  H01L21/32136 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76832 ,  H01L21/76838 ,  H01L21/76849 ,  H01L21/76862 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： The copper interconnect formed by the use of a damascene technique is improved in dielectric breakdown strength (reliability). During post-CMP cleaning, alkali cleaning, a deoxidizing process due to hydrogen annealing or the like, and acid cleaning are carried out in this order. After the post-CMP cleaning and before forming an insulation film for a cap film, hydrogen plasma and ammonia plasma processes are carried out on the semiconductor substrate. In this way, a copper-based buried interconnect is formed in an interlayer insulation film structured of an insulation material having a low dielectric constant.

摘要翻译： 通过使用镶嵌技术形成的铜互连在介电击穿强度（可靠性）方面得到改善。 在后CMP清洗中，碱洗，由于氢退火等引起的脱氧处理和酸清洗按顺序进行。 在CMP后清洗之后，在形成用于盖膜的绝缘膜之前，在半导体衬底上进行氢等离子体和氨等离子体处理。 以这种方式，在由具有低介电常数的绝缘材料构成的层间绝缘膜中形成铜基掩埋互连。

公开(公告)号：US07723849B2

公开(公告)日：2010-05-25

申请号：US11646434

申请日：2006-12-28

申请人： Kazutoshi Ohmori ,  Tsuyoshi Tamaru ,  Naohumi Ohashi ,  Kiyohiko Sato ,  Hiroyuki Maruyama

发明人： Kazutoshi Ohmori ,  Tsuyoshi Tamaru ,  Naohumi Ohashi ,  Kiyohiko Sato ,  Hiroyuki Maruyama

IPC分类号： H01L23/48

CPC分类号： H01L21/76829 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/3185 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76832 ,  H01L21/7684 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device and a manufacturing method thereof are provided for the improvement of the reliability of copper damascene wiring in which a film between wiring layers and a film between via layers are comprised of an SiOC film with low dielectric constant. A film between wiring layers, a film between wiring layers, and a film between via layers are respectively comprised of an SiOC film, and stopper insulating films and a cap insulating film are comprised of a laminated film of an SiCN film A and an SiC film B. By doing so, it becomes possible to reduce the leakage current of the film between wiring layers, the film between wiring layers, and the film between via layers, and also possible to improve the adhesion of the film between wiring layers, the film between wiring layers, and the film between via layers to the stopper insulating films and the cap insulating film.

摘要翻译： 提供一种半导体器件及其制造方法，用于提高布线层之间的膜和通孔层之间的膜由具有低介电常数的SiOC膜构成的铜镶嵌线的可靠性的提高。 布线层之间的膜，布线层之间的膜和通孔层之间的膜分别由SiOC膜构成，并且阻挡绝缘膜和帽绝缘膜由SiCN膜A和SiC膜的层压膜构成 通过这样做，可以减少布线层之间的膜，布线层之间的膜和通孔层之间的膜的漏电流，并且还可以提高布线层之间的膜的粘附性，膜 布线层之间的通孔层与阻挡绝缘膜和帽绝缘膜之间的膜。

公开(公告)号：US07232757B2

公开(公告)日：2007-06-19

申请号：US10811927

申请日：2004-03-30

申请人： Junji Noguchi ,  Naohumi Ohashi ,  Tatsuyuki Saito

发明人： Junji Noguchi ,  Naohumi Ohashi ,  Tatsuyuki Saito

IPC分类号： H01L21/44

CPC分类号： H01L21/0217 ,  H01L21/02063 ,  H01L21/02074 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/3105 ,  H01L21/3185 ,  H01L21/3212 ,  H01L21/67219 ,  H01L21/76808 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76886 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： Cu interconnections embedded in an interconnection slot of a silicon oxide film are formed by polishing using CMP to improve the insulation breakdown resistance of a copper interconnection formed using the Damascene method, and after a post-CMP cleaning step, the surface of the silicon oxide film and Cu interconnections is treated by a reducing plasma (ammonia plasma). Subsequently, a continuous cap film (silicon nitride film) is formed without vacuum break.

摘要翻译： 通过使用CMP的抛光来形成嵌入在氧化硅膜的互连槽中的Cu互连，以提高使用Damascene方法形成的铜互连的绝缘击穿电阻，并且在CMP后的清洗步骤中，氧化硅膜的表面 并且通过还原等离子体（氨等离子体）处理Cu互连。 随后，形成连续的盖膜（氮化硅膜）而没有真空断裂。

公开(公告)号：US20070105369A1

公开(公告)日：2007-05-10

申请号：US11646434

申请日：2006-12-28

申请人： Kazutoshi Ohmori ,  Tsuyoshi Tamaru ,  Naohumi Ohashi ,  Kiyohiko Sato ,  Hiroyuki Maruyama

发明人： Kazutoshi Ohmori ,  Tsuyoshi Tamaru ,  Naohumi Ohashi ,  Kiyohiko Sato ,  Hiroyuki Maruyama

IPC分类号： H01L21/4763

CPC分类号： H01L21/76829 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/3185 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76832 ,  H01L21/7684 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device and a manufacturing method thereof are provided for the improvement of the reliability of copper damascene wiring in which a film between wiring layers and a film between via layers are comprised of an SiOC film with low dielectric constant. A film between wiring layers, a film between wiring layers, and a film between via layers are respectively comprised of an SiOC film, and stopper insulating films and a cap insulating film are comprised of a laminated film of an SiCN film A and an SiC film B. By doing so, it becomes possible to reduce the leakage current of the film between wiring layers, the film between wiring layers, and the film between via layers, and also possible to improve the adhesion of the film between wiring layers, the film between wiring layers, and the film between via layers to the stopper insulating films and the cap insulating film.

摘要翻译： 提供一种半导体器件及其制造方法，用于提高布线层之间的膜和通孔层之间的膜由具有低介电常数的SiOC膜构成的铜镶嵌线的可靠性的提高。 布线层之间的膜，布线层之间的膜和通孔层之间的膜分别由SiOC膜构成，并且阻挡绝缘膜和帽绝缘膜由SiCN膜A和SiC膜的层压膜构成 通过这样做，可以减少布线层之间的膜，布线层之间的膜和通孔层之间的膜的漏电流，并且还可以提高布线层之间的膜的粘附性，膜 布线层之间的通孔层与阻挡绝缘膜和帽绝缘膜之间的膜。

公开(公告)号：US06764950B2

公开(公告)日：2004-07-20

申请号：US09825946

申请日：2001-04-05

申请人： Junji Noguchi ,  Naohumi Ohashi ,  Tatsuyuki Saito

发明人： Junji Noguchi ,  Naohumi Ohashi ,  Tatsuyuki Saito

IPC分类号： H01L2144

CPC分类号： H01L21/0217 ,  H01L21/02063 ,  H01L21/02074 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/3105 ,  H01L21/3185 ,  H01L21/3212 ,  H01L21/67219 ,  H01L21/76808 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76886 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： Cu interconnections embedded in an interconnection slot of a silicon oxide film are formed by polishing using CMP to improve the insulation breakdown resistance of a copper interconnection formed using the Damascene method, and after a post-CMP cleaning step, the surface of the silicon oxide film and Cu interconnections is treated by a reducing plasma (ammonia plasma). Subsequently, a continuous cap film (silicon nitride film) is formed without vacuum break.

摘要翻译： 通过使用CMP的抛光来形成嵌入在氧化硅膜的互连槽中的Cu互连，以提高使用Damascene方法形成的铜互连的绝缘击穿电阻，并且在CMP后的清洗步骤中，氧化硅膜的表面 并且通过还原等离子体（氨等离子体）处理Cu互连。 随后，形成连续的盖膜（氮化硅膜）而没有真空断裂。

公开(公告)号：US06495466B2

公开(公告)日：2002-12-17

申请号：US09823975

申请日：2001-04-03

申请人： Kazusato Hara ,  Keisuke Funatsu ,  Toshinori Imai ,  Junji Noguchi ,  Naohumi Ohashi

发明人： Kazusato Hara ,  Keisuke Funatsu ,  Toshinori Imai ,  Junji Noguchi ,  Naohumi Ohashi

IPC分类号： H01L2100

CPC分类号： H01L21/76873 ,  H01L21/31116 ,  H01L21/76802 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76835 ,  H01L21/7684 ,  H01L21/76841 ,  H01L21/76843 ,  H01L21/76874

摘要： Over a plug, a stopper insulating film made of an organic film is formed, followed by successive formation of an insulating film and a hard mask. In the presence of a patterned resist film, the hard mask is dry etched, whereby an interconnection groove pattern is transferred thereto. By ashing with oxygen plasma, the resist film is removed to form the interconnection-groove-pattern-transferred hard mask. At this time, the organic film constituting the stopper insulating film has been covered with the insulating film. Then, the insulating film, stopper insulating film and hard mask are removed to form the groove pattern of interconnection. Hydrogen annealing may be conducted after formation of the plug, or the stopper insulating film may be formed over the plug via an adhesion layer.

摘要翻译： 在塞子上形成由有机膜制成的阻挡绝缘膜，随后形成绝缘膜和硬掩模。 在图案化抗蚀剂膜的存在下，硬掩模被干蚀刻，由此将互连槽图案转印到其上。 通过用氧等离子体灰化，去除抗蚀剂膜以形成互连凹槽图案转印的硬掩模。 此时，构成阻挡绝缘膜的有机膜被绝缘膜覆盖。 然后，去除绝缘膜，阻挡绝缘膜和硬掩模以形成互连的凹槽图案。 可以在形成塞子之后进行氢退火，或者可以通过粘合层在塞子上形成塞子绝缘膜。

公开(公告)号：US08012871B2

公开(公告)日：2011-09-06

申请号：US12771494

申请日：2010-04-30

申请人： Kazutoshi Ohmori ,  Tsuyoshi Tamaru ,  Naohumi Ohashi ,  Kiyohiko Sato ,  Hiroyuki Maruyama

发明人： Kazutoshi Ohmori ,  Tsuyoshi Tamaru ,  Naohumi Ohashi ,  Kiyohiko Sato ,  Hiroyuki Maruyama

IPC分类号： H01L21/4763

CPC分类号： H01L21/76829 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/3185 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76832 ,  H01L21/7684 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device and a manufacturing method thereof are provided for the improvement of the reliability of copper damascene wiring in which a film between wiring layers and a film between via layers are comprised of an SiOC film with low dielectric constant. A film between wiring layers, a film between wiring layers, and a film between via layers are respectively comprised of an SiOC film, and stopper insulating films and a cap insulating film are comprised of a laminated film of an SiCN film A and an SiC film B. By doing so, it becomes possible to reduce the leakage current of the film between wiring layers, the film between wiring layers, and the film between via layers, and also possible to improve the adhesion of the film between wiring layers, the film between wiring layers, and the film between via layers to the stopper insulating films and the cap insulating film.

摘要翻译： 提供一种半导体器件及其制造方法，用于提高布线层之间的膜和通孔层之间的膜由具有低介电常数的SiOC膜构成的铜镶嵌线的可靠性的提高。 布线层之间的膜，布线层之间的膜和通孔层之间的膜分别由SiOC膜构成，并且阻挡绝缘膜和帽绝缘膜由SiCN膜A和SiC膜的层压膜构成 通过这样做，可以减少布线层之间的膜，布线层之间的膜和通孔层之间的膜的漏电流，并且还可以提高布线层之间的膜的粘附性，膜 布线层之间的通孔层与阻挡绝缘膜和帽绝缘膜之间的膜。

公开(公告)号：US20100210107A1

公开(公告)日：2010-08-19

申请号：US12771494

申请日：2010-04-30

申请人： Kazutoshi Ohmori ,  Tsuyoshi Tamaru ,  Naohumi Ohashi ,  Kiyohiko Sato ,  Hiroyuki Maruyama

发明人： Kazutoshi Ohmori ,  Tsuyoshi Tamaru ,  Naohumi Ohashi ,  Kiyohiko Sato ,  Hiroyuki Maruyama

IPC分类号： H01L21/768

CPC分类号： H01L21/76829 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/3185 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76832 ,  H01L21/7684 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device and a manufacturing method thereof are provided for the improvement of the reliability of copper damascene wiring in which a film between wiring layers and a film between via layers are comprised of an SiOC film with low dielectric constant. A film between wiring layers, a film between wiring layers, and a film between via layers are respectively comprised of an SiOC film, and stopper insulating films and a cap insulating film are comprised of a laminated film of an SiCN film A and an SiC film B. By doing so, it becomes possible to reduce the leakage current of the film between wiring layers, the film between wiring layers, and the film between via layers, and also possible to improve the adhesion of the film between wiring layers, the film between wiring layers, and the film between via layers to the stopper insulating films and the cap insulating film.

摘要翻译： 提供一种半导体器件及其制造方法，用于提高布线层之间的膜和通孔层之间的膜由具有低介电常数的SiOC膜构成的铜镶嵌线的可靠性的提高。 布线层之间的膜，布线层之间的膜和通孔层之间的膜分别由SiOC膜构成，并且阻挡绝缘膜和帽绝缘膜由SiCN膜A和SiC膜的层压膜构成 通过这样做，可以减少布线层之间的膜，布线层之间的膜和通孔层之间的膜的漏电流，并且还可以提高布线层之间的膜的粘附性，膜 布线层之间的通孔层与阻挡绝缘膜和帽绝缘膜之间的膜。

公开(公告)号：US07321171B2

公开(公告)日：2008-01-22

申请号：US10970024

申请日：2004-10-22

申请人： Tatsuyuki Saito ,  Naohumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

发明人： Tatsuyuki Saito ,  Naohumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76849 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28562 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76877 ,  H01L21/76882 ,  H01L21/76883 ,  H01L21/76889 ,  H01L23/53295 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05025 ,  H01L2224/05027 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/13

摘要： A barrier layer and a copper film are successively formed on a silicon oxide film including a groove for wiring in the silicon oxide film and a silicon nitride film, both formed on a semiconductor substrate. Thereafter, the barrier layer and the copper film are removed from outside of the groove for wiring, thereby forming a wiring. Tungsten is selectively or preferentially grown on the wiring to selectively form a tungsten film on the wiring. After the formation of the copper film, a treatment with hydrogen may be performed. After the formation of the wiring, the semiconductor substrate may be cleaned with a cleaning solution capable of removing a foreign matter or a contaminant metal. After the formation of the wiring, a treatment with hydrogen is carried out.

摘要翻译： 在半导体衬底上形成的氧化硅膜上形成有用于配线的沟槽的氧化硅膜和氮化硅膜，依次形成阻挡层和铜膜。 此后，从用于布线的槽的外侧除去阻挡层和铜膜，从而形成布线。 钨选择性地或优先地生长在布线上以在布线上选择性地形成钨膜。 铜膜形成后，可以进行氢处理。 在形成布线之后，可以用能够除去异物或污染金属的清洁溶液来清洁半导体衬底。 形成布线后，进行氢的处理。