公开(公告)号：US20120048595A1

公开(公告)日：2012-03-01

申请号：US13222542

申请日：2011-08-31

申请人： Emi KASHIWAYA ,  Osamu KINDO ,  Noriou SHIMADA

发明人： Emi KASHIWAYA ,  Osamu KINDO ,  Noriou SHIMADA

IPC分类号： H05K1/00

CPC分类号： H05K3/284 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3142 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/97 ,  H01L2223/58 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/181 ,  H05K1/0271 ,  H05K3/0097 ,  H05K3/4015 ,  H05K2203/041 ,  H05K2203/1316 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board of this invention includes a product formation area in which are arranged a plurality of product formation sections on which a semiconductor chip is mounted; a molding area that is provided on an outer circumferential side of the product formation area, and with which a seal portion that covers the semiconductor chips mounted on the product formation sections makes contact; a clamp area that is provided on an outer circumferential side of the molding area, and that is held by a molding die that forms the seal portion; wiring that is provided in the product formation area, and that is electrically connected to the semiconductor chips; a first solid pattern that is provided in the molding area, and in which a plurality of dots are arranged; and a second solid pattern that is provided in the clamp area, and in which a plurality of dots that are larger than the dots of the first solid pattern are arranged.

摘要翻译： 本发明的布线基板包括产品形成区域，在该产品形成区域中布置有安装有半导体芯片的多个产品形成部分; 成形区域，其设置在所述产品形成区域的外周侧，并且覆盖安装在所述产品形成部分上的所述半导体芯片的密封部分与所述成型区域接触; 夹紧区域，设置在成型区域的外周侧，并且由形成密封部的成型模具保持; 设置在产品形成区域中并与半导体芯片电连接的布线; 第一固体图案，其设置在成型区域中，并且其中布置有多个点; 以及设置在所述夹持区域中的第二固体图案，并且其中布置有大于所述第一固体图案的点的多个点。

公开(公告)号：US20110287582A1

公开(公告)日：2011-11-24

申请号：US13104560

申请日：2011-05-10

申请人： Noriou SHIMADA ,  Tomoyuki FUJISHIMA

发明人： Noriou SHIMADA ,  Tomoyuki FUJISHIMA

IPC分类号： H01L21/50 ,  H01L21/56

CPC分类号： H01L21/561 ,  H01L23/3121 ,  H01L23/3135 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00

摘要： A method of funning a semiconductor device includes filling a gap of a semiconductor chip stack while carrying out a first heating process which heats the semiconductor chip stack from upper and lower portions of the semiconductor chip stack.

摘要翻译： 一种半导体器件的制造方法包括在执行从半导体芯片堆叠的上部和下部加热半导体芯片堆叠的第一加热处理期间填充半导体芯片堆叠的间隙。

公开(公告)号：US20050258519A1

公开(公告)日：2005-11-24

申请号：US10921961

申请日：2004-08-20

申请人： Koya Kikuchi ,  Noriou Shimada ,  Keiyo Kusanagi ,  Akihiko Hatasawa ,  Yutaka Kagaya

发明人： Koya Kikuchi ,  Noriou Shimada ,  Keiyo Kusanagi ,  Akihiko Hatasawa ,  Yutaka Kagaya

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/16 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/52

CPC分类号： H01L24/50 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/49572 ,  H01L23/4985 ,  H01L2224/73204 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/351 ,  H01L2924/00

摘要： A semiconductor device includes: an insulating tape having a device hole and a plurality of holes; a plurality of leads formed on one surface of the tape and extending at one end into the device hole and at the other end into the holes; a semiconductor chip having a plurality of electrodes on a main surface thereof, being connected with the leads extending into the device hole; an encapsulant formed of an insulating resin, the leads and a predetermined portion of the tape; bump electrodes provided on one surface of the leads; slits provided in the tape between the encapsulant and the bump electrodes and extending along a column of the bump electrodes; and a warp prevention reinforcement made of an insulating film and formed over the tape; wherein the semiconductor chip and the bump electrodes are connected to one and the same surface side of the leads.

摘要翻译： 半导体器件包括：具有器件孔和多个孔的绝缘带; 多个引线形成在带的一个表面上并且在一端延伸到器件孔中并在另一端延伸到孔中; 在其主表面上具有多个电极的半导体芯片与延伸到器件孔中的引线连接; 由绝缘树脂形成的密封剂，引线和带的预定部分; 设置在引线的一个表面上的凸起电极; 设置在密封剂和凸起电极之间的带中的狭缝，并且沿凸起电极的一列延伸; 以及由绝缘膜制成并形成在所述带上的防扭曲加强件; 其中半导体芯片和凸块电极连接到引线的同一表面侧。

公开(公告)号：US20050200019A1

公开(公告)日：2005-09-15

申请号：US11116209

申请日：2005-04-28

申请人： Chuichi Miyazaki ,  Yukiharu Akiyama ,  Masnori Shibamoto ,  Tomoaki Kudaishi ,  Ichiro Anjoh ,  Kunihiko Nishi ,  Asao Nishimura ,  Hideki Tanaka ,  Ryosuke Kimoto ,  Kunihiro Tsubosaki ,  Akio Hasebe ,  Takehiro Ohnishi ,  Noriou Shimada ,  Shuji Eguchi ,  Hiroshi Koyama ,  Akira Nagai ,  Masahiko Ogino

发明人： Chuichi Miyazaki ,  Yukiharu Akiyama ,  Masnori Shibamoto ,  Tomoaki Kudaishi ,  Ichiro Anjoh ,  Kunihiko Nishi ,  Asao Nishimura ,  Hideki Tanaka ,  Ryosuke Kimoto ,  Kunihiro Tsubosaki ,  Akio Hasebe ,  Takehiro Ohnishi ,  Noriou Shimada ,  Shuji Eguchi ,  Hiroshi Koyama ,  Akira Nagai ,  Masahiko Ogino

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/48 ,  H01L21/44

CPC分类号： H01L24/50 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49572 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/50 ,  H01L2224/85951 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599

摘要： A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.

摘要翻译： 半导体器件包括形成有连接端子的半导体芯片，插入在芯片的主表面之间的弹性结构和形成有连接到连接端子的布线的布线基板，以及连接到连接端子的另一端的凸起电极 布线。 连接端子可以在芯片主表面的中心部分或周边部分，并且弹性结构和布线基板都不设置在连接端子的位置处。 树脂体至少密封连接端子和暴露的布线的第一端（引线）。 在连接端子位于芯片主表面的周边部分的方案中，布线基板突出超过布置有连接端子的芯片边界，并且树脂体形状被布线基板的突出部分限制 。

公开(公告)号：US08878070B2

公开(公告)日：2014-11-04

申请号：US13222542

申请日：2011-08-31

申请人： Emi Kashiwaya ,  Osamu Kindo ,  Noriou Shimada

发明人： Emi Kashiwaya ,  Osamu Kindo ,  Noriou Shimada

IPC分类号： H05K1/00 ,  H01L23/31 ,  H01L21/56 ,  H05K3/00 ,  H05K3/28 ,  H01L23/00 ,  H05K1/02 ,  H05K3/40 ,  H01L23/498

CPC分类号： H05K3/284 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3142 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/97 ,  H01L2223/58 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/181 ,  H05K1/0271 ,  H05K3/0097 ,  H05K3/4015 ,  H05K2203/041 ,  H05K2203/1316 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board of this invention includes a product formation area in which are arranged a plurality of product formation sections on which a semiconductor chip is mounted; a molding area that is provided on an outer circumferential side of the product formation area, and with which a seal portion that covers the semiconductor chips mounted on the product formation sections makes contact; a clamp area that is provided on an outer circumferential side of the molding area, and that is held by a molding die that forms the seal portion; wiring that is provided in the product formation area, and that is electrically connected to the semiconductor chips; a first solid pattern that is provided in the molding area, and in which a plurality of dots are arranged; and a second solid pattern that is provided in the clamp area, and in which a plurality of dots that are larger than the dots of the first solid pattern are arranged.

摘要翻译： 本发明的布线基板包括产品形成区域，在该产品形成区域中布置有安装有半导体芯片的多个产品形成部分; 成形区域，其设置在所述产品形成区域的外周侧，并且覆盖安装在所述产品形成部分上的所述半导体芯片的密封部分与所述成型区域接触; 夹紧区域，设置在成型区域的外周侧，并且由形成密封部的成型模具保持; 设置在产品形成区域中并与半导体芯片电连接的布线; 第一固体图案，其设置在成型区域中，并且其中布置有多个点; 以及设置在所述夹持区域中的第二固体图案，并且其中布置有大于所述第一固体图案的点的多个点。

公开(公告)号：US20080199979A1

公开(公告)日：2008-08-21

申请号：US12104774

申请日：2008-04-17

申请人： Koya KIKUCHI ,  Noriou Shimada ,  Keiyo Kusanagi ,  Akihiko Hatasawa ,  Yutaka Kagaya

发明人： Koya KIKUCHI ,  Noriou Shimada ,  Keiyo Kusanagi ,  Akihiko Hatasawa ,  Yutaka Kagaya

IPC分类号： H01L21/66

CPC分类号： H01L24/50 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/49572 ,  H01L23/4985 ,  H01L24/86 ,  H01L2224/73204 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/351 ,  H01L2924/00

摘要： Method of manufacturing a semiconductor device, including: preparing a TAB tape featuring an insulating tape having a device hole and a plurality of holes, a plurality of leads formed on a surface of the tape and extending at one end into the device hole and at the other end into the holes, slits provided inside arrangements of columns of holes, and a warp prevention reinforcement insulating film to hold the leads between it and the tape; connecting front ends of the leads to the electrodes of the chip; forming an encapsulant to enclose the chip, the leads and a portion of the tape; forming thick bump electrodes on that surface side of the leads running through the holes to which the semiconductor chip is connected; performing an electric characteristic test, using the bump electrodes as measuring terminals; and cutting the TAB tape to a predetermined shape.

摘要翻译： 一种制造半导体器件的方法，包括：制备具有绝缘带的TAB带，该绝缘带具有器件孔和多个孔，多个引线形成在带的表面上并且在一端延伸到器件孔中 设置在孔的内部布置中的狭缝，以及将引线保持在带之间的防翘曲加强绝缘膜; 将引线的前端连接到芯片的电极; 形成密封剂以包围芯片，引线和磁带的一部分; 在穿过与半导体芯片连接的孔的引线的表面侧上形成厚的凸起电极; 使用凸块电极作为测量端子进行电特性测试; 并将TAB带切割成预定的形状。

公开(公告)号：US06639323B2

公开(公告)日：2003-10-28

申请号：US09983286

申请日：2001-10-23

申请人： Yukiharu Akiyama ,  Tomoaki Kudaishi ,  Takehiro Ohnishi ,  Noriou Shimada ,  Shuji Eguchi ,  Asao Nishimura ,  Ichiro Anjo ,  Kunihiro Tsubosaki ,  Chuichi Miyazaki ,  Hiroshi Koyama ,  Masanori Shibamoto ,  Akira Nagai ,  Masahiko Ogino

发明人： Yukiharu Akiyama ,  Tomoaki Kudaishi ,  Takehiro Ohnishi ,  Noriou Shimada ,  Shuji Eguchi ,  Asao Nishimura ,  Ichiro Anjo ,  Kunihiro Tsubosaki ,  Chuichi Miyazaki ,  Hiroshi Koyama ,  Masanori Shibamoto ,  Akira Nagai ,  Masahiko Ogino

IPC分类号： H01L2348

CPC分类号： H01L24/50 ,  H01L23/3114 ,  H01L23/49572 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/1433 ,  H01L2924/3025

摘要： A semiconductor device including a semiconductor chip having connection terminals in a peripheral part of a main surface thereof; an elastic body disposed on the main surface leaving the connection terminals exposed; an insulating tape formed on the elastic body and having openings in areas where the connection terminals are situated; plural leads formed on the top surface of the insulating tape, one end of each lead being connected to one of the connection terminals and the other end being disposed on the elastic body; plural bump electrodes formed on the other ends of the plural leads; and a resin body for sealing the connection terminals and one end of each of the leads, wherein the insulating tape protrudes beyond the chip where the plural connection terminals are arranged, and wherein the shape of the resin body is restricted by the protruding part of the insulating tape.

公开(公告)号：US07372130B2

公开(公告)日：2008-05-13

申请号：US10921961

申请日：2004-08-20

申请人： Koya Kikuchi ,  Noriou Shimada ,  Keiyo Kusanagi ,  Akihiko Hatasawa ,  Yutaka Kagaya

发明人： Koya Kikuchi ,  Noriou Shimada ,  Keiyo Kusanagi ,  Akihiko Hatasawa ,  Yutaka Kagaya

IPC分类号： H01L23/495

CPC分类号： H01L24/50 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/49572 ,  H01L23/4985 ,  H01L2224/73204 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/351 ,  H01L2924/00

摘要： A semiconductor device includes: an insulating tape having a device hole and a plurality of holes; a plurality of leads formed on one surface of the tape and extending at one end into the device hole and at the other end into the holes; a semiconductor chip having a plurality of electrodes on a main surface thereof, being connected with the leads extending into the device hole; an encapsulant formed of an insulating resin, the leads and a predetermined portion of the tape; bump electrodes provided on one surface of the leads; slits provided in the tape between the encapsulant and the bump electrodes and extending along a column of the bump electrodes; and a warp prevention reinforcement made of an insulating film and formed over the tape; wherein the semiconductor chip and the bump electrodes are connected to one and the same surface side of the leads.

摘要翻译： 半导体器件包括：具有器件孔和多个孔的绝缘带; 多个引线形成在带的一个表面上并且在一端延伸到器件孔中并在另一端延伸到孔中; 在其主表面上具有多个电极的半导体芯片与延伸到器件孔中的引线连接; 由绝缘树脂形成的密封剂，引线和带的预定部分; 设置在引线的一个表面上的凸起电极; 设置在密封剂和凸起电极之间的带中的狭缝，并且沿凸起电极的一列延伸; 以及由绝缘膜制成并形成在所述带上的防扭曲加强件; 其中半导体芯片和凸块电极连接到引线的同一表面侧。

公开(公告)号：US07091620B2

公开(公告)日：2006-08-15

申请号：US11116209

申请日：2005-04-28

申请人： Chuichi Miyazaki ,  Yukiharu Akiyama ,  Masnori Shibamoto ,  Tomoaki Kudaishi ,  Ichiro Anjoh ,  Kunihiko Nishi ,  Asao Nishimura ,  Hideki Tanaka ,  Ryosuke Kimoto ,  Kunihiro Tsubosaki ,  Akio Hasebe ,  Takehiro Ohnishi ,  Noriou Shimada ,  Shuji Eguchi ,  Hiroshi Koyama ,  Akira Nagai ,  Masahiko Ogino

发明人： Chuichi Miyazaki ,  Yukiharu Akiyama ,  Masnori Shibamoto ,  Tomoaki Kudaishi ,  Ichiro Anjoh ,  Kunihiko Nishi ,  Asao Nishimura ,  Hideki Tanaka ,  Ryosuke Kimoto ,  Kunihiro Tsubosaki ,  Akio Hasebe ,  Takehiro Ohnishi ,  Noriou Shimada ,  Shuji Eguchi ,  Hiroshi Koyama ,  Akira Nagai ,  Masahiko Ogino

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/50 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49572 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/50 ,  H01L2224/85951 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599

摘要： A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.

公开(公告)号：US06515371B2

公开(公告)日：2003-02-04

申请号：US09983177

申请日：2001-10-23

申请人： Yukiharu Akiyama ,  Tomoaki Kudaishi ,  Takehiro Ohnishi ,  Noriou Shimada ,  Shuji Eguchi ,  Asao Nishimura ,  Ichiro Anjo ,  Kunihiro Tsubosaki ,  Chuichi Miyazaki ,  Hiroshi Koyama ,  Masanori Shibamoto ,  Akira Nagai ,  Masahiko Ogino

发明人： Yukiharu Akiyama ,  Tomoaki Kudaishi ,  Takehiro Ohnishi ,  Noriou Shimada ,  Shuji Eguchi ,  Asao Nishimura ,  Ichiro Anjo ,  Kunihiro Tsubosaki ,  Chuichi Miyazaki ,  Hiroshi Koyama ,  Masanori Shibamoto ,  Akira Nagai ,  Masahiko Ogino

IPC分类号： H01L2348

CPC分类号： H01L24/50 ,  H01L23/3114 ,  H01L23/49572 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/1433 ,  H01L2924/3025

摘要： A semiconductor device including a semiconductor chip having connection terminals in a peripheral part of a main surface thereof; an elastic body disposed on the main surface leaving the connection terminals exposed; an insulating tape formed on the elastic body and having openings in areas where the connection terminals are situated; plural leads formed on the top surface of the insulating tape, one end of each lead being connected to one of the connection terminals and the other end being disposed on the elastic body; plural bump electrodes formed on the other ends of the plural leads; and a resin body for sealing the connection terminals and one end of each of the leads, wherein the insulating tape protrudes beyond the chip where the plural connection terminals are arranged, and wherein the shape of the resin body is restricted by the protruding part of the insulating tape.

摘要翻译： 一种半导体器件，包括在其主表面的周边部分中具有连接端子的半导体芯片; 设置在主表面上的弹性体，使连接端子露出; 绝缘带，形成在弹性体上并且在连接端子所在的区域中具有开口; 多个引线形成在绝缘带的顶表面上，每个引线的一端连接到一个连接端子，另一端设置在弹性体上; 形成在多个引线的另一端上的多个凸起电极; 以及用于密封连接端子和每个引线的一端的树脂体，其中绝缘带突出超过设置有多个连接端子的芯片，并且其中树脂体的形状受到 绝缘胶带