Test interposer having active circuit component and method therefor
    1.
    发明授权
    Test interposer having active circuit component and method therefor 有权
    具有有源电路部件的测试插入器及其方法

    公开(公告)号:US07808258B2

    公开(公告)日:2010-10-05

    申请号:US12146552

    申请日:2008-06-26

    CPC classification number: G01R31/2889 G01R1/0408

    Abstract: A device under test (DUT) is tested via a test interposer. The test interposer includes a first set of contacts at a first surface to interface with the contacts of a load board or other interface of an automated test equipment (ATE) and a second set of contacts at an opposing second surface to interface with the contacts of the DUT. The second set of contacts can have a smaller contact pitch than the contact pitch of the first set of contacts to facilitate connection to the smaller pitch of the contacts of the DUT. The test interposer further includes one or more active circuit components or passive circuit components to facilitate testing of the DUT. The test interposer can be implemented as an integrated circuit (IC) package that encapsulates the circuit components.

    Abstract translation: 被测设备(DUT)通过测试插件进行测试。 测试插件包括在第一表面处的第一组触点,以与负载板的触点或自动测试设备(ATE)的其他接口相接触,并且在相对的第二表面处与第二组触点相接触,以与 被测件。 第二组触点可以具有比第一组触点的接触间距更小的接触间距,以便于连接到DUT的触点的较小间距。 测试插入器还包括一个或多个有源电路组件或无源电路组件以便于DUT的测试。 测试插件可以实现为封装电路组件的集成电路(IC)封装。

    SCHMITT TRIGGER HAVING VARIABLE HYSTERESIS AND METHOD THEREFOR
    2.
    发明申请
    SCHMITT TRIGGER HAVING VARIABLE HYSTERESIS AND METHOD THEREFOR 审中-公开
    具有可变HYSTERESIS及其方法的SCHMITT触发器

    公开(公告)号:US20090237135A1

    公开(公告)日:2009-09-24

    申请号:US12053005

    申请日:2008-03-21

    CPC classification number: H03K3/3565 H03K2217/0018

    Abstract: A Schmitt trigger has a first inverter, a second inverter, a bias means, and a transistor. The inverter has an input and an output. The second inverter has an input coupled to the output of the first inverter and has an output. The bias means provides a first bias voltage on a first output terminal. A magnitude of the bias voltage is selectable by a first input signal. The transistor has a first current electrode coupled to a first power supply terminal, a control electrode coupled to the output of the second inverter, a second current electrode coupled to the output of the first inverter, and a body coupled to the first output terminal. Selectability of the magnitude of the bias voltage provides selectability of the hysteresis of the Schmitt trigger.

    Abstract translation: 施密特触发器具有第一反相器,第二反相器,偏置装置和晶体管。 变频器有一个输入和一个输出。 第二反相器具有耦合到第一反相器的输出并具有输出的输入。 偏置装置在第一输出端上提供第一偏置电压。 偏置电压的大小由第一输入信号选择。 晶体管具有耦合到第一电源端子的第一电流电极,耦合到第二反相器的输出的控制电极,耦合到第一反相器的输出的第二电流电极和耦合到第一输出端子的主体。 偏置电压大小的可选性提供了施密特触发器的滞后的可选性。

    Preparation of articles of manufacture from isotropic and anisotropic
polyamide anion solutions
    4.
    发明授权
    Preparation of articles of manufacture from isotropic and anisotropic polyamide anion solutions 失效
    从各向同性和各向异性聚酰胺阴离子溶液制备制品

    公开(公告)号:US5084497A

    公开(公告)日:1992-01-28

    申请号:US530363

    申请日:1990-05-30

    CPC classification number: C08J3/097 C08J5/18 C08L77/10 D01F6/605 C08J2377/10

    Abstract: A process for preparing shaped articles of manufacture such as fibers, films and coatings from aromatic polyamide anions in liquid sulfoxides; anisotropic solutions of aromatic polyamide anions useful for the preparation of shaped articles having anistropic properties; isotropic solutions comprising the potassium salt of the polyamide anion; and methods for regulating solution viscosity by control of the degree to which the aromatic polyamide anions are deprotonated.

    Abstract translation: 一种制备成形制品的方法,例如纤维,薄膜和液体亚砜中芳族聚酰胺阴离子的涂层; 用于制备具有不平整性质的成型制品的芳族聚酰胺阴离子的各向异性溶液; 包含聚酰胺阴离子的钾盐的各向同性溶液; 以及通过控制芳香族聚酰胺阴离子去质子化程度来调节溶液粘度的方法。

    Multiple bandwidth crystal controlled oscillator
    5.
    发明授权
    Multiple bandwidth crystal controlled oscillator 失效
    多带宽晶体振荡器

    公开(公告)号:US4896122A

    公开(公告)日:1990-01-23

    申请号:US380047

    申请日:1989-07-14

    Abstract: A dual bandwidth crystal controlled oscillator is described having a first transconductance amplifier providing sufficient gain to maintain oscillation with an oscillator crystal at a minimum current drain. A second transconductance amplifier is provided which can be selectively coupled to the first transconductance amplifier, thereby augmenting the gain of the first transconductance amplifier to provide the capability for rapid oscillator start-up following battery saver operation. The dual bandwidth crystal controlled oscillator can be utilized in conventional oscillator and frequency synthesizer applications.

    Abstract translation: 描述了双带宽晶体控制振荡器,其具有提供足够增益的第一跨导放大器,以使振荡器晶体保持最小电流消耗的振荡。 提供第二跨导放大器,其可以选择性地耦合到第一跨导放大器,从而增加第一跨导放大器的增益,以提供在节电器操作之后的快速振荡器启动的能力。 双频带晶振控制振荡器可用于常规振荡器和频率合成器应用。

    Paging receiver having selectively protected regions of memory
    6.
    发明授权
    Paging receiver having selectively protected regions of memory 失效
    寻呼接收机具有有选择地保护的存储区域

    公开(公告)号:US4839628A

    公开(公告)日:1989-06-13

    申请号:US141802

    申请日:1988-01-11

    CPC classification number: H04W8/245 G08B3/1066 H04W88/022

    Abstract: A paging receiver includes a nonvolatile memory which is readable for controlling the operation of the paging device and is capable of being partitioned into a plurality of regions. A protect means is also included for allowing modification to a selected region of the nonvolatile memory in response to an unlock signal. In a first embodiment, the unlock signal is externally applied to the paging receiver. In a second embodiment, the unlock signal is generated when a predetermined coded signal stored in the paging receiver matches a received coded signal. In a third embodiment, the protect means further includes a switch means to permit the selected region of memory to be modified while preventing other regions of memory to be modified.

    Abstract translation: 寻呼接收机包括非易失性存储器,该非易失性存储器可读取以用于控制寻呼装置的操作并且能够被划分成多个区域。 还包括用于响应于解锁信号修改非易失性存储器的选定区域的保护装置。 在第一实施例中,解锁信号被外部施加到寻呼接收机。 在第二实施例中,当存储在寻呼接收机中的预定编码信号与接收到的编码信号相匹配时,产生解锁信号。 在第三实施例中,保护装置还包括开关装置,以允许修改所选择的存储器区域,同时防止其他存储器区域被修改。

    Hidden control bits in a control register
    7.
    发明授权
    Hidden control bits in a control register 失效
    控制寄存器中的隐藏控制位

    公开(公告)号:US4771405A

    公开(公告)日:1988-09-13

    申请号:US851993

    申请日:1986-04-14

    CPC classification number: G11C8/18 G11C7/22

    Abstract: First and second unused bits of a multi-bit mapped register are utilized to control a desired function. Each of the bits are capable of assuming first and second stable states. The control function is enabled when the first bit is in the first state and the second bit is in a second state. The function is disabled when the first bit is in the second state and the second bit is in the first state. The function remains unaltered when the first and second bits are each in the same state.

    Abstract translation: 利用多位映射寄存器的第一和第二未使用的位来控制所需的功能。 每个位都能够采取第一和第二稳定状态。 当第一位处于第一状态并且第二位处于第二状态时,控制功能被使能。 当第一个位处于第二个状态,第二个位处于第一个状态时,该功能被禁止。 当第一和第二位各自处于相同状态时,该功能保持不变。

    Phase locked loop having a filter with controlled variable bandwidth
    8.
    发明授权
    Phase locked loop having a filter with controlled variable bandwidth 失效
    锁相环具有带有可变带宽的滤波器

    公开(公告)号:US4771249A

    公开(公告)日:1988-09-13

    申请号:US53653

    申请日:1987-05-26

    CPC classification number: H03L7/107 H03L3/00 H03L7/18 H03L7/0893 H03L7/0898

    Abstract: A phase locked loop (PLL) is provided having a filter with a programmable wide and narrow bandwith. When PLL circuit operation is initiated or when the operational frequency of the PLL is changed by a substantial amount, a phase detector functions to force the filter in a wide bandwith mode to allow fast circuit operation in the transient mode. After the PLL output has settled close to a predetermined frequency, the number of times the output frequency varies above and below the predetermined frequency before reaching a locked state is detected and counted. After the output frequency has varied above and below the predetermined frequency a predetermined number of times, the filter is automatically switched to a low bandwith mode to allow the PLL to operate in a stable manner.

    Abstract translation: 提供了具有可编程宽带窄带滤波器的锁相环(PLL)。 当PLL电路工作开始时,或当PLL的工作频率变化很大时,相位检测器起到强制滤波器处于宽频带模式以允许瞬态模式下的快速电路运行的作用。 在PLL输出稳定在预定频率附近之后,检测并计数在达到锁定状态之前输出频率在预定频率之上变化高于和低于该频率的次数。 在输出频率高于和低于预定频率预定次数之后,滤波器自动切换到低频带模式以允许PLL以稳定的方式操作。

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