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公开(公告)号：US20170179625A1
公开(公告)日：2017-06-22
申请号：US14977555
申请日：2015-12-21
IPC分类号： H01R12/70
CPC分类号： H01R12/585 , H01R12/523 , H01R43/205 , H05K1/00
摘要： Attachment techniques for printed circuit boards (PCBs) are described. According to some such techniques, an array of double-contact connectors may be used to attach first and second PCBs to each other. In various embodiments, each such double-contact connector may comprise respective first and second contact elements that establish and retain physical contact with the inner surfaces of vias in the first and second PCBs. In some embodiments, at least one of the double-contact connectors may provide electrical conductivity between a trace on the first PCB and a trace on the second PCB. In various embodiments, one of the two PCBs may comprise a main PCB, and the other may comprise a patch PCB arranged to relieve routing congestion in a region of the main PCB. Other embodiments are described and claimed.
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公开(公告)号：US20150085458A1
公开(公告)日：2015-03-26
申请号：US14037826
申请日：2013-09-26
申请人： Raul Enriquez Shibayama , Mauro Lai , Richard K. Kunze , Nicholas B. Peterson , Carlos A. Lizalde Moreno , Kai Xiao
发明人： Raul Enriquez Shibayama , Mauro Lai , Richard K. Kunze , Nicholas B. Peterson , Carlos A. Lizalde Moreno , Kai Xiao
CPC分类号： H05K1/0231 , H01L23/49822 , H01L23/49827 , H01L2924/0002 , H05K1/0228 , H05K1/115 , H05K1/116 , H05K1/162 , H05K3/303 , H05K2201/09636 , Y10T29/4913 , H01L2924/00
摘要： Inductive coupling arising between adjacent vias in interconnect technologies (commonly associated with printed circuit boards or package) can be combatted through the addition of metal plates to vias. The plates generate capacitive coupling that can compensate for the inductive crosstalk normally generated between vias in printed circuit boards or packages. When the added plates of two neighboring vias overlap with each other, a capacitive coupling is generated. By balancing the inductive coupling with capacitive coupling, an effective reduction of far end crosstalk may be obtained.
摘要翻译： 通过在通孔中添加金属板，互连技术中相邻通孔之间产生的感应耦合（通常与印刷电路板或封装相关联）可以对抗。 板产生电容耦合，可以补偿印刷电路板或封装中通孔之间通常产生的电感串扰。 当两个相邻通孔的添加板彼此重叠时，产生电容耦合。 通过将电感耦合与电容耦合进行平衡，可以获得远端串扰的有效减少。
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3.发明申请公开(公告)号：US20150130553A1
公开(公告)日：2015-05-14
申请号：US14080013
申请日：2013-11-14
申请人： Raul Enriquez Shibayama , Maria Garcia Garcia de Leon , Kai Xiao , Beom-Taek Lee , Carlos Lizalde Moreno
发明人： Raul Enriquez Shibayama , Maria Garcia Garcia de Leon , Kai Xiao , Beom-Taek Lee , Carlos Lizalde Moreno
CPC分类号： H01P3/026 , H01P5/028 , H04B3/32 , H05K1/0225 , H05K1/0228 , H05K1/0239 , H05K1/0245 , H05K1/117 , H05K2201/09672 , Y10T29/49117
摘要： A circuit component is described herein. The circuit component includes a first signal line to propagate in a first direction and a second signal line to propagate a second direction. The circuit component includes a region to introduce crosstalk within the region that reduces another crosstalk generated at a location remote from the region based on a change in propagation direction of the first signal line and second signal line.
摘要翻译： 这里描述了电路部件。 电路部件包括在第一方向上传播的第一信号线和第二信号线以传播第二方向。 电路部件包括在该区域内引入串扰的区域，其基于第一信号线和第二信号线的传播方向的变化，减少远离该区域的位置产生的另一个串扰。
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公开(公告)号：US20140179162A1
公开(公告)日：2014-06-26
申请号：US13725556
申请日：2012-12-21
CPC分类号： H05K1/0228 , H05K1/0245 , H05K1/0251 , H05K1/162 , H05K2201/09636 , Y10T29/49147
摘要： A method of reducing crosstalk. The method may include forming a first contact over a first vertical conductor. The method may include forming a second contact over a second vertical conductor. The method may include forming a capacitive coupler between the first contact and the second contact, wherein the capacitive coupler is to cancel crosstalk received at the second vertical conductor from the first vertical conductor.
摘要翻译： 减少串扰的方法。 该方法可以包括在第一垂直导体上形成第一接触。 该方法可以包括在第二垂直导体上形成第二接触。 该方法可以包括在第一触点和第二触点之间形成电容耦合器，其中电容耦合器将消除来自第一垂直导体的在第二垂直导体处接收的串扰。
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5.发明申请Method and Apparatus for Far End Crosstalk Reduction in Single Ended Signaling 审中-公开单端信号远端串扰减少的方法与装置公开(公告)号：US20140174812A1
公开(公告)日：2014-06-26
申请号：US13725650
申请日：2012-12-21
IPC分类号： H05K9/00
CPC分类号： H05K9/00 , H05K9/0066
摘要： A method of reducing crosstalk. The method may include forming a first contact over a first vertical conductor. The method may include forming a second contact over a second vertical conductor. The method may include forming a third contact over a third vertical conductor. The method may include forming a capacitive coupler between the first contact, the second contact, and the third contact, wherein the capacitive coupler is to cancel crosstalk received at the second vertical conductor and third vertical conductor from the first vertical conductor.
摘要翻译： 减少串扰的方法。 该方法可以包括在第一垂直导体上形成第一接触。 该方法可以包括在第二垂直导体上形成第二接触。 该方法可以包括在第三垂直导体上形成第三接触。 该方法可以包括在第一触点，第二触点和第三触点之间形成电容耦合器，其中电容耦合器将消除在第二垂直导体和第三垂直导体处从第一垂直导体接收的串扰。
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公开(公告)号：US20170094791A1
公开(公告)日：2017-03-30
申请号：US14866637
申请日：2015-09-25
CPC分类号： H05K1/141 , H05K1/0296 , H05K1/111 , H05K1/115 , H05K1/144 , H05K1/181 , H05K3/222 , H05K3/32 , H05K3/3436 , H05K3/368 , H05K2201/042
摘要： Techniques and mechanisms for facilitating connection between a packaged device and a substrate of another device. In an embodiment, a device—such as a printed circuit board—comprises a substrate and a hardware interface at a first side of the substrate, the hardware interface to couple the device to a package including integrated circuitry. The device is further configured to couple to a bridge device via contacts disposed at a second side of the substrate. An interconnect extends from the hardware interface to one of the contacts at the second side. In another embodiment, coupling the substrate to the bridge device interconnects two of the contacts at the second side to one another via the bridge device, where one or more contacts of the hardware interface (e.g., only a subset of all such contacts) are also interconnected with the bridge device via the second side.
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公开(公告)号：US09589919B2
公开(公告)日：2017-03-07
申请号：US13993334
申请日：2011-12-22
CPC分类号： H01L24/06 , H01L23/49811 , H01L23/49838 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2223/6638 , H01L2224/0401 , H01L2224/12105 , H01L2224/13111 , H01L2224/13116 , H01L2224/16225 , H01L2224/17515 , H01L2224/81815 , H01L2924/01322 , H01L2924/15311 , H05K1/0228 , H05K1/0245 , H05K1/111 , H05K3/3436 , H05K2201/09418 , H05K2201/10189 , H05K2201/10734 , H01L2924/0105 , H01L2924/01082 , H01L2924/01083 , H01L2924/01047 , H01L2924/01029 , H01L2924/00
摘要： The present description relates to the field of fabricating microelectronic devices, wherein a microelectronic device may have a hexagonal confirmation for signal nodes and ground nodes which utilizes the cross-talk reduction by cancellation property of geometrically symmetry and orthogonality to reduce signal node to ground node ratio for increasing signaling density.
摘要翻译： 本发明涉及制造微电子器件的领域，其中微电子器件可以具有用于信号节点和接地节点的六边形确认，其利用通过几何对称和正交性的抵消特性进行串扰降低，以减少信号节点与接地节点的比率 用于增加信号密度。
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公开(公告)号：US20140162498A1
公开(公告)日：2014-06-12
申请号：US13997893
申请日：2012-03-31
申请人： Raul Enriquez-Shibayama , Kai Xiao , Xiang Li
发明人： Raul Enriquez-Shibayama , Kai Xiao , Xiang Li
IPC分类号： H01R13/6461
CPC分类号： H01R13/6461 , H01R12/737 , H01R13/6471 , H01R2201/06
摘要： Apparatus and methods of arranging ground pins and signal pins in a card connector includes arranging a signal pins and ground pins in a card connector into at least six (6) columns divided between a primary side and a secondary side of the connector.
摘要翻译： 将接地引脚和信号引脚布置在卡连接器中的装置和方法包括将卡连接器中的信号引脚和接地引脚布置成分开在连接器的初级侧和次级侧之间的至少六（6）列。
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公开(公告)号：US09787028B2
公开(公告)日：2017-10-10
申请号：US13997893
申请日：2012-03-31
申请人： Raul Enriquez-Shibayama , Kai Xiao , Xiang Li
发明人： Raul Enriquez-Shibayama , Kai Xiao , Xiang Li
IPC分类号： H01R13/6461 , H01R12/73 , H01R13/6471
CPC分类号： H01R13/6461 , H01R12/737 , H01R13/6471 , H01R2201/06
摘要： Apparatus and methods of arranging ground pins and signal pins in a card connector includes arranging a signal pins and ground pins in a card connector into at least six (6) columns divided between a primary side and a secondary side of the connector.
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公开(公告)号：US20150333387A1
公开(公告)日：2015-11-19
申请号：US14278330
申请日：2014-05-15
申请人： KAI XIAO , RAUL ENRIQUEZ SHIBAYAMA , GONG OUYANG
发明人： KAI XIAO , RAUL ENRIQUEZ SHIBAYAMA , GONG OUYANG
CPC分类号： H05K1/0245 , B33Y10/00 , B33Y80/00 , H01P3/02 , H01P3/08 , H01P11/003 , H05K2201/09281 , Y10T29/49156
摘要： A broadside coupled differential design is described herein. The design may include a differential pair. Each trace of the differential pair includes a wide portion and a narrow portion. The wide portion of the first trace of the differential pair is to be aligned with a narrow portion of the second trace of the differential pair. Additionally, the wide portion of the second trace of the differential pair is to be aligned with a narrow portion of the first trace of the differential pair, such that the wide and narrow portions of the traces of the differential pair are staggered.
摘要翻译： 这里描述了宽边耦合差分设计。 该设计可以包括差分对。 差分对的每个迹线包括宽部分和窄部分。 差分对的第一迹线的宽部分将与差分对的第二迹线的窄部分对准。 此外，差分对的第二迹线的宽部分将与差分对的第一迹线的窄部分对齐，使得差分对的迹线的宽和窄部分交错。
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