公开(公告)号：US20220063951A1

公开(公告)日：2022-03-03

申请号：US17411233

申请日：2021-08-25

申请人： Seokhyun Lee ,  Wonha Lee

发明人： SEOKHYUN LEE

IPC分类号： B65H35/00

摘要： Disclosed herein is a strip cutting apparatus for a diagnostic reagent kit that includes first and second shafts, each of which has knives and spacers arranged in such a way that two knives having blades facing each other and one spacer are arranged alternatively, and a guide member mounted to go between the first and second shafts to guide a diagnostic reagent, thereby accurately cutting the diagnostic reagent into strips of an approximately rectangular shape in a diagnostic reagent passing section and removing defect by preventing the strips from being twisted or bent. Since the guide member continuously guides the diagnostic reagent till the strips get out of the shafts, it is prevented that the cut strips are fit between the knives are twisted or deformed, thereby removing defect. Furthermore, adjusting screws are mounted at both ends of the first shaft supported to adjust an interval between the first and second shafts in a longitudinal direction, thereby more accurately adjusting the interval between the first and second shafts to enhance cutting effect of the strips.

公开(公告)号：US11858772B2

公开(公告)日：2024-01-02

申请号：US17411233

申请日：2021-08-25

申请人： Seokhyun Lee ,  Wonha Lee

发明人： Seokhyun Lee

IPC分类号： B65H35/00

CPC分类号： B65H35/0086

摘要： An apparatus for cutting diagnostic reagent strips includes first and second shafts with facing knife blades and spacers. A guide between the shafts ensures accurate, defect-free cutting. Adjusting screws fine-tune the shaft interval for enhanced cutting.

公开(公告)号：US20200091215A1

公开(公告)日：2020-03-19

申请号：US16364237

申请日：2019-03-26

申请人： JAEGWON JANG ,  SEOKHYUN LEE ,  KYOUNG LIM SUK

发明人： JAEGWON JANG ,  SEOKHYUN LEE ,  KYOUNG LIM SUK

IPC分类号： H01L27/146

摘要： A semiconductor package includes a first redistribution layer, a first semiconductor chip on the first redistribution layer, a molding layer covering the first semiconductor chip, metal pillars around the first semiconductor chip and connected to the first redistribution layer, a second redistribution layer on the molding layer and connected to the metal pillars, and a second semiconductor chip on the second redistribution layer. The metal pillars extend through the molding layer. When viewed in plan, the second semiconductor chip overlaps the first semiconductor chip and the metal pillars. A method of manufacturing the semiconductor package obtains a wafer map from a first substrate that includes a plurality of first semiconductor chips and uses the wafer map in selectively stacking second semiconductor chips on the first semiconductor chips.

公开(公告)号：US20150125999A1

公开(公告)日：2015-05-07

申请号：US14471327

申请日：2014-08-28

申请人： Seokhyun LEE ,  Jaegwon JANG ,  Chul-Yong JANG

发明人： Seokhyun LEE ,  Jaegwon JANG ,  Chul-Yong JANG

IPC分类号： H01L21/56 ,  B23K3/06 ,  B23K1/00 ,  B23K1/20 ,  H01L23/00 ,  H01L21/67

CPC分类号： B23K3/0623 ,  B23K1/0016 ,  B23K1/203 ,  H01L21/4853 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/351 ,  H01L2924/37001 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/45099

摘要： Provided are apparatuses configured to attach a solder ball, methods of attaching a solder ball, and methods of fabricating a semiconductor package including the same. An apparatus configured to attach a solder ball includes a chuck configured to receive a package substrate on which solder balls are provided; a shielding mask configured to shield the package substrate and including holes configured to expose the solder balls; and a heater configured to melt the solder balls exposed through the holes.

摘要翻译： 提供了构造成附接焊球的装置，附接焊球的方法，以及制造包括该焊球的半导体封装的方法。 构造成附接焊球的装置包括：卡盘，其配置成接收其上设置有焊球的封装基板; 屏蔽掩模，被配置为屏蔽所述封装基板并且包括被配置为暴露所述焊球的孔; 以及被配置为熔化通过孔暴露的焊球的加热器。

公开(公告)号：US11904492B2

公开(公告)日：2024-02-20

申请号：US17792188

申请日：2021-05-27

申请人： Seokhyun Lee ,  Wonha Lee

发明人： Seok Hyun Lee

IPC分类号： B26D7/26 ,  B26D1/24

CPC分类号： B26D7/2635 ,  B26D1/245

摘要： The present invention is configured such that an adjustment nut for fixing spacers and blades repeatedly fitted to a shaft is provided with at least two concentricity adjustment screws, and, with the spacers and the blades fixed by the adjustment nut, the spacers and the blades are pushed by the concentricity adjustment screws in the direction of the shaft to enable concentricity adjustment, and thus, without causing defects, the blades are protected and can be used for a long time. In particular, according to the present invention, while one side shaft with respect to a diagnostic sheet is elastically supported, position adjustment in the longitudinal direction thereof is possible, and also projections are formed on the peripheries of the surfaces of the spacers facing the cutting edges of the blades thus to provide extra spaces for the blades in which the blades move, thereby preventing the deformation of cut strips and the damages on the blades.

公开(公告)号：US09343437B2

公开(公告)日：2016-05-17

申请号：US14680094

申请日：2015-04-07

申请人： Ae-nee Jang ,  Jin-Woo Park ,  Seokhyun Lee ,  Jongho Lee

发明人： Ae-nee Jang ,  Jin-Woo Park ,  Seokhyun Lee ,  Jongho Lee

IPC分类号： H01L23/10 ,  H01L25/065 ,  H01L23/373 ,  H01L23/367 ,  H01L23/528 ,  H01L23/31

CPC分类号： H01L25/0657 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/3735 ,  H01L23/3736 ,  H01L23/42 ,  H01L23/49816 ,  H01L23/528 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06575 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： Semiconductor package devices and methods of forming the semiconductor package devices are provided. The semiconductor package devices may include a lower package including a lower semiconductor chip on a lower substrate, an upper package including an upper semiconductor chip on an upper substrate. The upper substrate may include a protruding part corresponding to the lower semiconductor chip and a connection part that has a bottom surface lower than a bottom surface of the protruding part and is disposed around the protruding part. The semiconductor package devices may also include a heat dissipation part in a space between the lower semiconductor chip and the protruding part on the upper substrate and a package connection pattern electrically connecting the lower package to the upper package.

摘要翻译： 提供半导体封装器件和形成半导体封装器件的方法。 半导体封装器件可以包括下封装，其包括在下基板上的下半导体芯片，在上基板上包括上半导体芯片的上封装。 上基板可以包括对应于下半导体芯片的突出部分和具有低于突出部分的底表面的底表面并且布置在突出部分周围的连接部分。 半导体封装器件还可以包括在下半导体芯片和上基板上的突出部分之间的空间中的散热部分和将下封装电连接到上封装的封装连接图案。

公开(公告)号：US20160005714A1

公开(公告)日：2016-01-07

申请号：US14682113

申请日：2015-04-09

申请人： SEOKHYUN LEE ,  Chul-Yong JANG ,  JONGHO LEE

发明人： SEOKHYUN LEE ,  Chul-Yong JANG ,  JONGHO LEE

IPC分类号： H01L25/065 ,  H01L21/56 ,  H01L23/367 ,  H01L23/31 ,  H01L23/498 ,  H01L25/00 ,  H01L23/00

CPC分类号： H01L25/0652 ,  H01L21/565 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/367 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/06135 ,  H01L2224/131 ,  H01L2224/16113 ,  H01L2224/16227 ,  H01L2224/29036 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014

摘要： Provided are a semiconductor package and a method of fabricating the same. The semiconductor package includes a first package having a first package substrate mounted with a lower semiconductor chip, and a second package having a second package substrate mounted with upper semiconductor chips. The second package substrate includes a chip region on which the upper semiconductor chips are mounted, and a connection region provided therearound. The chip region includes a first surface defining a first recess region and a second surface defining a first protruding portion. The upper semiconductor chips are mounted on opposite edges of the second surface and spaced apart from each other to have portions protruding toward the connection region beyond the chip region.

摘要翻译： 提供半导体封装及其制造方法。 半导体封装包括具有安装有下半导体芯片的第一封装衬底的第一封装和具有安装有上半导体芯片的第二封装衬底的第二封装。 第二封装衬底包括其上安装有上半导体芯片的芯片区域和设置在其周围的连接区域。 芯片区域包括限定第一凹陷区域的第一表面和限定第一突出部分的第二表面。 上半导体芯片安装在第二表面的相对边缘上并且彼此间隔开以具有朝向芯片区域之外的连接区域突出的部分。

公开(公告)号：US20150318266A1

公开(公告)日：2015-11-05

申请号：US14680094

申请日：2015-04-07

申请人： Ae-nee Jang ,  Jin-Woo Park ,  Seokhyun Lee ,  Jongho Lee

发明人： Ae-nee Jang ,  Jin-Woo Park ,  Seokhyun Lee ,  Jongho Lee

IPC分类号： H01L25/065 ,  H01L23/31 ,  H01L23/528 ,  H01L23/373 ,  H01L23/367

CPC分类号： H01L25/0657 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/3735 ,  H01L23/3736 ,  H01L23/42 ,  H01L23/49816 ,  H01L23/528 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06575 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： Semiconductor package devices and methods of forming the semiconductor package devices are provided. The semiconductor package devices may include a lower package including a lower semiconductor chip on a lower substrate, an upper package including an upper semiconductor chip on an upper substrate. The upper substrate may include a protruding part corresponding to the lower semiconductor chip and a connection part that has a bottom surface lower than a bottom surface of the protruding part and is disposed around the protruding part. The semiconductor package devices may also include a heat dissipation part in a space between the lower semiconductor chip and the protruding part on the upper substrate and a package connection pattern electrically connecting the lower package to the upper package.

摘要翻译： 提供半导体封装器件和形成半导体封装器件的方法。 半导体封装器件可以包括下封装，其包括在下基板上的下半导体芯片，在上基板上包括上半导体芯片的上封装。 上基板可以包括对应于下半导体芯片的突出部分和具有低于突出部分的底表面的底表面并且布置在突出部分周围的连接部分。 半导体封装器件还可以包括在下半导体芯片和上基板上的突出部分之间的空间中的散热部分和将下封装电连接到上封装的封装连接图案。

公开(公告)号：US20130295725A1

公开(公告)日：2013-11-07

申请号：US13651453

申请日：2012-10-14

申请人： Jin-Woo PARK ,  Seokhyun LEE

发明人： Jin-Woo PARK ,  Seokhyun LEE

IPC分类号： H01L21/56

CPC分类号： H01L24/19 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05611 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2224/92144 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2224/19 ,  H01L2924/00

摘要： The inventive concept provides semiconductor packages and methods of forming the same. The semiconductor package includes a buffer layer covering at least one sidewall of the semiconductor chip. The buffer layer is covered by a molding layer. Thus, reliability of the semiconductor package may be improved.

摘要翻译： 本发明构思提供半导体封装及其形成方法。 半导体封装包括覆盖半导体芯片的至少一个侧壁的缓冲层。 缓冲层被模制层覆盖。 因此，可以提高半导体封装的可靠性。

公开(公告)号：US20110150606A1

公开(公告)日：2011-06-23

申请号：US12965975

申请日：2010-12-13

申请人： Tae-Eog Lee ,  Kook-Jin Choi ,  Seokhyun Lee ,  JungHoon Kim ,  HyunJung Kim

发明人： Tae-Eog Lee ,  Kook-Jin Choi ,  Seokhyun Lee ,  JungHoon Kim ,  HyunJung Kim

IPC分类号： B63B27/14

CPC分类号： B65G63/006

摘要： A quay-wall system for loading and unloading containers includes a quay-wall having a open-air storage yard, a floating body berthed to the quay-wall and resting a ramp on the quay-wall, a pallet formed for receiving one or more containers, and a transporting device transporting the plurality of pallets in parallel. A mobile harbor for use in the quay-wall system includes the ramp, a loading space in which one or more pallets having one or more containers accommodated therein can be placed, wherein the loading space has guide grooves formed thereon for guiding a transporting device. A transporting device for use in the quay-wall system includes a transporting device for being coupled a plurality of pallets in parallel and transporting the pallets from the open-air storage yard to a floating body or from the floating body to the open-air storage yard.

摘要翻译： 用于装载和卸载集装箱的码头壁系统包括具有露天存放场地的码头壁，悬挂在码头壁上的浮体和在码头壁上搁置斜坡的托板，形成用于接收一个或多个 容器，以及并行地输送多个托板的输送装置。 用于码头壁系统的移动港口包括斜坡，其中可以放置容纳有一个或多个容器的一个或多个托盘的装载空间，其中装载空间具有形成在其上的引导槽，用于引导传送装置。 用于码头壁系统的运送装置包括：运送装置，用于将多个托盘平行地联接并将托盘从露天储存场地运送到浮体或从浮体运送到露天存储器 码。