公开(公告)号：US10573550B2

公开(公告)日：2020-02-25

申请号：US16079215

申请日：2017-03-03

申请人： SUNEDISON SEMICONDUCTOR LIMITED

发明人： Sasha Joseph Kweskin

IPC分类号： H01L21/02 ,  H01L21/762 ,  H01L21/324 ,  H01L27/12

摘要： A method is provided for preparing a semiconductor-on-insulator structure comprising a silicon oxynitride layer having a gradient oxygen concentration.

公开(公告)号：US10573517B2

公开(公告)日：2020-02-25

申请号：US15764370

申请日：2016-09-28

申请人： SunEdison Semiconductor Limited (UEN201334164H) ,  The Board of Trustees of the University of Illinois

发明人： Vikas Berry ,  Sanjay Behura ,  Phong Nguyen ,  Michael R. Seacrist

IPC分类号： C01B32/184 ,  C30B25/18 ,  C30B29/02 ,  H01L21/02 ,  H01L29/16

摘要： A method for depositing a layer of graphene directly on the surface of a substrate, such as a semiconductor substrate is provided. Due to the strong adhesion of graphene and cobalt to a semiconductor substrate, the layer of graphene is epitaxially deposited.

公开(公告)号：US10529616B2

公开(公告)日：2020-01-07

申请号：US15775924

申请日：2016-11-15

申请人： SUNEDISON SEMICONDUCTOR LIMITED ,  Charles R. Lottes

发明人： Gang Wang ,  Charles R. Lottes ,  Sasha Kweskin

IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L21/02 ,  H01L27/146

摘要： A method is provided for preparing semiconductor structure, e.g., a semiconductor on insulator structure, comprising a device layer having a smooth surface. The method provided involves smoothing a semiconductor substrate surface by making use of stress enhanced surface diffusion at elevated temperatures. The purpose of this method is to reach atomic scale surface smoothness (for example, smoothness in the range of between 1.0 and 1.5 angstroms as measured according to root mean square over a 30 um×30 um AFM measurement), which is required in advanced (sub 28 nm) CMOS device fabrication.

公开(公告)号：US10475695B2

公开(公告)日：2019-11-12

申请号：US15899636

申请日：2018-02-20

申请人： SunEdison Semiconductor Limited (UEN201334164H)

发明人： Igor Peidous ,  Jeffrey L. Libbert

IPC分类号： H01L21/762 ,  H01L21/304 ,  H01L21/02 ,  H01L21/761 ,  H01L29/06 ,  H01L21/322 ,  H01L21/265

摘要： A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.

公开(公告)号：US20190267251A1

公开(公告)日：2019-08-29

申请号：US16407266

申请日：2019-05-09

申请人： SunEdison Semiconductor Limited (UEN201334164H)

发明人： Young Jung Lee ,  Jae-Woo Ryu ,  Byung Chun Kim ,  Robert J. Falster ,  Soon Sung Park ,  Tae Hoon Kim ,  Jun Hwan Ji ,  Carissima Marie Hudson

IPC分类号： H01L21/322 ,  H01L21/324 ,  H01L21/00 ,  C30B33/00 ,  H01L29/36 ,  C30B29/06 ,  C30B33/08 ,  C30B33/02

摘要： The disclosure is directed to a method to recover the gate oxide integrity yield of a silicon wafer after rapid thermal anneal in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2. Generally, rapid thermal anneals in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2 to thereby imprint an oxygen precipitate profile can degrade the GOI yield of a silicon wafer by exposing as-grown crystal defects (oxygen precipitate) and vacancies generated by the silicon nitride film. The present invention restores GOI yield by stripping the silicon nitride layer, which is followed by wafer oxidation, which is followed by stripping the silicon oxide layer.

公开(公告)号：US20190181036A9

公开(公告)日：2019-06-13

申请号：US15574009

申请日：2016-05-18

申请人： SunEdison Semiconductor Limited

发明人： Gang Wang ,  Shawn George Thomas

IPC分类号： H01L21/762 ,  H01L21/02 ,  H01L21/3065

CPC分类号： H01L21/76256 ,  H01L21/0242 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02499 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/02694 ,  H01L21/3065 ,  H01L21/76251

摘要： The disclosed method is suitable for producing a SiGe-on-insulator structure. According to some embodiments of the method, a layer comprising SiGe is deposited on silicon-on-insulator substrate comprising an ultra-thin silicon top layer. In some embodiments, the layer comprising SiGe is deposited by epitaxial deposition. In some embodiments, the SiGe epitaxial layer is high quality since it is produced by engineering the strain relaxation at the Si/buried oxide interface. In some embodiments, the method accomplishes elastic strain relaxation of SiGe grown on a few monolayer thick Si layer that is weakly bonded to the underline oxide.

公开(公告)号：US10273596B2

公开(公告)日：2019-04-30

申请号：US15753428

申请日：2016-08-18

申请人： SUNEDISON SEMICONDUCTOR LIMITED ,  DAEVAC INTERNATIONAL CO., LTD.

发明人： Seok Min Yun ,  Seong Su Park ,  Jun Hwan Ji ,  Won-Jin Choi ,  UiSung Jung ,  Young Jung Lee ,  Tae Su Koo ,  Sung-Jin Kim

IPC分类号： C30B15/02 ,  C30B29/06 ,  C30B15/20 ,  C30B15/32 ,  C30B30/04 ,  C30B35/00 ,  B64G1/58 ,  B64G1/64 ,  B66D1/12 ,  G01S11/02 ,  G01S19/13 ,  B64G1/10 ,  G01P15/18

摘要： A feed assembly supplies polysilicon to a growth chamber for growing a crystal ingot from a melt. An example system includes a housing having support rails for receiving one of a granular tray and a chunk tray and a feed material reservoir positioned above the support rails to selectively feed one of either the granular tray or the chunk tray. A valve mechanism and pulse vibrator are also disclosed.

公开(公告)号：US10224233B2

公开(公告)日：2019-03-05

申请号：US15526864

申请日：2015-11-16

申请人： SunEdison Semiconductor Limited (UEN201334164H)

发明人： Qingmin Liu ,  Robert Wendell Standley

IPC分类号： H01L21/762

摘要： A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and comprises a region of nitrogen-reacted nanovoids in the front surface region; a silicon dioxide layer on the surface of the semiconductor handle substrate; a dielectric layer in contact with the silicon dioxide layer; and a semiconductor device layer in contact with the dielectric layer.

公开(公告)号：US10145011B2

公开(公告)日：2018-12-04

申请号：US15083777

申请日：2016-03-29

申请人： SunEdison Semiconductor Limited (UEN201334164H)

发明人： Arash Abedijaberi ,  John A. Pitney ,  Shawn George Thomas

IPC分类号： C23C16/455 ,  C23C16/52 ,  H01L21/02 ,  C30B25/14 ,  C30B25/16

摘要： A system for depositing a layer on a substrate includes a processing chamber including a gas inlet, a plurality of gas flow controllers connected in fluid communication with a gas supply source, a gas distribution plate disposed between the plurality of gas flow controllers and the gas inlet, and a gas injection cap connected in fluid communication between the plurality of gas flow controllers and the gas distribution plate. The gas distribution plate defines a plurality of holes, and the gas injection cap defines a plurality of gas flow passages, each extending from an inlet connected to one of the gas flow controllers to an outlet connected in fluid communication with at least one of the holes in the gas distribution plate. Each of the gas flow controllers is disposed proximate to the gas injection cap.

公开(公告)号：US10128146B2

公开(公告)日：2018-11-13

申请号：US15221839

申请日：2016-07-28

申请人： SunEdison Semiconductor Limited (UEN201334164H)

发明人： Hui Wang ,  Vandan Tanna ,  Tracy Michelle Ragan ,  James Raymond Capstick

IPC分类号： H01L21/762 ,  H01L21/306 ,  C09G1/02 ,  C09K3/14 ,  H01L21/02 ,  G09G1/02

摘要： Polishing slurries for polishing semiconductor substrates are disclosed. The polishing slurry may include first and second sets of colloidal silica particles with the second set having a silica content greater than the first set.