公开(公告)号：US08922028B2

公开(公告)日：2014-12-30

申请号：US13088117

申请日：2011-04-15

申请人： Sung-Ching Hung ,  Wen-Pin Huang

发明人： Sung-Ching Hung ,  Wen-Pin Huang

IPC分类号： H01L23/495 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L23/50

CPC分类号： H01L23/13 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/0603 ,  H01L2224/06179 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32233 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/48257 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49505 ,  H01L2224/73265 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： The present invention relates to a semiconductor package, comprising a carrier, a semiconductor device, a first wire and a second wire. The carrier has a first electrically connecting portion and a second electrically connecting portion. The semiconductor device has a plurality of pads. The first wire electrically connects one of the pads of the semiconductor device and the first electrically connecting portion of the carrier, and the first wire has a first length. The second wire electrically connects one of the pads of the semiconductor device and the second electrically connecting portion of the carrier, and the second wire has a second length. The second length is larger than the first length, and the diameter of the second wire is larger than that of the first wire. Thus, the material usage for the wire is reduced, and the manufacturing cost is reduced.

摘要翻译： 本发明涉及一种半导体封装，包括载体，半导体器件，第一布线和第二布线。 载体具有第一电连接部分和第二电连接部分。 半导体器件具有多个焊盘。 第一线将半导体器件的焊盘和载体的第一电连接部分之一电连接，并且第一焊丝具有第一长度。 第二线电连接半导体器件的焊盘之一和载体的第二电连接部分，并且第二导线具有第二长度。 第二长度大于第一长度，并且第二线的直径大于第一线的直径。 因此，电线的材料使用减少，制造成本降低。

公开(公告)号：US20080191330A1

公开(公告)日：2008-08-14

申请号：US12029533

申请日：2008-02-12

申请人： Sung-Ching Hung ,  Wen-Pin Huang

发明人： Sung-Ching Hung ,  Wen-Pin Huang

IPC分类号： H01L23/495

CPC分类号： H01L23/4952 ,  H01L23/3121 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/10162 ,  H01L2924/181 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention relates to a stacked semiconductor package, comprising a carrier, a first semiconductor device, a second semiconductor device, a plurality of first wires and a plurality of second wires. The carrier has a plurality of electrically connecting portions. The first semiconductor device has a plurality of first pads. The second semiconductor device has a plurality of second pads. The second semiconductor device is disposed on the first semiconductor device. The first wires electrically connect the first pads of the first semiconductor device and the electrically connecting portions of the carrier, and the second wires electrically connect the second pads of the second semiconductor device and the electrically connecting portions of the carrier. The diameters of the second wires are larger than those of the first wires. Thus, the material of the wires is reduced, and the manufacturing cost is reduced.

摘要翻译： 本发明涉及一种堆叠半导体封装，包括载体，第一半导体器件，第二半导体器件，多个第一布线和多个第二布线。 载体具有多个电连接部分。 第一半导体器件具有多个第一焊盘。 第二半导体器件具有多个第二焊盘。 第二半导体器件设置在第一半导体器件上。 第一导线电连接第一半导体器件的第一焊盘和载体的电连接部分，并且第二引线电连接第二半导体器件的第二焊盘和载体的电连接部分。 第二导线的直径大于第一导线的直径。 因此，电线的材料减少，制造成本降低。

公开(公告)号：US06768332B2

公开(公告)日：2004-07-27

申请号：US10385565

申请日：2003-03-12

申请人： Yueh Lung Lin ,  Ho Ming Tong ,  Yao Hsin Feng ,  Su Tao ,  Chi Cheng Pan ,  Kuo Pin Yang ,  Sung Ching Hung

发明人： Yueh Lung Lin ,  Ho Ming Tong ,  Yao Hsin Feng ,  Su Tao ,  Chi Cheng Pan ,  Kuo Pin Yang ,  Sung Ching Hung

IPC分类号： G10R3126

CPC分类号： G01R31/2884

摘要： A semiconductor wafer includes a plurality of areas and an array of dice disposed within each of the areas. The feature of the present invention is that at least two fiducial marks are disposed in each of the areas. The present invention further provides a method of testing a sawed semiconductor wafer.

公开(公告)号：US20080191329A1

公开(公告)日：2008-08-14

申请号：US12029521

申请日：2008-02-12

申请人： Sung-Ching Hung ,  Wen-Pin Huang

发明人： Sung-Ching Hung ,  Wen-Pin Huang

IPC分类号： H01L23/495

CPC分类号： H01L23/49541 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/06179 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48233 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/48257 ,  H01L2224/48599 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10162 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00 ,  H01L2924/00012

摘要： The present invention relates to a semiconductor package, comprising a carrier, a semiconductor device, a first wire and a second wire. The carrier has a first electrically connecting portion and a second electrically connecting portion. The semiconductor device has a plurality of pads. The first wire electrically connects one of the pads of the semiconductor device and the first electrically connecting portion of the carrier, and the first wire has a first length. The second wire electrically connects one of the pads of the semiconductor device and the second electrically connecting portion of the carrier, and the second wire has a second length. The second length is larger than the first length, and the diameter of the second wire is larger than that of the first wire. Thus, the material usage for the wire is reduced, and the manufacturing cost is reduced.

摘要翻译： 本发明涉及一种半导体封装，包括载体，半导体器件，第一布线和第二布线。 载体具有第一电连接部分和第二电连接部分。 半导体器件具有多个焊盘。 第一线将半导体器件的焊盘和载体的第一电连接部分之一电连接，并且第一焊丝具有第一长度。 第二线电连接半导体器件的焊盘之一和载体的第二电连接部分，并且第二导线具有第二长度。 第二长度大于第一长度，并且第二线的直径大于第一线的直径。 因此，电线的材料使用减少，制造成本降低。

公开(公告)号：US06234029B1

公开(公告)日：2001-05-22

申请号：US09383440

申请日：1999-08-27

申请人： Ming-Shuoh Liang ,  Sung-Ching Hung ,  Hung-Nan Chen ,  Simon Lee

发明人： Ming-Shuoh Liang ,  Sung-Ching Hung ,  Hung-Nan Chen ,  Simon Lee

IPC分类号： G01N320

CPC分类号： G01N3/00 ,  B23K31/12 ,  B23K2101/42 ,  G01N3/20 ,  G01N2203/0023 ,  G01N2203/0206 ,  G01N2203/0248 ,  G01N2203/0282

摘要： A testing module for testing the strength of the welding area on a PCB is disclosed. The testing module has a plurality of first plates each provided with a plurality of pressing plates adjustably mounted thereon and a plurality of second plates each provided with a plurality of supporting plates securely mounted thereon. Each of the pressing plates are located at the center of two adjacent supporting plates, such that a plurality of PCBs are able to be tested for the strength of the welding area at a time.

摘要翻译： 公开了一种用于测试PCB上焊接区域的强度的测试模块。 测试模块具有多个第一板，每个板具有可调节地安装在其上的多个压板，以及多个第二板，每个第二板均设有牢固地安装在其上的多个支撑板。 每个压板位于两个相邻的支撑板的中心，使得能够一次测试多个PCB的焊接区域的强度。

公开(公告)号：US20110193209A1

公开(公告)日：2011-08-11

申请号：US13088117

申请日：2011-04-15

申请人： Sung-Ching Hung ,  Wen-Pin Huang

发明人： Sung-Ching Hung ,  Wen-Pin Huang

IPC分类号： H01L25/07 ,  H01L23/495

CPC分类号： H01L23/13 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/0603 ,  H01L2224/06179 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32233 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/48257 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49505 ,  H01L2224/73265 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： The present invention relates to a semiconductor package, comprising a carrier, a semiconductor device, a first wire and a second wire. The carrier has a first electrically connecting portion and a second electrically connecting portion. The semiconductor device has a plurality of pads. The first wire electrically connects one of the pads of the semiconductor device and the first electrically connecting portion of the carrier, and the first wire has a first length. The second wire electrically connects one of the pads of the semiconductor device and the second electrically connecting portion of the carrier, and the second wire has a second length. The second length is larger than the first length, and the diameter of the second wire is larger than that of the first wire. Thus, the material usage for the wire is reduced, and the manufacturing cost is reduced.

摘要翻译： 本发明涉及一种半导体封装，包括载体，半导体器件，第一布线和第二布线。 载体具有第一电连接部分和第二电连接部分。 半导体器件具有多个焊盘。 第一线将半导体器件的焊盘和载体的第一电连接部分之一电连接，并且第一焊丝具有第一长度。 第二线电连接半导体器件的焊盘之一和载体的第二电连接部分，并且第二导线具有第二长度。 第二长度大于第一长度，并且第二线的直径大于第一线的直径。 因此，电线的材料使用减少，制造成本降低。

公开(公告)号：US07687898B2

公开(公告)日：2010-03-30

申请号：US12029533

申请日：2008-02-12

申请人： Sung-Ching Hung ,  Wen-Pin Huang

发明人： Sung-Ching Hung ,  Wen-Pin Huang

IPC分类号： H01L23/02

CPC分类号： H01L23/4952 ,  H01L23/3121 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/10162 ,  H01L2924/181 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stacked semiconductor package, includes a carrier, a first semiconductor device, a second semiconductor device, a plurality of first wires and a plurality of second wires. The carrier has a plurality of electrically connecting portions. The first semiconductor device has a plurality of first pads. The second semiconductor device has a plurality of second pads. The second semiconductor device is disposed on the first semiconductor device. The first wires electrically connect the first pads of the first semiconductor device and the electrically connecting portions of the carrier, and the second wires electrically connect the second pads of the second semiconductor device and the electrically connecting portions of the carrier. The diameters of the second wires are larger than those of the first wires. Thus, the material of the wires is reduced, and the manufacturing cost is reduced.

摘要翻译： 叠层半导体封装包括载体，第一半导体器件，第二半导体器件，多个第一布线和多个第二布线。 载体具有多个电连接部分。 第一半导体器件具有多个第一焊盘。 第二半导体器件具有多个第二焊盘。 第二半导体器件设置在第一半导体器件上。 第一导线电连接第一半导体器件的第一焊盘和载体的电连接部分，并且第二引线电连接第二半导体器件的第二焊盘和载体的电连接部分。 第二导线的直径大于第一导线的直径。 因此，电线的材料减少，制造成本降低。