公开(公告)号：US09040420B2

公开(公告)日：2015-05-26

申请号：US11276349

申请日：2006-02-24

Applicant: Eiji Sugiyama ,  Yoshitaka Dozen ,  Yumiko Fukumoto ,  Hideaki Kuwabara ,  Shunpei Yamazaki

Inventor： Eiji Sugiyama ,  Yoshitaka Dozen ,  Yumiko Fukumoto ,  Hideaki Kuwabara ,  Shunpei Yamazaki

IPC: H01L21/44 ,  H01L21/78 ,  H01L27/12 ,  H01L21/67

CPC classification number: H01L21/7806 ,  H01L21/31111 ,  H01L21/6708 ,  H01L21/67132 ,  H01L27/1214 ,  H01L27/1266 ,  H01L2021/775

Abstract: The present invention has an object to perform a peeling treatment in a short time. Peeling is performed while a peeling layer is exposed to an atmosphere of an etching gas. Alternatively, peeling is performed while an etching gas for a peeling layer is blown to the peeling layer in an atmosphere of an etching gas. Specifically, an etching gas is blown to a part to be peeled while a layer to be peeled is torn off from a substrate. Alternatively, peeling is performed in an etchant for a peeling layer while supplying an etchant to the peeling layer.

Abstract translation: 本发明的目的是在短时间内进行剥离处理。 在剥离层暴露于蚀刻气体的气氛的同时进行剥离。 或者，在蚀刻气体的气氛中将用于剥离层的蚀刻气体吹向剥离层的同时进行剥离。 具体地说，将蚀刻气体吹向待剥离的部分，同时从基板上撕下被剥离层。 或者，在用于剥离层的蚀刻剂中进行剥离，同时向剥离层供给蚀刻剂。

公开(公告)号：US08508027B2

公开(公告)日：2013-08-13

申请号：US12555832

申请日：2009-09-09

Applicant: Hidekazu Takahashi ,  Daiki Yamada ,  Kyosuke Ito ,  Eiji Sugiyama ,  Yoshitaka Dozen

Inventor： Hidekazu Takahashi ,  Daiki Yamada ,  Kyosuke Ito ,  Eiji Sugiyama ,  Yoshitaka Dozen

IPC: H01L23/552

CPC classification number: H01L23/66 ,  H01L23/49855 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The semiconductor device of the invention includes a transistor, an insulating layer provided over the transistor, a first conductive layer (corresponding to a source wire or a drain wire) electrically connected to a source region or a drain region of the transistor through an opening portion provided in the insulating layer, a first resin layer provided over the insulating layer and the first conductive layer, a layer containing conductive particles which is electrically connected to the first conductive layer through an opening portion provided in the first resin layer, and a substrate provided with a second resin layer and a second conductive layer serving as an antenna. In the semiconductor device having the above-described structure, the second conductive layer is electrically connected to the first conductive layer with the layer containing conductive particles interposed therebetween. In addition, the second resin layer is provided over the first resin layer.

公开(公告)号：US08432018B2

公开(公告)日：2013-04-30

申请号：US13271469

申请日：2011-10-12

Applicant: Yoshitaka Dozen ,  Tomoyuki Aoki ,  Hidekazu Takahashi ,  Daiki Yamada ,  Eiji Sugiyama ,  Kaori Ogita ,  Naoto Kusumoto

Inventor： Yoshitaka Dozen ,  Tomoyuki Aoki ,  Hidekazu Takahashi ,  Daiki Yamada ,  Eiji Sugiyama ,  Kaori Ogita ,  Naoto Kusumoto

IPC: H01L29/06

CPC classification number: H01L23/293 ,  H01L23/49855 ,  H01L23/66 ,  H01L27/1248 ,  H01L27/1266 ,  H01L27/13 ,  H01L28/10 ,  H01L2223/6677 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

Abstract: The present invention provides a thin and bendable semiconductor device utilizing an advantage of a flexible substrate used in the semiconductor device, and a method of manufacturing the semiconductor device. The semiconductor device has at least one surface covered by an insulating layer which serves as a substrate for protection. In the semiconductor device, the insulating layer is formed over a conductive layer serving as an antenna such that the value in the thickness ratio of the insulating layer in a portion not covering the conductive layer to the conductive layer is at least 1.2, and the value in the thickness ratio of the insulating layer formed over the conductive layer to the conductive layer is at least 0.2. Further, not the conductive layer but the insulating layer is exposed in the side face of the semiconductor device, and the insulating layer covers a TFT and the conductive layer.

Abstract translation: 本发明提供了利用半导体器件中使用的柔性衬底的优点的薄且可弯曲的半导体器件以及半导体器件的制造方法。 半导体器件具有被绝缘层覆盖的至少一个表面，该绝缘层用作用于保护的衬底。 在半导体器件中，绝缘层形成在用作天线的导电层上，使得不覆盖导电层的部分中的绝缘层的厚度比值至少为1.2，并且该值 在导电层上形成的绝缘层与导电层的厚度比为至少0.2。 此外，导电层而不是绝缘层不会在半导体器件的侧面露出，并且绝缘层覆盖TFT和导电层。

公开(公告)号：US08338931B2

公开(公告)日：2012-12-25

申请号：US12767909

申请日：2010-04-27

Applicant: Yoshitaka Dozen ,  Eiji Sugiyama ,  Hisashi Ohtani ,  Takuya Tsurume

Inventor： Yoshitaka Dozen ,  Eiji Sugiyama ,  Hisashi Ohtani ,  Takuya Tsurume

IPC: H01L23/02

CPC classification number: H01L27/1266 ,  H01L27/1214 ,  H01L27/1255

Abstract: In the present application, is disclosed a method of manufacturing a flexible semiconductor device having an excellent reliability and tolerance to the loading of external pressure. The method includes the steps of: forming a separation layer over a substrate having an insulating surface; forming an element layer including a semiconductor element comprising a non-single crystal semiconductor layer, over the separation layer; forming an organic resin layer over the element layer; providing a fibrous body formed of an organic compound or an inorganic compound on the organic resin layer; heating the organic resin layer; and separating the element layer from the separation layer. This method allows the formation of a flexible semiconductor device having a sealing layer in which the fibrous body is impregnated with the organic resin.

Abstract translation: 在本申请中，公开了一种制造柔性半导体器件的方法，所述柔性半导体器件对外部压力的加载具有优异的可靠性和耐受性。 该方法包括以下步骤：在具有绝缘表面的基底上形成分离层; 在分离层上形成包括非单晶半导体层的半导体元件的元件层; 在元件层上形成有机树脂层; 在有机树脂层上提供由有机化合物或无机化合物形成的纤维体; 加热有机树脂层; 并将元件层与分离层分离。 该方法允许形成具有密封层的柔性半导体器件，其中纤维体浸渍有机树脂。

公开(公告)号：US20120322212A1

公开(公告)日：2012-12-20

申请号：US13596376

申请日：2012-08-28

Applicant: Koji DAIRIKI ,  Junya MARUYAMA ,  Tomoko TAMURA ,  Eiji SUGIYAMA ,  Yoshitaka DOZEN

Inventor： Koji DAIRIKI ,  Junya MARUYAMA ,  Tomoko TAMURA ,  Eiji SUGIYAMA ,  Yoshitaka DOZEN

IPC: H01L21/56

CPC classification number: H01L27/1255 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78648

Abstract: It is an object of the present invention to reduce the cost of a wireless chip, further, to reduce the cost of a wireless chip by enabling the mass production of a wireless chip, and furthermore, to provide a downsized and lightweight wireless chip. A wireless chip in which a thin film integrated circuit peeled from a glass substrate or a quartz substrate is formed between a first base material and a second base material is provided according to the invention. As compared with a wireless chip formed from a silicon substrate, the wireless chip according to the invention realizes downsizing, thinness, and lightweight. The thin film integrated circuit included in the wireless chip according to the invention at least has an n-type thin film transistor having an LDD (Lightly Doped Drain) structure, a p-type thin film transistor having a single drain structure, and a conductive layer functioning as an antenna.

Abstract translation: 本发明的目的在于降低无线芯片的成本，并且通过实现无线芯片的批量生产，进一步降低无线芯片的成本，此外，提供小型化，轻量化的无线芯片。 根据本发明，提供一种其中从玻璃基板或石英基板剥离的薄膜集成电路形成在第一基材和第二基材之间的无线芯片。 与由硅基板形成的无线芯片相比，根据本发明的无线芯片实现了小型化，薄型化和轻量化。 包括在根据本发明的无线芯片中的薄膜集成电路至少具有具有LDD（轻掺杂漏极）结构的n型薄膜晶体管，具有单个漏极结构的p型薄膜晶体管和导电 层作为天线起作用。

公开(公告)号：US08236629B2

公开(公告)日：2012-08-07

申请号：US13100316

申请日：2011-05-04

Applicant: Yoshitaka Dozen ,  Tomoko Tamura ,  Takuya Tsurume ,  Koji Dairiki

Inventor： Yoshitaka Dozen ,  Tomoko Tamura ,  Takuya Tsurume ,  Koji Dairiki

IPC: H01L21/00 ,  H01L21/46

CPC classification number: H01L27/1266 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/13 ,  H01L27/28 ,  H01L29/78603 ,  H01L2924/3511

Abstract: Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.

Abstract translation: 预期由硅晶片形成的IC芯片的应用形式和需求将增加，并且需要进一步降低成本。 本发明的目的是提供一种IC芯片的结构和能够以较低成本生产的方法。 本发明的一个特征是使用具有金属膜的金属膜和反应物作为分离层。 金属膜或具有金属的反应物的蚀刻速率高，并且除了蚀刻金属膜的化学方法或具有金属的反应物之外的物理手段可以用于本发明。 因此，可以在短时间内更容易地制造IDF芯片。

公开(公告)号：US07989317B2

公开(公告)日：2011-08-02

申请号：US12909244

申请日：2010-10-21

Applicant: Daiki Yamada ,  Yoshitaka Dozen

Inventor： Daiki Yamada ,  Yoshitaka Dozen

IPC: H01L21/30 ,  H01L21/46

CPC classification number: H01L27/1266 ,  H01L21/6835 ,  H01L24/97 ,  H01L27/1214 ,  H01L27/13 ,  H01L27/3244 ,  H01L2221/68363 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01054 ,  H01L2924/01055 ,  H01L2924/0106 ,  H01L2924/01067 ,  H01L2924/01068 ,  H01L2924/0107 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01105 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00

Abstract: To provide a manufacturing method of a semiconductor device in which manufacturing cost can be reduced, and a manufacturing method of a semiconductor device with reduced manufacturing time and improved yield. A manufacturing method of a semiconductor device is provided, which includes the steps of forming a first layer containing a metal over a substrate, forming a second layer containing an inorganic material on the first layer, forming a third layer including a thin film transistor on the second layer, irradiating the first layer, the second layer, and the third layer with laser light to form an opening portion through at least the second layer and the third layer.

Abstract translation: 提供可以降低制造成本的半导体器件的制造方法以及制造时间缩短且产率提高的半导体器件的制造方法。 提供了一种半导体器件的制造方法，其包括以下步骤：在衬底上形成包含金属的第一层，在第一层上形成包含无机材料的第二层，在第一层上形成包括薄膜晶体管的第三层 第二层，用激光照射第一层，第二层和第三层，以形成通过至少第二层和第三层的开口部分。

公开(公告)号：US07816685B2

公开(公告)日：2010-10-19

申请号：US12342446

申请日：2008-12-23

Applicant: Daiki Yamada ,  Yoshitaka Dozen ,  Eiji Sugiyama ,  Hidekazu Takahashi

Inventor： Daiki Yamada ,  Yoshitaka Dozen ,  Eiji Sugiyama ,  Hidekazu Takahashi

IPC: H01L29/04

CPC classification number: H01L27/1266 ,  H01L27/124 ,  H01L27/1292 ,  H01L27/1296 ,  H01L29/78621 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2924/00

Abstract: An object of the present invention is to provide a structure of a thin film circuit portion and a method for manufacturing a thin film circuit portion by which an electrode for connecting to an external portion can be easily formed under a thin film circuit. A stacked body including a first insulating film, a thin film circuit formed over one surface of the first insulating film, a second insulating film formed over the thin film circuit, an electrode formed over the second insulating film, and a resin film formed over the electrode, is formed. A conductive film is formed adjacent to the other surface of the first insulating film of the stacked body to be overlapped with the electrode. The conductive film is irradiated with a laser.

Abstract translation: 本发明的目的是提供薄膜电路部分的结构和薄膜电路部分的制造方法，通过该薄膜电路部分可以容易地在薄膜电路下形成用于连接到外部的电极。 包括第一绝缘膜，在第一绝缘膜的一个表面上形成的薄膜电路，形成在薄膜电路上的第二绝缘膜，形成在第二绝缘膜上的电极和形成在第二绝缘膜上的树脂膜的层叠体 电极。 导电膜与层叠体的第一绝缘膜的另一表面相邻地形成为与电极重叠。 用激光照射导电膜。

公开(公告)号：US20100190312A1

公开(公告)日：2010-07-29

申请号：US12753194

申请日：2010-04-02

Applicant: Naoto Kusumoto ,  Nobuharu Ohsawa ,  Mikio Yukawa ,  Yoshitaka Dozen

Inventor： Naoto Kusumoto ,  Nobuharu Ohsawa ,  Mikio Yukawa ,  Yoshitaka Dozen

IPC: H01L21/02

CPC classification number: H01L27/1266 ,  B82Y10/00 ,  G02F2001/13613 ,  G11C13/00 ,  G11C13/0014 ,  G11C2213/77 ,  G11C2213/79 ,  H01L27/1214 ,  H01L27/281 ,  H01L29/458 ,  H01L51/003 ,  H01L2251/558

Abstract: To provide a semiconductor device which is higher functional and reliable and a technique capable of manufacturing the semiconductor device with a high yield at low cost without complexing the apparatus or process. At least one of a first conductive layer and a second conductive layer is formed containing one kind or plural kinds of indium, tin, lead, bismuth, calcium, manganese, or zinc; or oxidation treatment is performed at least one of interfaces between an organic compound layer and the first conductive layer and between the organic compound layer and the second conductive layer. The first conductive layer, the organic compound layer, and the second conductive layer which are formed over a first substrate with a peeling layer interposed therebetween can be peeled from the first substrate with the peeling layer, and transposed to a second substrate.

Abstract translation: 提供功能可靠性更高的半导体器件和能够以低成本高成品率地制造半导体器件而不使器件或工艺复杂化的技术。 形成含有一种或多种铟，锡，铅，铋，钙，锰或锌的至少一种第一导电层和第二导电层; 或氧化处理进行有机化合物层和第一导电层之间以及有机化合物层和第二导电层之间的界面中的至少一个。 在第一衬底上形成有剥离层的第一导电层，有机化合物层和第二导电层可以用剥离层从第一衬底剥离，并且转置到第二衬底。

公开(公告)号：US20080311706A1

公开(公告)日：2008-12-18

申请号：US12076148

申请日：2008-03-14

Applicant: Yoshitaka Dozen ,  Eiji Sugiyama ,  Hisashi Ohtani ,  Takuya Tsurume

Inventor： Yoshitaka Dozen ,  Eiji Sugiyama ,  Hisashi Ohtani ,  Takuya Tsurume

IPC: H01L21/56

CPC classification number: H01L23/293 ,  H01L27/12 ,  H01L27/1214 ,  H01L2924/0002 ,  H01L2924/12044 ,  H05K1/185 ,  H05K1/189 ,  H01L2924/00

Abstract: To provide a method for manufacturing a highly-reliable semiconductor device, which is not damaged by external local pressure, with a high yield, a semiconductor device is manufactured by forming an element substrate having a semiconductor element formed using a single-crystal semiconductor substrate or an SOI substrate, providing the element substrate with a fibrous body formed from an organic compound or an inorganic compound, applying a composition containing an organic resin to the element substrate and the fibrous body so that the fibrous body is impregnated with the organic resin, and heating to provide the element substrate with a sealing layer in which the fibrous body formed from an organic compound or an inorganic compound is contained.

Abstract translation: 为了提供一种以高产率制造不被外部局部压力损坏的高可靠性半导体器件的方法，通过形成具有使用单晶半导体衬底形成的半导体元件的元件衬底或 SOI衬底，为元件衬底提供由有机化合物或无机化合物形成的纤维体，将含有有机树脂的组合物施加到元件衬底和纤维体上，以使纤维体浸渍有机树脂，以及 加热以向元件基板提供包含由有机化合物或无机化合物形成的纤维体的密封层。