公开(公告)号：US08810024B2

公开(公告)日：2014-08-19

申请号：US13429119

申请日：2012-03-23

申请人： Yaojian Lin ,  Pandi Chelvam Marimuthu ,  Kang Chen ,  Yu Gu

发明人： Yaojian Lin ,  Pandi Chelvam Marimuthu ,  Kang Chen ,  Yu Gu

IPC分类号： H01L23/04 ,  H01L23/24 ,  H01L21/00

CPC分类号： H01L23/481 ,  H01L21/4846 ,  H01L21/486 ,  H01L21/56 ,  H01L21/563 ,  H01L21/568 ,  H01L23/13 ,  H01L23/28 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/5389 ,  H01L24/10 ,  H01L24/19 ,  H01L24/81 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/24155 ,  H01L2224/24195 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/1035 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/81805 ,  H01L2924/00012

摘要： A semiconductor device has a carrier with a die attach area. A semiconductor die is mounted to the die attach area with a back surface opposite the carrier. A modular interconnect unit is mounted over the carrier and around or in a peripheral region around the semiconductor die such that the modular interconnect unit is offset from the back surface of the semiconductor die. An encapsulant is deposited over the carrier, semiconductor die, and modular interconnect unit. A first portion of the encapsulant is removed to expose the semiconductor die and a second portion is removed to expose the modular interconnect unit. The carrier is removed. An interconnect structure is formed over the semiconductor die and modular interconnect unit. The modular interconnect unit includes a vertical interconnect structures or bumps through the semiconductor device. The modular interconnect unit forms part of an interlocking pattern around the semiconductor die.

摘要翻译： 半导体器件具有带有裸片附着区域的载体。 半导体管芯安装到具有与载体相对的后表面的管芯附着区域。 模块化互连单元安装在载体上并且围绕半导体管芯周围或周围区域安装，使得模块化互连单元偏离半导体管芯的后表面。 密封剂沉积在载体，半导体管芯和模块化互连单元上。 去除密封剂的第一部分以暴露半导体管芯，并且移除第二部分以露出模块化互连单元。 载体被移除。 在半导体管芯和模块化互连单元上形成互连结构。 模块化互连单元包括通过半导体器件的垂直互连结构或凸块。 模块化互连单元形成围绕半导体管芯的互锁图案的一部分。

公开(公告)号：US20140047398A1

公开(公告)日：2014-02-13

申请号：US13977630

申请日：2011-12-29

申请人： Carlos R. Castro-Pareja ,  Allan Xiao Yu Gu

发明人： Carlos R. Castro-Pareja ,  Allan Xiao Yu Gu

IPC分类号： G06F17/50

CPC分类号： G06F17/50 ,  G03F1/68 ,  G03F1/70

摘要： Improved masks for double patterning lithography are described. In one example, conflict spaces between features of a target design are identified. The conflict spaces are represented as nodes of a graph. Connections are inserted between nodes based on a local search. The connections are cut to determine double patterning mask assignment. The connections are extended to form a checkerboard that is then overlayed on the target mask design to split the features of the target mask design for double patterning.

摘要翻译： 描述了用于双重图案化光刻的改进的掩模。 在一个示例中，识别目标设计的特征之间的冲突空间。 冲突空间被表示为图的节点。 基于本地搜索，在节点之间插入连接。 切割连接以确定双重图案掩模分配。 连接被扩展以形成棋盘，然后覆盖在目标掩模设计上以分割目标掩模设计的特征以进行双重图案化。

公开(公告)号：US08492203B2

公开(公告)日：2013-07-23

申请号：US13164015

申请日：2011-06-20

申请人： Yaojian Lin ,  Kang Chen ,  Yu Gu ,  Wei Meng ,  Chee Siang Ong

发明人： Yaojian Lin ,  Kang Chen ,  Yu Gu ,  Wei Meng ,  Chee Siang Ong

IPC分类号： H01L21/00 ,  H01L21/31 ,  H01L21/44

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/29 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/00

摘要： A semiconductor device has a semiconductor die and encapsulant deposited over the semiconductor die. A first insulating layer is formed over the die and encapsulant. The first insulating layer is cured with multiple dwell cycles to enhance adhesion to the die and encapsulant. A first conductive layer is formed over the first insulating layer. A second insulating layer is formed over the first insulating layer and first conductive layer. The second insulating layer is cured with multiple dwell cycles to enhance adhesion to the first insulating layer and first conductive layer. A second conductive layer is formed over the second insulating layer and first conductive layer. A third insulating layer is formed over the second insulating layer and second conductive layer. The first, second, and third insulating layers have different CTE. The second insulating layer or third insulating layer is cured to a dense state to block moisture.

摘要翻译： 半导体器件具有沉积在半导体管芯上的半导体管芯和密封剂。 在管芯和密封剂上形成第一绝缘层。 第一绝缘层通过多个停留周期固化，以增强与管芯和密封剂的粘合性。 在第一绝缘层上形成第一导电层。 在第一绝缘层和第一导电层上形成第二绝缘层。 第二绝缘层通过多个停留循环固化，以增强对第一绝缘层和第一导电层的粘合性。 在第二绝缘层和第一导电层上形成第二导电层。 在第二绝缘层和第二导电层上形成第三绝缘层。 第一，第二和第三绝缘层具有不同的CTE。 第二绝缘层或第三绝缘层固化至致密状态以阻止水分。

公开(公告)号：US08456002B2

公开(公告)日：2013-06-04

申请号：US13333739

申请日：2011-12-21

申请人： Yaojian Lin ,  Pandi C. Marimuthu ,  Kang Chen ,  Hin Hwa Goh ,  Yu Gu ,  Il Kwon Shim ,  Rui Huang ,  Seng Guan Chow ,  Jianmin Fang ,  Xia Feng

发明人： Yaojian Lin ,  Pandi C. Marimuthu ,  Kang Chen ,  Hin Hwa Goh ,  Yu Gu ,  Il Kwon Shim ,  Rui Huang ,  Seng Guan Chow ,  Jianmin Fang ,  Xia Feng

IPC分类号： H01L23/52

CPC分类号： H01L23/3114 ,  H01L21/31 ,  H01L21/56 ,  H01L21/568 ,  H01L21/768 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/522 ,  H01L23/528 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01043 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2224/19 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2924/00012 ,  H01L2224/214

摘要： A semiconductor device has a semiconductor die and conductive layer formed over a surface of the semiconductor die. A first channel can be formed in the semiconductor die. An encapsulant is deposited over the semiconductor die. A second channel can be formed in the encapsulant. A first insulating layer is formed over the semiconductor die and first conductive layer and into the first channel. The first insulating layer extends into the second channel. The first insulating layer has characteristics of tensile strength greater than 150 MPa, elongation between 35-150%, and thickness of 2-30 micrometers. A second insulating layer can be formed over the semiconductor die prior to forming the first insulating layer. An interconnect structure is formed over the semiconductor die and encapsulant. The interconnect structure is electrically connected to the first conductive layer. The first insulating layer provides stress relief during formation of the interconnect structure.

公开(公告)号：US08122347B2

公开(公告)日：2012-02-21

申请号：US11825095

申请日：2007-07-03

申请人： Hitoshi Yamakado ,  Yu Gu ,  Atsushi Nagahara

发明人： Hitoshi Yamakado ,  Yu Gu ,  Atsushi Nagahara

IPC分类号： G06F17/00

CPC分类号： G06F17/211 ,  G06F17/24

摘要： A document editing support device includes: an object obtaining unit that obtains at least one object as data representing at least one of a text and an image included in a document as a target to be edited; a split ratio storage unit that stores a predetermined split ratio; a reference line setting unit that extracts two lines from at least one of a circumscribed polygon and a boundary and sets the extracted lines as reference lines, the circumscribed polygon being of an object other than a target object, a location of which is to be determined relative to at least one object obtained by the object obtaining unit, and the boundary being of a layout area where objects are to be located in the document; a virtual line generation unit that generates a virtual line that splits an interval between the two reference lines set by the reference line setting unit, at a split ratio stored in the split ratio storage unit; and a location unit that determines a location of the target object, the location of which is to be determined, along the virtual line generated by the virtual line generation unit, within the layout area.

摘要翻译： 文件编辑支援装置包括：对象获取单元，其将至少一个对象作为表示作为要编辑的对象的文档中包含的文本和图像中的至少一个的数据; 分割比率存储单元，其存储预定分割比; 参考线设置单元，从外接多边形和边界中的至少一个提取两行，并将所提取的线设置为参考线，所述外接多边形是除目标对象之外的对象，其位置将被确定 相对于由对象获取单元获得的至少一个对象，并且边界是其中对象将位于文档中的布局区域; 虚拟线生成单元，以存储在分割比率存储单元中的分割比率生成分割由基准线设定单元设定的两个基准线之间的间隔的虚拟线; 以及位置单元，其沿着虚拟线生成单元生成的虚拟线路在布局区域内确定要确定其位置的目标对象的位置。

公开(公告)号：US20090157623A1

公开(公告)日：2009-06-18

申请号：US12190413

申请日：2008-08-12

申请人： Harmeek Singh Bedi ,  Richard Yu Gu

发明人： Harmeek Singh Bedi ,  Richard Yu Gu

IPC分类号： G06F7/06 ,  G06F17/30

CPC分类号： G06F17/30501

摘要： Techniques are described herein for supporting pipelining operations involving DML (Data manipulation Language) and query. In an embodiment, a DML operation is performed for the purpose of changing data in a database system from a first state to a second state. Before the data in the database system is changed by the DML operation, the DML operation has an in-memory representation of such data. In an embodiment, a subsequent query operation that logically depends on the data in the database system in the second state is granted access to the in-memory representation of such data in the second state before the data in the database system is changed by the DML operation to the second state. As a result, operations may be executed in a pipelined fashion with minimum blocking.

摘要翻译： 本文描述了支持涉及DML（数据操作语言）和查询的流水线操作的技术。 在一个实施例中，为了将数据库系统中的数据从第一状态改变到第二状态，执行DML操作。 在数据库系统中的数据被DML操作改变之前，DML操作具有这种数据的内存表示。 在一个实施例中，在数据库系统中的数据被DML改变之前，允许以第二状态在逻辑上依赖于数据库系统中的数据的后续查询操作访问第二状态中的这种数据的内存中表示 操作到第二个状态。 结果，可以以最小阻塞的流水线方式执行操作。

公开(公告)号：US07351817B2

公开(公告)日：2008-04-01

申请号：US10568081

申请日：2003-08-13

申请人： Zhong Chao Yin ,  Guo-Liang Wang ,  Dong Sheng Tian ,  Ke Yu Gu

发明人： Zhong Chao Yin ,  Guo-Liang Wang ,  Dong Sheng Tian ,  Ke Yu Gu

IPC分类号： C07H21/04 ,  C12N5/10 ,  C12N15/74

CPC分类号： C12N15/8281 ,  C07K14/415

摘要： The present invention provides plants, plant cells and methods of making transgenic plants or plant cells, wherein the plants or cells are resistant to bacterial blight. The invention provides isolated nucleic acid sequences comprising SEQ ID NO: 1 or fragments thereof which provide a plant with resistance to bacterial blight disease when transfected into the plant.

摘要翻译： 本发明提供植物，植物细胞和制备转基因植物或植物细胞的方法，其中所述植物或细胞对细菌病害具有抗性。 本发明提供了包含SEQ ID NO：1或其片段的分离的核酸序列，其在转染植物时提供植物对细菌性疾病的抗性。

公开(公告)号：US20060132875A1

公开(公告)日：2006-06-22

申请号：US11284355

申请日：2005-11-21

申请人： Toru Miyamoto ,  Osamu Shinkawa ,  Hitoshi Yamakado ,  Yu Gu ,  Toru Takahashi

发明人： Toru Miyamoto ,  Osamu Shinkawa ,  Hitoshi Yamakado ,  Yu Gu ,  Toru Takahashi

IPC分类号： H04N1/46 ,  G06F3/12

CPC分类号： H04N1/4015 ,  B41J2/2128 ,  B41J2/2139

摘要： The invention provides an image processing device, comprising: an N-level quantization unit, where N is a natural number equal to or greater than 2, the unit converting multi-level image data into N-level image data, the multi-level image data including a plurality of pixels, each pixel having a value corresponding to one of a multi-level gradation, and the N-level image data including a size of an ideal ink dot to be formed; a memory that stores error information, the error information corresponding to a difference between an ideal ink dot and an actual ink dot, the actual ink dot being formed by an image forming device, the image forming device having a plurality of nozzles, and each of the plurality of nozzles being associated with an ideal ink dot and an actual ink dot, and being capable of ejecting M-number of ink dot sizes, where M is a natural number equal to or greater than 2 and satisfies M≧N); an error information obtaining unit that obtains from the memory error information corresponding to an identified one of the plurality of nozzles, the identified nozzle being used for image processing; a dot size determining unit that determines a size of an ink dot on the basis of the error information, the ink dot being ejected by the identified nozzle, and a size of the ink dot being determined such that a density of the ejected ink dot is approximately equal to a required density, the required density being determined by the N-level image data; and an output unit that outputs to the image forming device an instruction for causing ejection of an ink dot from the identified nozzle, the size of the ejected ink dot being determined by the dot size determining unit.

摘要翻译： 本发明提供了一种图像处理装置，包括：N级量化单元，其中N是等于或大于2的自然数，单位将多级图像数据转换为N级图像数据，多级图像 包括多个像素的数据，每个像素具有对应于多级灰度之一的值，以及包括要形成的理想墨点的尺寸的N级图像数据; 存储误差信息的存储器，对应于理想墨点和实际墨点之间的差的误差信息，由图像形成装置形成的实际墨点，具有多个喷嘴的图像形成装置，以及每个 多个喷嘴与理想墨点和实际墨点相关联，并且能够喷射M个墨点尺寸，其中M是等于或大于2的自然数并满足M> = N）; 错误信息获取单元，从所述存储器中获取与所识别的所述多个喷嘴中的一个相对应的错误信息，所识别的喷嘴用于图像处理; 点尺寸确定单元，其基于误差信息确定墨点的尺寸，墨点由识别的喷嘴喷射，并且墨点的尺寸被确定为使得喷射墨点的浓度为 大约等于所需密度，所需密度由N级图像数据确定; 以及输出单元，其向所述图像形成装置输出用于从所识别的喷嘴喷射墨点的指令，所述喷射墨点的尺寸由所述点尺寸确定单元确定。

公开(公告)号：US20200050676A1

公开(公告)日：2020-02-13

申请号：US16058724

申请日：2018-08-08

申请人： Peijie Li ,  Yu Gu ,  Hongqin Song

发明人： Peijie Li ,  Yu Gu ,  Hongqin Song

IPC分类号： G06F17/30 ,  G06F12/126 ,  G06F12/0875

摘要： A data system may dynamically prioritize and ingest data so that, regardless of the memory size of the dataset hosted by the data system, it may process and analyze the hosted dataset in constant time. The system and method may implement a first space-efficient probabilistic data structure on the dataset, wherein the dataset includes a plurality of profile data. It may then receive update data corresponding to some of the plurality of profile data and implement a second space-efficient probabilistic data structure on the dataset including the update data. The system and method may then determine a set of non-shared profile data of the second space-efficient probabilistic data structure and prioritize the set of non-shared profile data of the second space-efficient probabilistic data structure over other profile data of the dataset for caching.

公开(公告)号：US20130113092A9

公开(公告)日：2013-05-09

申请号：US13333739

申请日：2011-12-21

申请人： Yaojian Lin ,  Pandi C. Marimuthu ,  Kang Chen ,  Hin Hwa Goh ,  Yu Gu ,  Il Kwon Shim ,  Rui Huang ,  Seng Guan Chow ,  Jianmin Fang ,  Xia Feng

发明人： Yaojian Lin ,  Pandi C. Marimuthu ,  Kang Chen ,  Hin Hwa Goh ,  Yu Gu ,  Il Kwon Shim ,  Rui Huang ,  Seng Guan Chow ,  Jianmin Fang ,  Xia Feng

IPC分类号： H01L23/52 ,  H01L21/56 ,  H01L21/78

CPC分类号： H01L23/3114 ,  H01L21/31 ,  H01L21/56 ,  H01L21/568 ,  H01L21/768 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/522 ,  H01L23/528 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01043 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2224/19 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2924/00012 ,  H01L2224/214

摘要： A semiconductor device has a semiconductor die and conductive layer formed over a surface of the semiconductor die. A first channel can be formed in the semiconductor die. An encapsulant is deposited over the semiconductor die. A second channel can be formed in the encapsulant. A first insulating layer is formed over the semiconductor die and first conductive layer and into the first channel. The first insulating layer extends into the second channel. The first insulating layer has characteristics of tensile strength greater than 150 MPa, elongation between 35-150%, and thickness of 2-30 micrometers. A second insulating layer can be formed over the semiconductor die prior to forming the first insulating layer. An interconnect structure is formed over the semiconductor die and encapsulant. The interconnect structure is electrically connected to the first conductive layer. The first insulating layer provides stress relief during formation of the interconnect structure.

摘要翻译： 半导体器件具有形成在半导体管芯的表面上的半导体管芯和导电层。 可以在半导体管芯中形成第一通道。 密封剂沉积在半导体管芯上。 可以在密封剂中形成第二通道。 在半导体管芯和第一导电层上形成第一绝缘层并进入第一沟道。 第一绝缘层延伸到第二通道中。 第一绝缘层的拉伸强度大于150MPa，伸长率在35-150％之间，厚度为2-30微米。 在形成第一绝缘层之前，可以在半导体管芯上方形成第二绝缘层。 在半导体管芯和密封剂上形成互连结构。 互连结构电连接到第一导电层。 第一绝缘层在形成互连结构期间提供应力释放。